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The Joint Test Action Group (JTAG)-HS2 programming cable is a high-speed programming solution for Xilinx field-programmable gate arrays (FPGAs). The cable is fully compatible will all Xilinx tools and can be seamlessly driven from iMPACT, Chipscope, and EDK. The HS2 attaches to target boards using Digilents 6-pin, 100-mil spaced programming header or Xilinxs 2x7, 2mm connector and the included adaptor.
The PC powers the JTAG-HS2 through the USB port and will recognize it as a Digilent programming cable when connected to a PC, even if the cable is not attached to the target board. The HS2 has a separate Vdd pin to supply the JTAG signal buffers. The high speed 24mA three-state buffers allow target boards to drive the HS2 with signal voltages from 1.8V to 5V and bus speeds of up to 30MBit/sec. (See figure 1) To function correctly the HS2s Vdd pin must be tied to the same voltage supply that drives the JTAG port on the FPGA.
The JTAG bus can be shared with other devices as systems hold JTAG signals at high-impedance except when actively driven during programming. The HS2 comes included with a standard Type-A to Micro-USB cable that attaches to the end of the module opposite the system board connector. The system board connector should hold the small and light HS2 firmly in place.
Need help choosing a board? Let us help you with a Programming Solutions Comparison table!
Features
- Analog Devices ADP123AUJZ Linear Regulator
- Small, complete, all-in-one JTAG programming solution for Xilinx FPGAs
- Compatible with all Xilinx tools
- Compatible with IEEE 1149.7-2009 Class T0 - Class T4 (includes 2-Wire JTAG)
- Separate Vref drives JTAG/SPI signal voltages; Vref can be any voltage between 1.8V and 5V.
- High-Speed USB2 port that can drive JTAG/SPI bus at up to 30Mbit/sec
- JTAG/SPI frequency settable by user
- Uses micro-AB USB2 connector
- SPI programming solution (modes 0 and 2 up to 30Mbit/sec, modes 1 and 3 up to 2Mbit/sec)
- Fully supported by Digilent's Adept software and Adept SDK, allowing custom JTAG/SPI applications to be created
Scope of Delivery
- USB cable (type-A USB plug, type-AB micro-USB plug)
- JTAG HS2 Programmer
- 6-pin to 2x7-pin Adapter
References
- Manufacturer: Digilent Inc.
- Manufacturer's article name: JTAG HS2 Programming Cable
- Manufacturer's article number: 410-249
Resources
23260-XUP-USB-JTAG
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Nexys 2 (retired) - Nexys-2 (Xilinx Spartan-3E FPGA Board)
Cortex-M0 Implementation in the Nexys2 FPGA Board – A Step by Step Guide
An Application Note has been written by Pedro Martos and Fabricio Baglivo from the Embedded Systems Laboratory in the School of Engineering at the University of Buenos Aires. It describes a basic implementation of the Cortex-M0_DS in an FPGA board. It’s intended as a starting point to build a system around the Cortex-M0_DS processor. It includes example hardware and software, and takes you through synthesizing the system, functional simulation, and hardware verification.
- Cortex-M0_DS Application Note and Deliverables (5.82 MB .zip file)
- Implementing the Cortex-M0 DesignStart Processor in a Low-end FPGA, Oct. 2010
- (Original work presented in Spanish at SASE 2011)
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26003 - SFP Metal Housing relevant files, like technical drawing and STEP-Model.
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TE0424 - SFP 2 SATA Adapter
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TE042x_series - SFP Test Adapters
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TEC0106 - SFP 2 SMA Adapter
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CPCIS_Cards - CompactPCI Serial Standard compatible boards with FPGA/SoC device
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TEC0850 - Xilinx Zynq UltraScale+ FPGA CPCIS card
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PCN-20211125 TEC0850-03 Components Change.pdf
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Schematics (2 Files) SCH-TEC0850-02-15EG1E.PDF
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SCH-TEC0850-02-15EG1EA.PDF
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AD-TEC0850-02-15EG1EA.PDF
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REV03 - PCB Revision: Schematics, AD, STEP, HW Design Files and more ...
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SCH-TEC0850-03-BBEX1-A.PDF
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SCH-TEC0850-03-BBEX1-B.PDF
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SCH-TEC0850-03-BBEX1-C.PDF
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Assembly Diagrams (5 Files) AD-TEC0850-03-15EG1E.PDF
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AD-TEC0850-03-15EG1EA.PDF
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AD-TEC0850-03-BBEX1-A.PDF
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Reference_Design - FPGA Design Examples for different Vivado Versions
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test_board - TEC0850 Basic Design
TEC0850 Basic Design
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Reference Design - Source Code and Configuration Files (1 Files) TEC0850-test_board-vivado_2018.2-build_03_20180913143619.zip
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CR00005 - CRUVI Low Speed to Pmod Adapter
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3DT-CR00005-01-1.PDF
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CR00025 - CRUVI Low Speed Host Slot
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Assembly Diagrams (1 Files) AD-CR00025-01-Default.PDF
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3DT-CR00025-01-Default.PDF
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CR00040 - CRUVI CO2 Sensor
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SCH-CR00040-01-40.PDF
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SCH-CR00040-01-41.PDF
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SCH-CR00040-01-default.PDF
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Assembly Diagrams (4 Files) AD-CR00040-01-0.PDF
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AD-CR00040-01-40.PDF
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AD-CR00040-01-41.PDF
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AD-CR00040-01-default.PDF
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3DT-CR00040-01-default.PDF
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CR00049 - CRUVI eMMC Extension
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Assembly Diagrams (1 Files) AD-CR00049-01-A08I.PDF
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3D PDF (2 Files) 3DB-CR00049-01.PDF
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3DT-CR00049-01.PDF
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CR00091 - CRUVI HS Loopback Adapter
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3DT-CR00091-01.PDF
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CR00100 - CRUVI MAX Baseboard for CRUVI Modules
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SCH-CR00100-01-FBC82A.PDF
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Assembly Diagrams (2 Files) AD-CR00100-01-DBC82A.PDF
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AD-CR00100-01-FBC82A.PDF
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3D PDF (2 Files) 3DB-CR00100-01-No Variations.PDF
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3DT-CR00100-01-No Variations.PDF
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REV02 - PCB Revision: Schematics, AD, STEP, HW Design Files and more ...
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Assembly Diagrams (1 Files) AD-CR00100-02-DBC82A.PDF
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3D PDF (2 Files) 3DB-CR00100-02-No Variations.PDF
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3DT-CR00100-02-No Variations.PDF
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test_board - CR00100 Basic Example
CR00100 Basic Example
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Project Files (2 Files) CR00100-test_board-quartus_20.1.1-20220225104254.zip
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test_board - CR00100 Basic Example
CR00100 Basic Example
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Assembly Diagrams (1 Files) AD-CR00101-01.PDF
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3D PDF (2 Files) 3DB-CR00101-01.PDF
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3DT-CR00101-01.PDF
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CR00103 - CRUVI Certus-NX Baseboard for CRUVI Modules
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Assembly Diagrams (1 Files) AD-CR00103-01-A.PDF
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3D PDF (2 Files) 3DB-CR00103-01-No Variations.PDF
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3DT-CR00103-01-No Variations.PDF
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REV02 - PCB Revision: Schematics, AD, STEP, HW Design Files and more ...
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Assembly Diagrams (1 Files) AD-CR00103-02-A.PDF
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3D PDF (2 Files) 3DB-CR00103-02-No Variations.PDF
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3DT-CR00103-02-No Variations.PDF
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REV03 - PCB Revision: Schematics, AD, STEP, HW Design Files and more ...
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Assembly Diagrams (1 Files) AD-CR00103-03-A.PDF
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3D PDF (2 Files) 3DB-CR00103-03-No Variations.PDF
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3DT-CR00103-03-No Variations.PDF
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Reference_Design - FPGA Design Examples for Lattice Radiant and Propel
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test_certus - CR00103 Test Certus
CR00103 Certus Test
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Assembly Diagrams (1 Files) AD-CR00107-01.PDF
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3D PDF (3 Files) 3DB-CR00107-01.PDF
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3DT-CR00107-01.PDF
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PDF3D-CR00107-01.PDF
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Reference_Design - FPGA Design Examples for different Vivado Versions
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Assembly Diagrams (1 Files) AD-CR00111-01.PDF
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3D PDF (2 Files) 3DB-CR00111-01.PDF
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3DT-CR00111-01.PDF
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PCN-20210608 CR00140-02 Kit SoM Update.pdf
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PCN-20240209 CR00140-02 Kit SoM Update.pdf
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Schematics (1 Files) SCH-CR00140-02-default.PDF
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Assembly Diagrams (1 Files) AD-CR00140-02-default.PDF
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3D PDF (3 Files) 3DB-CR00140-02-No Variations.PDF
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3DT-CR00140-02-No Variations.PDF
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PDF3D-CR00140-02-No Variations.PDF
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Other Files (1 Files) Firmware - Initial Configuration for diverse PCB components, like CPLD, PLL and ...
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Source Code of CPLD Firmware (0 Files) Other Files (0 Files)
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CR00200 - CRUVI ETH
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PCN-20210608 CR00140-02 Kit SoM Update.pdf
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Assembly Diagrams (1 Files) AD-CR00200-01.PDF
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3D PDF (3 Files) 3DB-CR00200-01.PDF
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3DT-CR00200-01.PDF
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PDF3D-CR00200-01.PDF
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PCN-20210608 CR00140-02 Kit SoM Update.pdf
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Assembly Diagrams (1 Files) AD-CR00202-01.PDF
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3D PDF (2 Files) 3DB-CR00202-01.PDF
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3DT-CR00202-01.PDF
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Assembly Diagrams (1 Files) AD-CR00240-01-P001.PDF
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3D PDF (2 Files) 3DB-CR00240-01-No Variations.PDF
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3DT-CR00240-01-No Variations.PDF
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CR00300 - CRUVI HS to FFC Adapter
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Assembly Diagrams (1 Files) AD-CR00300-01-Default.PDF
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3D PDF (2 Files) 3DB-CR00300-01-No Variations.PDF
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3DT-CR00300-01-No Variations.PDF
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Other Files (1 Files) HW_Design - PCB Design relevant files, like PCB-STEP-Model, Cooler-STEP-Model, Trace-length and ...
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Development_Boards - complete Evaluation Platforms with FPGA/SoC device
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Files AVN-20230623 TE0802-02-1AEV2-A-v3-06_29_2023.pdf
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PCN - Product change notifications
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TE0802-01-2CG-1E bottom.jpg
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TE0802-01-2CG-1E top.jpg
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REV02 - PCB Revision: Schematics, AD, STEP, HW Design Files and more ...
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Schematics (4 Files) SCH-TE0802-02-1AEV2-A.PDF
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SCH-TE0802-02-1BEV2-A.PDF
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SCH-TE0802-02-2AEU2-A.PDF
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SCH-TE0802-02-2AEV2-A.PDF
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Assembly Diagrams (3 Files) AD-TE0802-02-1AEV2-A.PDF
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AD-TE0802-02-2AEU2-A.PDF
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AD-TE0802-02-2AEV2-A.PDF
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3D PDF (2 Files) 3DB-TE0802-02-No Variations.PDF
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3DT-TE0802-02-No Variations.PDF
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Other Files (2 Files)
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PMOD-TE0802-02.PDF
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TE0802-02-2AEU2-A_bottom.jpg
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TE0802-02-2AEV2-A angle.jpg
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TE0802-02-2AEV2-A bottom.jpg
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TE0802-02-2AEV2-A top.jpg
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Reference_Design - FPGA Design Examples for different Vivado Versions
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test_board - TE0802 Basic Linux Example
TE0802 Basic Linux Example
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Reference Design - Source Code and Configuration Files (1 Files) TE0802-test_board-vivado_2018.3-build_07_20190830103019.zip
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test_board - TE0802 Basic Linux Example
TE0802 Basic Linux Example
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Reference Design - Source Code and Configuration Files (1 Files) TE0802-test_board-vivado_2019.2-build_12_20200602111955.zip
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Reference Design - Documentation (1 Files) TE0802-test_board-vivado_2019.2-build_12_-v.2-08_24_2022.pdf
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test_board - TE0802 Basic Linux Example
TE0802 Basic Linux Example
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Reference Design - Source Code and Configuration Files (1 Files) TE0802-test_board-vivado_2021.2-build_20_20230210132253.zip
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Reference Design - Documentation (0 Files) Other Files (1 Files) 2022.2
test_board - TE0802 Basic Linux Example
TE0802 Basic Linux Example
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Reference Design - Source Code and Configuration Files (1 Files) TE0802-test_board-vivado_2022.2-build_2_20230628100458.zip
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Reference Design - Documentation (0 Files) Other Files (0 Files)
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Assembly Diagrams (1 Files) AD-TE0950-01-EGBE11A_PRELIMINARY.PDF
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3D PDF (2 Files) 3DB-TE0950-01-No Variations_PRELIMINARY.PDF
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3DT-TE0950-01-No Variations_PRELIMINARY.PDF
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REV02 - PCB Revision: Schematics, AD, STEP, HW Design Files and more ...
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Schematics (1 Files) SCH-TE0950-02-EGBE21A.PDF
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Assembly Diagrams (1 Files) AD-TE0950-02-EGBE21A.PDF
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3D PDF (2 Files) 3DB-TE0950-02-No Variations.PDF
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3DT-TE0950-02-No Variations.PDF
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REV03 - PCB Revision: Schematics, AD, STEP, HW Design Files and more ...
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SCH-TE0950-03-EGBE21C.PDF
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SCH-TE0950-03-EGBE22A.PDF
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SCH-TE0950-03-MAKE21C.PDF
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Assembly Diagrams (4 Files) AD-TE0950-03-EGBE21A.PDF
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AD-TE0950-03-EGBE21C.PDF
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AD-TE0950-03-EGBE22A.PDF
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AD-TE0950-03-No Variations.PDF
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3D PDF (2 Files) 3DB-TE0950-03-No Variations.PDF
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3DT-TE0950-03-No Variations.PDF
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test_board - TE0950 Basic Linux Example
TE0950 Basic Linux Example
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TE0950-test_board_noprebuilt-vivado_2023.2-build_4_20240531092954.zip
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Reference Design - Source Code and Configuration Files (2 Files) TE0950-test_board-vivado_2023.2-build_4_20240531092954.zip
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TE0950-test_board_artix-vivado_2023.2-build_4_20240531084104.zip
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SCH-TEC0053-03A.PDF
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SCH-TEC0053-03B.PDF
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SCH-TEC0053-03C.PDF
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Assembly Diagrams (4 Files) AD-TEC0053-03.PDF
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AD-TEC0053-03A.PDF
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AD-TEC0053-03B.PDF
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AD-TEC0053-03C.PDF
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3D PDF (6 Files) 3DB-TEC0053-03.PDF
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3DT-TEC0053-03.PDF
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PDF3D-TEC0053-03.PDF
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PDF3D-TEC0053-03A.PDF
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PDF3D-TEC0053-03B.PDF
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PDF3D-TEC0053-03C.PDF
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SCH-TEC0053-04A.PDF
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Assembly Diagrams (2 Files) AD-TEC0053-04.PDF
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AD-TEC0053-04A.PDF
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3D PDF (2 Files) 3DB-TEC0053-04.PDF
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3DT-TEC0053-04.PDF
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Other Files (3 Files)
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EDDP User Manual-v.199-11_12_2020.pdf
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EDPS User Manual-v.58-11_12_2020.pdf
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Assembly Diagrams (1 Files) AD-TEC0060-01.PDF
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3D PDF (2 Files) 3DB-TEC0060-01.PDF
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3DT-TEC0060-01.PDF
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Assembly Diagrams (1 Files) AD-TEC0060-02.PDF
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3D PDF (2 Files) 3DB-TEC0060-02.PDF
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3DT-TEC0060-02.PDF
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SCH-TEC0089-02-D2C-1-D.PDF
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Assembly Diagrams (2 Files) AD-TEC0089-02-325-2CC.PDF
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AD-TEC0089-02-D2C-1-D.PDF
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3D PDF (2 Files) 3DB-TEC0089-02.PDF
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3DT-TEC0089-02.PDF
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Arrow_USB_Programmer - ARROW USB Programmer Driver
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PCN-20220609 TEI0009-02 HyperRAM Change.pdf
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SCH-TEI0009-02-055-8CA.PDF
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SCH-TEI0009-02-PHIQ2R.PDF
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Assembly Diagrams (3 Files) AD-TEI0009-02-055-8C.PDF
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AD-TEI0009-02-055-8CA.PDF
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AD-TEI0009-02-PHIQ2R.PDF
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3D PDF (2 Files) 3DB-TEI0009-02.PDF
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3DT-TEI0009-02.PDF
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TEI0009-02-055-8CA bottom.jpg
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TEI0009-02-055-8CA top.jpg
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Reference_Design - FPGA Design Examples for Intel Quartus Prime Suite
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Files C10LP Refkit User Guide.pdf
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C10LP_Refkit__Demo_v2.zip
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TEI0022 - M-Board FMC Carrier for M-Series Precision Converters (Intel Cyclon V development board)
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Schematics (1 Files) SCH-TEI0022-03.PDF
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Assembly Diagrams (1 Files) AD-TEI0022-03.PDF
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3D PDF (3 Files) 3DB-TEI0022-03.PDF
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3DT-TEI0022-03.PDF
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PDF3D-TEI0022-03.PDF
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TEI0022-03 bottom.jpg
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TEI0022-03 top.jpg
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Reference_Design - FPGA Design Examples for Intel Quartus Prime Suite
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test_board - TEI0022 Basic Example
TEI0022 Basic Example
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Project Files (2 Files) TEI0022-test_board-quartus_20.1.1-20220426153922.zip
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TEI0022-test_board_noprebuilt-quartus_20.1.1-20220426153812.zip
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test_board - TEI0022 Basic Example
TEI0022 Basic Example
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TEI0022-test_board_noprebuilt-quartus_21.1.0-20220615163042.zip
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documents
Files UM-TE0101-00.de.pdf User manual (German version)
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UM-TE0101-00.en.pdf User manual (English version)
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pictures
Files TE0101-angle.jpg
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TE0101.jpg
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TE0102 - 24 V -> TTL Levelconverter, 16 Channels
documents
Files UM-TE0102-00.de.pdf User manual (German version)
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UM-TE0102-00.en.pdf User manual (English version)
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pictures
Files TE0102.jpg
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FMC_Cards - compatible Adapterboards for FMC Connectors
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Assembly Diagrams (1 Files) AD-TEF0003-01.PDF
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Source Code of CPLD Firmware (0 Files) Other Files (0 Files)
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TEF0007 - Xilinx Kintex FMC-Module with Displayport Input/Output
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SCH-TEF0007-02A.PDF
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Assembly Diagrams (2 Files) AD-TEF0007-02.PDF
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AD-TEF0007-02A.PDF
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3D PDF (2 Files) 3DB-TEF0007-02.PDF
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3DT-TEF0007-02.PDF
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Trace Lengths (0 Files) Other Files (0 Files)
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TEF0007-02 back.jpg
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TEF0007-02 front.jpg
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TEF0007-02A_angle.jpg
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TEF0007-02A_bottom.jpg
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TEF0007-02A_top.jpg
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Reference_Design - FPGA Design Examples for different Vivado Versions
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TEF0008 - QSFP+ FMC-Module with MAX10
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PCN-20240807 TEF0008-02 PLL Change.pdf
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Schematics (1 Files) SCH-TEF0008-02.PDF
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Assembly Diagrams (1 Files) AD-TEF0008-02.PDF
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3D PDF (2 Files) 3DB-TEF0008-02.PDF
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3DT-TEF0008-02.PDF
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Source Code of CPLD Firmware (0 Files) Other Files (1 Files) HW_Design - PCB Design relevant files, like PCB-STEP-Model, Cooler-STEP-Model, Trace-length and ...
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Trace Lengths (0 Files) Other Files (0 Files)
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TEF0008-02_angle2.jpg
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TEF0008-02_bottom.jpg
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TEF0008-02_top.jpg
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TEF0010 - Xilinx Artix FPGA FMC-Module with GMSL II Output
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SCH-TEF0010-01A.PDF
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Assembly Diagrams (2 Files) AD-TEF0010-01.PDF
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AD-TEF0010-01A.PDF
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3D PDF (2 Files) 3DB-TEF0010-01.PDF
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3DT-TEF0010-01.PDF
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