Kintex-7 FPGA KC705 Evaluation Kit

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Product information "Kintex-7 FPGA KC705 Evaluation Kit"

This article is distributed only within Germany!

This item is a NCNR product (None Cancelable, None Returnable).

NCNR products are identified by Trenz Electronic GmbH as none cancelable, none returnable, by reason of product type, volume or value.

Customer acknowledges that any orders for NCNR products are legally binding, and are subject to the following conditions:

  • Customer may not cancel or reduce orders or reservations for NCNR products without written approval from Trenz Electronic GmbH.
  • Customer may not reschedule delivery of orders or reservations for NCNR products without the written approval from Trenz Electronic GmbH.
  • Except for returns under applicable warranty, if any, Trenz Electronic GmbH will not accept a return on NCNR products.

The Kintex-7 FPGA KC705 Evaluation Kit includes all the basic components of hardware, design tools, IP, and pre-verified reference designs including a targeted design enabling high-performance serial connectivity and advanced memory interfacing. The included pre-verified reference designs and industry-standard FPGA Mezzanine Connectors (FMC) allow scaling and customization with daughter cards.

Xilinx products are warranted to be free from manufacturing defects for 90 days from the date of purchase. No other express or implied warranties are provided.


Optimized for quickly prototyping high performance serial transceiver applications using Kintex-7 FPGAs.

  • Hardware, design tools, IP, and pre-verified reference designs, Demonstrates an end to end PCIe configured with 4 lanes at a 5 Gb/s link rate (Gen2) or 8 lanes at a 2.5 Gb/s link rate (Gen1)
  • Advanced memory interface with 1GB DDR3 SODIM Memory
  • Enabling serial connectivity with PCIe Gen2x4, SFP+ and SMA Pairs, UART, IIC
  • Supports embedded processing with MicroBlaze, soft 32bit RISC
  • Develop networking applications with 10-100-1000 Mbps Ethernet (GMII, RGMII and SGMII​)
  • Implement Video display applications with HDMI out
  • Expand I/O with the FPGA Mezzanine Card (FMC) interface


  • FPGA: Kintex XC7K325T-2FFG900C
    - ROHS compliant KC705 kit including the XC7K325T-2FFG900C FPGA
  • Configuration
    - Onboard JTAG configuration circuitry to enable configuration over USB
    - JTAG header provided for use with Xilinx download cables such as the Platform Cable USB II
    - 128MB (1024Mb) Linear BPI Flash for PCIe® Configuration
    - 16MB (128Mb) Quad SPI Flash
  • Memory
    - 1GB DDR3 SODIMM 800MHz / 1600Mbps
    - 128MB (1024Mb) Linear BPI Flash for PCIe® Configuration
    - 16MB (128Mb) Quad SPI Flash
    - 8Kb IIC EEPROM
    - SD Card Slot
  • Communication & Networking
    - Gigabit Ethernet GMII, RGMII and SGMII
    - SFP / SFP+ cage
    - GTX port (TX, RX) with four SMA connectors
    - UART To USB Bridge
    - PCI Express x8 edge connector
  • Display
    - HDMI Video output
    - External Phy/codec device driving an HDMI Connector
    - 2x16 LCD display
    - 8x LEDs
  • Expansion Connectors
    - FMC-HPC (Partial Population) connector (4 GTX Transceiver, 116 single-ended or 58 differential (34 LA & 24 HA) user defined signals)
    - FMC-LPC connector (1 GTX Transceiver, 68 single-ended or 34 differential user defined signals)
    - Vadj can support 1.8V, 2.5V, or 3.3V
    - IIC
  • Clocking
    - Fixed Oscillator with differential 200MHz output, Used as the “system” clock for the FPGA
    - Programmable Oscillator with 156.250 MHz as the default output, Default frequency targeted for Ethernet applications but oscillator is programmable for many end uses
    - Differential SMA clock input
    - Differential SMA GTX reference clock input
    - Jitter attenuated clock, Used to support CPRI/OBSAI applications that perform clock recovery from a user-supplied SFP/SFP+ module
  • Control & I/O
    - 5X Push Buttons
    - 4X DIP Switches
    - AMS FAN Header (2 I/O)
    - 7 I/O pins available through LCD header
  • Power
    - 12V wall adapter or ATX
    - Voltage and Current measurement capability of 2.5V, 1.5V, and 1.2V, 1.0V supplies (IIC path to FPGA)
  • Analog
    - XADC header


Memory Interface is a free software tool used to generate memory controllers and interfaces for Xilinx FPGAs. Memory Interface generates unencrypted Verilog or VHDL design files, UCF constraints, simulation files and implementation script files to simplify the design process. Memory Interfaces supported are: DDR3 SDRAM, DDR2 SDRAM, QDRII SRAM, and DDRII SRAM, LP DDR, QDRII+ SRAM, and RLDRAM II.

Scope of Delivery

  • KC705 evaluation board featuring the XC7K325T-2FFG900C FPGA
  • Full seat Vivado Design Suite: Design Edition, Node locked & Device-locked to the Kintex-7 XC7K325T FPGA, with 1 year of updates and support
  • Northwest Logic PCI Express DMA Back-End IP (Evaluation License, 12 hour hardware timeout)
  • AMS 101 evaluation board
  • Targeted Reference Design: PCIe Gen2x4 with a Northwest Logic DMA IP engine
  • Board Design Files (DxDesigner 2005, Allegro 16.3 – 16.5)
  • Cables & Power Supply
  • 90-day limited warranty
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Additional Information

Related links to "Kintex-7 FPGA KC705 Evaluation Kit"
Trenz_Electronic - Documents and Design files for Trenz Electronic Products