Intel® Cyclone® 10 LP RefKit mit 10CL055-I7 Dev. Board, 32 MB SDRAM, 16 MB Flash

Preview: Altera® Cyclone®10 LP RefKit 10CL055-I7 Dev. Board, 32 MB SDRAM, 9.5 x 11 cm

Altera® Cyclone®10 LP RefKit 10CL055-I7 Dev. Board, 32 MB SDRAM, 9.5 x 11 cm

€171.00 (203.49 € gross) *

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Delivery time appr. 1-3 workdays

Order number: TEI0009-02-PHIQ2R
In Stock: 2
Article status: Full production

This product is not always in stock, but will be produced on customer order (on demand).... more

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Product information "Altera® Cyclone®10 LP RefKit 10CL055-I7 Dev. Board, 32 MB SDRAM, 9.5 x 11 cm"

This product is not always in stock, but will be produced on customer order (on demand).
Please ask for any minimum quantities.

This article is the replacement for the .
Overview of all previous Product Change Notifications (PCNs) for this module.

The Cyclone^® 10 LP Reference Kit is the worldwide first development board with a 55kLE Intel Cyclone 10 LP and a huge variety of interfaces for many applications. The board is fully qualified and ready to use for end products and can also be ordered in customized variants exactly according your requirements.

Key Features

SoC / FPGA
- Device: Altera^®Cyclone^®10 LP FPGA 10CL055YU484I7G
- Speedgrade: 7
- Logic Elements: 55 kLE
- Temperature range: Industrial
- Package: 484-Pin UBGA

RAM / Storage
- 32 MB SDRAM
- 16 MB serial Flash memory
- 8 MB HyperRAM (not populated)
- 16 MB user Quad-SPI Flash memory (not populated)
- 2 x MAC-Address EEPROM

On Board
- Integrated USB Programmer 2
- 8-Channel, 12-Bit, Configurable ADC/DAC with On-Chip Reference
- Status LEDs, Power LED
  - 13 x user LEDs
  - 1 x 7-Segment Display
  - 2 x Reset Buttons
  - 5 x user Buttons

Interface
- Arduino compatible pin headers
- 6 x Pmod compatible pin headers
- 1 x Grove connector
- 1 x D-SUB connector for VGA (not populated)
- 2 x SMA connectors (not populated)
- 2 x Fast Ethernet PHY (10/100 MBit/s)

Power
- 5V via Power Jack

Dimension
- 9.5 x 11 cm

Other assembly options for cost or performance optimization plus high volume prices available on request.

Important Note

Modules produced after June 2020 are no longer compatible with the older drivers.
Please install driver version 2.4 or newer.
See also driver revision change history.

Development Support

Latest documentation, design support files and reference designs with source files are available for download free of charge.

Scope of Delivery

1 x TEI0009-02-PHIQ2R Trenz Electronic Cyclone 10 LP RefKit 10CL055 Development Board
1 x Power supply unit with cable 5V / 3A / 15W
1 x Adapter for power supply set of 4

Additional Information

Manufacturer's article number: TEI0009-02-PHIQ2R
Trenz Electronic TEI0009 Wiki
AMD article name information
Support Forum

All modules produced by Trenz Electronic are developed and manufactured in Germany.

The online pictures of this product are not a legally binding offer, but are symbol pictures for illustration and presentation only.

Related links to "Altera® Cyclone®10 LP RefKit 10CL055-I7 Dev. Board, 32 MB SDRAM, 9.5 x 11 cm"

Downloads

Digilent
OHO-Elektronik
Sundance
Trenz_Electronic - Documents and Design files for Trenz Electronic Products

File	File-Extension	Description
Bit-File	*.bit	FPGA Configuration File
Diverse Reports	--	Report files in different formats

File	File-Extension	Description
MCS-File	*.mcs	Flash Configuration File with Boot-Image (MicroBlaze or FPGA part only)
Bit-File	*.bit	FPGA Configuration File
Software-Application-File	*.elf	Software Application for Zynq or MicroBlaze Processor Systems
Hardware-Platform-Specification-Files	*.hdf	Hardware Specification from the vivado project. Used in SDK/HSI
MMI-File	*.mmi	File with BRAM-Location to generate MCS or BIT-File with *.elf content (MicroBlaze only)
Diverse Reports	--	Report files in different formats

Component	Description
Xilinx-IP	I2C,SPI-Flash,UART
TE-IP	ASIO (AXI-Stream to IO)

File	File-Extension	Description
MCS-File	*.mcs	Flash Configuration File with Boot-Image (MicroBlaze or FPGA part only)
BIT-File	*.bit	FPGA Configuration File
Software-Application-File	*.elf	Software Application for Zynq or MicroBlaze Processor Systems
Hardware-Platform-Specification-Files	*.hdf	Exported Vivado Hardware Specification for SDK/HSI
MMI-File	*.mmi	File with BRAM-Location to generate MCS or BIT-File with *.elf content (MicroBlaze only)
Diverse Reports	--	Report files in different formats

Component	Description
Xilinx-IP	VIO
TE-IP	Startupe2,LabTools Frequency Counter

Component	Description
Xilinx-IP	VIO (Virtual Input/Output)
TE-IP	Labtools Frequency Counter, Startupe2 Primitive Wrapper

Directory		Content
PCN		Product change notifications: Important changes between hardware revisions
Reference Design		Reference Designs sort by ISE/EDK Version
REV0x		Documents and source files sorted by PCB revision. Connector Pinout Viewer/XDC-Generator available on TE Master Pinout, as well as a additional informations on All Trenz Electronic SoMs
	Documents	PDF documents, like Technical Reference Manual, Schematics, Assembly Diagrams and...
	Firmware	Initial configuration for diverse PCB components, like CPLD, PLL and ...
	HW Design	Relevant files for PCB-Design, like PCB-STEP-Model, Cooler-STEP-Model, Trace-length, Altium libraries / projects (only for selected carrier boards), and ...
	Pictures	PCB-Pictures

Directory		Content
PCN		Product change notifications: Important changes between hardware revisions
REV0x		Documents and source files sorted by PCB revision. Connector Pinout Viewer/XDC-Generator available on TE Master Pinout, as well as a additional informations on All Trenz Electronic SoMs
	Documents	PDF documents, like Technical Reference Manual, Schematics, Assembly Diagrams and...
	Firmware	Initial configuration for diverse PCB components, like CPLD, PLL and ...
	HW Design	Relevant files for PCB-Design, like PCB-STEP-Model, Cooler-STEP-Model, Trace-length, Altium libraries / projects (only for selected carrier boards), and ...
	Pictures	PCB-Pictures

Component	Description
Xilinx-IP	MicroBlaze, MB-Debug, Uartlite, MIG7 for DDR3, QSPI, Timer, Ethernet Lite
TE-IP	ASIO GPIO (AXI-Stream to GPIO)

Key Features

Important Note

Development Support

Scope of Delivery

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