Name |
Value |
C_M_AXI_SG_SUPPORTS_WRITE |
1 |
C_M_AXI_MM2S_PROTOCOL |
AXI4 |
C_M_AXI_MM2S_SUPPORTS_THREADS |
0 |
C_M_AXI_MM2S_THREAD_ID_WIDTH |
1 |
C_M_AXI_MM2S_SUPPORTS_NARROW_BURST |
0 |
C_M_AXI_MM2S_SUPPORTS_READ |
1 |
C_M_AXI_MM2S_SUPPORTS_WRITE |
0 |
C_INTERCONNECT_M_AXI_MM2S_READ_ISSUING |
4 |
C_INTERCONNECT_M_AXI_MM2S_READ_FIFO_DEPTH |
512 |
C_M_AXI_S2MM_PROTOCOL |
AXI4 |
C_M_AXI_S2MM_SUPPORTS_THREADS |
0 |
C_M_AXI_S2MM_THREAD_ID_WIDTH |
1 |
C_M_AXI_S2MM_SUPPORTS_NARROW_BURST |
0 |
C_M_AXI_S2MM_SUPPORTS_WRITE |
1 |
C_M_AXI_S2MM_SUPPORTS_READ |
0 |
C_INTERCONNECT_M_AXI_S2MM_WRITE_ISSUING |
4 |
C_INTERCONNECT_M_AXI_S2MM_WRITE_FIFO_DEPTH |
512 |
C_M_AXIS_MM2S_CNTRL_PROTOCOL |
XIL_AXI_STREAM_ETH_CTRL |
C_S_AXIS_S2MM_STS_PROTOCOL |
XIL_AXI_STREAM_ETH_CTRL |
C_M_AXIS_MM2S_PROTOCOL |
XIL_AXI_STREAM_ETH_DATA |
C_S_AXIS_S2MM_PROTOCOL |
XIL_AXI_STREAM_ETH_DATA |
C_GENERIC |
0 |
C_INTERCONNECT_S_AXI_LITE_AW_REGISTER |
1 |
C_INTERCONNECT_S_AXI_LITE_AR_REGISTER |
1 |
C_INTERCONNECT_S_AXI_LITE_W_REGISTER |
1 |
C_INTERCONNECT_S_AXI_LITE_R_REGISTER |
1 |
C_INTERCONNECT_S_AXI_LITE_B_REGISTER |
1 |
C_INTERCONNECT_M_AXI_SG_AW_REGISTER |
1 |
C_INTERCONNECT_M_AXI_SG_AR_REGISTER |
1 |
C_INTERCONNECT_M_AXI_SG_W_REGISTER |
1 |
C_INTERCONNECT_M_AXI_SG_R_REGISTER |
1 |
C_INTERCONNECT_M_AXI_SG_B_REGISTER |
1 |
C_INTERCONNECT_M_AXI_MM2S_AW_REGISTER |
1 |
C_INTERCONNECT_M_AXI_MM2S_AR_REGISTER |
1 |
C_INTERCONNECT_M_AXI_MM2S_W_REGISTER |
1 |
C_INTERCONNECT_M_AXI_MM2S_R_REGISTER |
1 |
C_INTERCONNECT_M_AXI_MM2S_B_REGISTER |
1 |
C_INTERCONNECT_M_AXI_S2MM_AW_REGISTER |
1 |
C_INTERCONNECT_M_AXI_S2MM_AR_REGISTER |
1 |
C_INTERCONNECT_M_AXI_S2MM_W_REGISTER |
1 |
C_INTERCONNECT_M_AXI_S2MM_R_REGISTER |
1 |
C_INTERCONNECT_M_AXI_S2MM_B_REGISTER |
1 |