AMD Versal™ AI Edge Evalboard with VE2302 device, 8 GB DDR4 SDRAM, 15 x12 cm

AMD Versal™ AI Edge Evalboard with VE2302 device, 8 GB DDR4 SDRAM, 15 x12 cm

€749.00 (891.31 € gross) *

Prices plus VAT plus shipping costs

expected to be available on 06-Dec-2024

Order number: TE0950-03-EGBE21A
In Stock: 0
Standard leadtime (weeks): 30
Article status: Full production

The Trenz Electronic TE0950-03-EGBE21A is a powerful adaptive SoC evaluation board, equipped... more

Close menu

Product information "AMD Versal™ AI Edge Evalboard with VE2302 device, 8 GB DDR4 SDRAM, 15 x12 cm"

The Trenz Electronic TE0950-03-EGBE21A is a powerful adaptive SoC evaluation board, equipped with an AMD Versal™ AI Edge VE2302 device. Furthermore, the board is equipped with 8 GByte DDR4 SDRAM and 128 MByte SPI Flash for configuration and data storage as well as powerful switching power supplies for all required voltages. A large number of inputs and outputs are provided by robust, flexible and cost-effective high-speed connectors. Possible functional limitations and constraints in Vitis.

All parts are at least commercial temperature range of 0°C to +70°C. The module operating temperature range depends on customer design and cooling solution. Please contact us for options.

Key Features

SoC
- AMD Versal™ AI Edge XCVE2302-1LSESFVA784 device
  - A784 package (pin compatible VE2002, VE2102, VE2202, VE2302, VM1102)

RAM/Storage
- 8 GByte DDR4 SDRAM
- 128 MByte SPI Flash (primary boot option)
- MicroSD card (primary boot option)
- 32 GByte e.MMC (secondary boot option)
- EEPROM with MAC-address

On Board
- AMD Artix™ 7 FPGA as configurable Levelshifter/MUX for FMC and other 3.3 V IOs
  - 32 MByte SPI Flash
  - 1 dip switch
  - 2 LEDs
- USB 2.0 Host/Device/OTG (type Micro A/B connector)
- USB JTAG + UART Micro-USB B
- Gigabit Ethernet RJ45
- Output
  - 2 LEDs (1 x MIO, 1 x PL)
- Input
  - 1 push button (PL)
  - 2 dip switches (MIO)
  - Reset button

Interface
- zQSFP with 4 GTYP Transceiver
- 2 x CRUVI HS (each optimized for 4 Lane MIPI, one with reduced pinout)
- 2 x CRUVI LS
- CSI-2 connector (camera, 2 lane MIPI)
- FMC
  - 4 GTYP Transceiver
  - 34 LA diff pairs to Levelshifter/MUX
Power
- 12 V plug for 2.1mm Power Jack
  (Without power supply. Suitable accessories are linked at the end of this product page)
Dimension
- 150 mm x 120 mm

Other assembly options for cost or performance optimization plus high volume prices available on request.

Recommended Software

Vivado ML Enterprise Edition

Development Support

Latest documentation, design support files and reference designs with source files are available for download free of charge.

Scope of Delivery

1 x TE0950-03-EGBE21A Trenz Electronic evaluation board with AMD Versal™ AI Edge VE2302 device

(Without power supply. Suitable accessories are linked at the end of this product page)

Additional Information

Manufacturer's article number: TE0950-03-EGBE21A
Trenz Electronic TE0950 Wiki
Support Forum

All modules produced by Trenz Electronic are developed and manufactured in Germany.

The online pictures of this product are not a legally binding offer, but are symbol pictures for illustration and presentation only.

Related links to "AMD Versal™ AI Edge Evalboard with VE2302 device, 8 GB DDR4 SDRAM, 15 x12 cm"

Downloads

File	File-Extension	Description
Bit-File	*.bit	FPGA Configuration File
Diverse Reports	--	Report files in different formats

Component	Description
IP-Interfaces	I2C, ASIO (AXI-Stream to IO), SPI-Flash, Uart

Application	Description
hello_world	Xilinx Hello World Example

File	File-Extension	Description
MCS-File	*.mcs	Flash Configuration File with Boot-Image (MicroBlaze or FPGA part only)
Bit-File	*.bit	FPGA Configuration File
Software-Application-File	*.elf	Software Application for Zynq or MicroBlaze Processor Systems
Hardware-Platform-Specification-Files	*.hdf	Hardware Specification from the vivado project. Used in SDK/HSI
MMI-File	*.mmi	File with BRAM-Location to generate MCS or BIT-File with *.elf content (MicroBlaze only)
Diverse Reports	--	Report files in different formats

Component	Description
Xilinx-IP	I2C,SPI-Flash,UART
TE-IP	ASIO (AXI-Stream to IO)

Application	Description
hello_world	Xilinx Hello World Example

File	File-Extension	Description
MCS-File	*.mcs	Flash Configuration File with Boot-Image (MicroBlaze or FPGA part only)
BIT-File	*.bit	FPGA Configuration File
Software-Application-File	*.elf	Software Application for Zynq or MicroBlaze Processor Systems
Hardware-Platform-Specification-Files	*.hdf	Exported Vivado Hardware Specification for SDK/HSI
MMI-File	*.mmi	File with BRAM-Location to generate MCS or BIT-File with *.elf content (MicroBlaze only)
Diverse Reports	--	Report files in different formats

Component	Description
Xilinx-IP	VIO
TE-IP	Startupe2,LabTools Frequency Counter

File	File-Extension	Description
BIT-File	*.bit	FPGA Configuration File
DebugProbes-File	*.ltx	Definition File for Vivado/Vivado Labtools Debugging Interface
Diverse Reports	---	Report files in different formats
LabTools Project-File	*.lpr	Vivado Labtools Project File

Component	Description
Xilinx-IP	VIO (Virtual Input/Output)
TE-IP	Labtools Frequency Counter, Startupe2 Primitive Wrapper

File	File-Extension	Description
BIT-File	*.bit	FPGA Configuration File
DebugProbes-File	*.ltx	Definition File for Vivado/Vivado Labtools Debugging Interface
Diverse Reports	---	Report files in different formats
LabTools Project-File	*.lpr	Vivado Labtools Project File
MCS-File	*.mcs	Flash Configuration File with Boot-Image (MicroBlaze or FPGA part only)

Directory	Content
PCN	Product change notifications: Important changes between hardware revisions
Reference Design	Reference Designs sort by ISE/EDK Version
REV0x	Documents and source files sorted by PCB revision. Connector Pinout Viewer/XDC-Generator available on TE Master Pinout, as well as a additional informations on All Trenz Electronic SoMs
	Documents	PDF documents, like Technical Reference Manual, Schematics, Assembly Diagrams and...
	Firmware	Initial configuration for diverse PCB components, like CPLD, PLL and ...
	HW Design	Relevant files for PCB-Design, like PCB-STEP-Model, Cooler-STEP-Model, Trace-length, Altium libraries / projects (only for selected carrier boards), and ...
	Pictures	PCB-Pictures

Directory	Content
PCN	Product change notifications: Important changes between hardware revisions
REV0x	Documents and source files sorted by PCB revision. Connector Pinout Viewer/XDC-Generator available on TE Master Pinout, as well as a additional informations on All Trenz Electronic SoMs
	Documents	PDF documents, like Technical Reference Manual, Schematics, Assembly Diagrams and...
	Firmware	Initial configuration for diverse PCB components, like CPLD, PLL and ...
	HW Design	Relevant files for PCB-Design, like PCB-STEP-Model, Cooler-STEP-Model, Trace-length, Altium libraries / projects (only for selected carrier boards), and ...
	Pictures	PCB-Pictures

Component	Description
Interface IPs	DDR3, GPIO, Uart0, QSPI and Ethernet

Application	Description
hello_world	Xilinx Hello World Example (.elf file only)

File	File-Extension	Description
MCS-File	*.mcs	Flash Configuration File with Boot-Image (MicroBlaze or FPGA part only)
Bit-File	*.bit	FPGA Configuration File
Software-Application-File	*.elf	Software Application for Zynq or MicroBlaze Processor Systems
Hardware-Platform-Specification-Files	*.hdf	Hardware Specification from the vivado project. Used in SDK/HSI
MMI-File	*.mmi	File with BRAM-Location to generate MCS or BIT-File with *.elf content (MicroBlaze only)
Diverse Reports	--	Report files in different formats

Component	Description
Xilinx-IP	MicroBlaze, MB-Debug, Uartlite, MIG7 for DDR3, QSPI, Timer, Ethernet Lite
TE-IP	ASIO GPIO (AXI-Stream to GPIO)

Application	Description
Hello World	Xilinx Hello world ( generate elf file only)

File	File-Extension	Description
MCS-File	*.mcs	Flash Configuration File with Boot-Image (MicroBlaze or FPGA part only)
BIT-File	*.bit	FPGA Configuration File
Software-Application-File	*.elf	Software Application for Zynq or MicroBlaze Processor Systems
Hardware-Platform-Specification-Files	*.hdf	Exported Vivado Hardware Specification for SDK/HSI
MMI-File	*.mmi	File with BRAM-Location to generate MCS or BIT-File with *.elf content (MicroBlaze only)
Diverse Reports	--	Report files in different formats

Component	Description
Xilinx-IP	VIO,ILA
TE-IP	unio_mac

File	File-Extension	Description
BIT-File	*.bit	FPGA Configuration File
DebugProbes-File	*.ltx	Definition File for Vivado/Vivado Labtools Debugging Interface
Diverse Reports	---	Report files in different formats
Hardware-Platform-Specification-Files	*.hdf	Exported Vivado Hardware Specification for SDK/HSI
LabTools Project-File	*.lpr	Vivado Labtools Project File

Component	Description
Interface IPs	QSPI, Uart, ASIO (Axi-Stream to IO)

Application	Description
hello_world	Xilinx Hello World Example

File	File-Extension	Description
MCS-File	*.mcs	Flash Configuration File with Boot-Image (MicroBlaze or FPGA part only)
Bit-File	*.bit	FPGA Configuration File
Software-Application-File	*.elf	Software Application for Zynq or MicroBlaze Processor Systems
Hardware-Platform-Specification-Files	*.hdf	Hardware Specification from the vivado project. Used in SDK/HSI
MMI-File	*.mmi	File with BRAM-Location to generate MCS or BIT-File with *.elf content (MicroBlaze only)
Diverse Reports	--	Report files in different formats

Component	Description
Xilinx-IP	ILA, VIO, CLK-Wizard
TE-IP	F32C, Vector_LED, UART_MON

File	File-Extension	Description
BIT-File	*.bit	FPGA Configuration File
DebugProbes-File	*.ltx	Definition File for Vivado/Vivado Labtools Debugging Interface
Diverse Reports	---	Report files in different formats
LabTools Project-File	*.lpr	Vivado Labtools Project File
MCS-File	*.mcs	Flash Configuration File with Boot-Image (MicroBlaze or FPGA part only)

Component	Description
IP-Interfaces	DDR3, QSPI, Uart, I2C, Ethernet, ASIO (AXI-Stream to IO)

Application	Description
hello_world	Xilinx Hello World Example (.elf only)

File	File-Extension	Description
MCS-File	*.mcs	Flash Configuration File with Boot-Image (MicroBlaze or FPGA part only)
Bit-File	*.bit	FPGA Configuration File
Software-Application-File	*.elf	Software Application for Zynq or MicroBlaze Processor Systems
Hardware-Platform-Specification-Files	*.hdf	Hardware Specification from the vivado project. Used in SDK/HSI
MMI-File	*.mmi	File with BRAM-Location to generate MCS or BIT-File with *.elf content (MicroBlaze only)
Diverse Reports	--	Report files in different formats

Component	Description
Xilinx-IP	AXI Timer, AXI Interrupt Controller,MIG, AXI QSPI, AXI Uart Lite, AXI I2C, AXI Ethernet Lite, VIO
TE-IP	ASIO (AXI-Stream to IO), labtools_fmeter

Application	Description
hello_world	Xilinx Hello World Example (.elf only)
te_spi_bootloader	SPI Bootloader (.elf only)

File	File-Extension	Description
MCS-File	*.mcs	Flash Configuration File with Boot-Image (MicroBlaze or FPGA part only)
BIT-File	*.bit	FPGA Configuration File
Software-Application-File	*.elf	Software Application for Zynq or MicroBlaze Processor Systems
Hardware-Platform-Specification-Files	*.hdf	Exported Vivado Hardware Specification for SDK/HSI
MMI-File	*.mmi	File with BRAM-Location to generate MCS or BIT-File with *.elf content (MicroBlaze only)
Diverse Reports	--	Report files in different formats

Component	Description
Xilinx-IP	AXI Timer, AXI Interrupt Controller,MIG, AXI QSPI, AXI Uart Lite, AXI I2C, AXI Ethernet Lite

Application	Description
hello_world	Xilinx Hello World Example (.elf only)
memory_tests	Xilinx Memory Example (.elf only)

File	File-Extension	Description
BIT-File	*.bit	FPGA Configuration File
Diverse Reports	---	Report files in different formats
Hardware-Platform-Specification-Files	*.hdf	Exported Vivado Hardware Specification for SDK/HSI
LabTools Project-File	*.lpr	Vivado Labtools Project File
MCS-File	*.mcs	Flash Configuration File with Boot-Image (MicroBlaze or FPGA part only)
MMI-File	*.mmi	File with BRAM-Location to generate MCS or BIT-File with *.elf content (MicroBlaze only)
Software-Application-File	*.elf	Software Application for Zynq or MicroBlaze Processor Systems

Component	Description
Zynq Processor	activated MIO-Interfaces: DDR3, QSPI, GPIO,2x Uart, QSPI,2x I2C,2x SD,1x Ethernet

Application	Description
zynq_fsbl	Zynq First Stage Bootloader (for hdmi modified and provided as library in /sw_lib/)
hello_world	Xilinx Hello World Example

File	File-Extension	Description
Bin-File	*.bin	Flash Configuration File with Boot-Image for Zynq-FPGAs
Bit-File	*.bit	FPGA Configuration File
Software-Application-File	*.elf	Software Application for Zynq or MicroBlace Processor Systems
Hardware-Platform-Specification-Files	*.hdf	Hardware Specification from the vivado project. Used in SDK/HSI
BIF-File	*.bif	File with description to generate Bin-File
OS-Image	*.ub	Image with Linux Kernel (On Petalinux optional with Devicetree and RAM-Disk)
Diverse Reports	--	Report files in different formats

Digilent
OHO-Elektronik
SunDance
Trenz_Electronic - Documents and Design files for Trenz Electronic Products
inrevium
reference

Name	Folder	Description
Source Name	<design_name><folder>	Source Description
PetaLinux Project	<design_name>/os/petalinux	PetaLinux Project with Ethernet,USB,RTC

Key Features

Recommended Software

Development Support

Scope of Delivery

Additional Information

TEC0850 Basic Design

CR00100 Basic Example

CR00100 Basic Example

CR00103 Certus Test

TE0802 Basic Linux Example

TE0802 Basic Linux Example

TE0802 Basic Linux Example

TE0802 Basic Linux Example

TE0950 Basic Linux Example

TEI0022 Basic Example

TEI0022 Basic Example

TE0717 Hello World Example

TEI0001 Basic Example

TEI0001 Basic Example

TEI0001 Basic Example

TEI0001 Basic Example

TEI0001 Basic Example

TEI0003 LED Sequencer Example

TEI0003 NIOS SDRAM Example

TEI0003 Basic Example

TEI0003 Basic Example

TEI0003 Basic Example

TEI0003 Basic Example

TEI0003 Basic Example

TEI0010 Basic Example

TEI0010 Basic Example

TEI0010 Basic Example

TEI0010 Basic Example

TEM0001 Test Board Example

TEI0050 Basic Example

TEI0015 DAQ Capture Demo

TEI0015 Data Capture Demo

TEI0015 Jupyter Demo

TEI0016 DAQ Capture Demo

TEI0016 Data Capture Demo

TEI0016 Jupyter Demo

TEI0023 DAQ Capture Demo

TEI0023 Data Capture Demo

TEI0023 Jupyter Demo

TE0890 Hello World Example

ZynqberryZero Demo VIDEO/AUDIO Design with RPI video camera stream to monitor

Basic Linux Example

ZynqberryZero Demo VIDEO/AUDIO Design with RPI video camera stream to monitor

TEM0005 Webserver Demo1

MicroBlaze Basic-System

TE0725 HyperRAM Example

TE0725 Basic Example

TE0725 HyperRAM Example

TE0725 Basic Example

TE0725 HyperRAM Example

TE0725 Basic Example

TE0725 HyperRAM Example

TE0725 Basic Example

TE0725LP Frequency Measurement

TE0725LP Basic Example

TE0725LP Basic Example

TE0725LP Basic Example

TE0725LP Basic Example

TE0714 VIO LED Design

TE0714 Basic Barmetal Example

TE0763 Hello World Example

TE0710 MicroBlaze System

TE0710 UNIO MAC

TE0710 Basic Linux Example

TE0710 Basic Linux Example

TE0710 Basic Linux Example

TE0710 Basic Linux Example

TE0711 F32C Demo Design

TE0711 MicroBlaze Design

TE0711 MicroBlaze Design

TE0711 MicroBlaze Design

TE0711 MicroBlaze Design

TE0712 MicroBlaze Basic-System

TE0712 Basic Linux Example

TE0712 Basic Linux Example