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This bundle contains an Arty Z7-20 Zynq-7000 development board and a Xilinx SDSoC voucher.
The Arty Z7-20 enables maker pros, engineers, system integrators and designers to get started quickly on their embedded vision designs. The ready-to-use development platform builds on Xilinx All Programmable SoC Zynq 7020.
A recent project on Hackster.io by Adam Taylor exemplifies how one can combine Arty Z7-20 and Python for the implementation of their ideas. Python developers for the first-time are able to exploit the capabilities and performance provided by programmable logic. While FPGA developers also benefited as they were able to integrate the high-level capabilities of Python with their FPGA designs.
It is targeted at custom video applications and capable of real-time video processing through the on board 512MB DDR3 and HDMI inputs and outputs.
User can use SDSoC™ development environment from Xilinx, which provides a C/C++ ASSP-like programming experience to improve productivity for system architecture definition and application development. The combined a versatile Arty Z7-20 hardware platform with SDSoC, software development tools can let users build a range of embedded vision systems.
Key Features
- XC7Z020-1CLG400C with 650MHz dual-core Cortex-A9 processor
- 512MB DDR3 with 16-bit bus @ 1050Mbps
- 16MB Quad-SPI Flash
- microSD slot
- Gigabit Ethernet PHY
- HDMI sink port (input) & HDMI source port (output)
- PWM driven mono audio output with 3.5mm jack
- Two 12 pins Pmod connectors
- USB-UART bridge
- USB OTG PHY (supports host only)
- Arduino/chipKIT Shield connector
- Powered from USB or any 7V-15V external power source
- USB-JTAG Programming
3 Target Applications
- Embedded Vision
- Embedded System
- Motor control
Associated Pmods
Overview of Pmods associated with this board.
Scope of Delivery
- 1 x Arty Z7 Development Board in a Digilent cardboard packaging with protective foam
- 1 x Xilinx SDSoC voucher
References
- Manufacturer: Digilent Inc.
- Manufacturer's article number: 410-346-20
Resources
- Arty Z7 Data Sheet at Digilent Documentation Center
- Digilent Inc. Support Forum
23260-XUP-USB-JTAG
Files Xilinx AR36156 - Direct SPI Programming.pdf
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Xilinx configuration solutions.pdf
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Xilinx ds300 v3.2 - Platform Cable USB.pdf
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Xilinx xapp951 v1.3 - SPI Serial Flash.pdf
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23955-Electronic_Explorer_(EEBOARD)
Files ASEE 2011 Mihaela paper .pdf
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ASEE EE board EWU.pdf
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ASEE EE board U of I.pdf
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EEBoard-tutorial-DE-v1.1.pdf
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24084-VHDCI - VHDCI (a.k.a. VHDC): Nexys-3, Atlys, Genesys.
Files R-HI-008068-2_plug-male-mating.pdf
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R-HS-008068-2C_receptacle-female-on_board.pdf
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24243-ChipKIT-BASIC-IO-SHIELD
sample_projects
Files Oled_Temperature_Demo.zip
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24383-CEREBOT-MX7
Files Ethernet Reference Designs.pdf
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FreeRTOS Reference Designs.pdf
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MiWi Reference Designs.pdf
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PIC32 Reference Designs.pdf
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Professor Richard Wall.txt
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24496-Analog Discovery
Files Revolutionizing_How_Engineering_Students_Learn_Analog...Design.pdf
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25894-ChipKIT-STARTER-KIT
Files chipKIT Starter Kit - part list - draft.pdf
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chipKIT kit - project-descriptions - draft.pdf
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chipKIT kit - projects - draft.zip
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26261-NetFPGA-SUME
Files AV02-3399EN+DS+AFBR-709SMZ+25Jan2013%2C0.pdf
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NetFPGA SUME promotional sheet.pptx
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zilberman2014sume.pdf
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26702-NI-LabVIEW
Files LabVIEW Home Bundle product sheet.pptx
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LabVIEW Physical Computing Kit product sheet.pptx
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27069-Analog Discovery 2
Analog Discovery based LCR-Meter - Analog Discovery based LCR - Meter
The Analog_Discovery_Wrapper_DLL_Vers_2.zip contains
- Wrapper-DLL
- Source-Code
- Excel VBA Programs (Examples + LCR Meter)
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Digilent Introduction
Files Digilent Introduction.pdf
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Nexys 2 (retired) - Nexys-2 (Xilinx Spartan-3E FPGA Board)
Cortex-M0 Implementation in the Nexys2 FPGA Board – A Step by Step Guide
An Application Note has been written by Pedro Martos and Fabricio Baglivo from the Embedded Systems Laboratory in the School of Engineering at the University of Buenos Aires. It describes a basic implementation of the Cortex-M0_DS in an FPGA board. It’s intended as a starting point to build a system around the Cortex-M0_DS processor. It includes example hardware and software, and takes you through synthesizing the system, functional simulation, and hardware verification.
- Cortex-M0_DS Application Note and Deliverables (5.82 MB .zip file)
- Implementing the Cortex-M0 DesignStart Processor in a Low-end FPGA, Oct. 2010
- (Original work presented in Spanish at SASE 2011)
http://www.sase.com.ar/2011/tutoriales/implementing-the-cortex-m0-processor-in-fpga/ Files SASE2011-Implementacion-CortexM0-en-FPGA.pdf
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SASE2011_ImplementingTheCortexM0.zip
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SASE2011_ImplementingTheCortexM0DesignStartProcessorInALowEndFPGA.pdf
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Pmod
Files Connecting UART Pmod Interfaces.pdf
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Zrobot
pictures
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OHO-Elektronik
TE0250-GOP_XC9572XL
design_development
Files gop_xc9572xl_20.vhd
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GOP_XC9572XL.diagram.jpg
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GOP_XC9572XL.jpg
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GOP_XC9572XL.top.jpg
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reference_designs
Files GOP_XC9572XL.zip
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TE0251-GOP_XCR3064XL
design_development
Files gop_xcr3064xl_20.vhd
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ucf_xcr3064xl_24.ucf
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documents
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pictures
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reference_designs
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TE0252-GOP_XC2C64
design_development
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documents
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archive
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USB
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TE0262-GODIL
USB
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TE0265-OHO_DY1
archive
Files UM_OHO_DY1-v1.1.pdf
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documents
Files UM_OHO_DY1-v1.2.pdf
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pictures
Files OHO_DY1-XC3S200.jpg
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OHO_DY1.jpg
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OHO_DY1.lab.jpg
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reference_designs
Files OHO_DY1_GODIL48_103.zip
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OHO_DY1_GOPXC3S200_103.zip
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OHO_DY1_S3A_103.zip
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OHO_DY1_S3D1800A_103.zip
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OHO_DY1_S3E_103.zip
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common
documents
Files PB-GOP_CPLDs.pdf
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PB-GOP_FPGA.pdf
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SunDance
26751-EMC2-DP
documents
Files EMC2-DP-block-diagram.pdf
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EMC2-DP-block-diagram.png
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about emc2 and emc2-dp solutions.pdf
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Trenz_Electronic - Documents and Design files for Trenz Electronic Products
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-obsolete_products
25572 Heatsink for TE0720
documents
Files HH-FPGA-Heatsink_rev2.PDF
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IP
TE-USB
Files ev-51.zip
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TE51
Files ds-usbSIE.pdf
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TE0115
TE-XC2S
Files an-XC2S-BL.pdf
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tc-XC2S-SoC-1.pdf
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tc-XC2S-SoC-2.pdf
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TE0126
Files TEprog.exe
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TEprog2MB.exe
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an-XC2SE-Demo.zip
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pbxc2se.pdf
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ps-TE-XC2Se.pdf
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TE0141
Files AD-TE0141-01.pdf
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UM-TE0141-01.pdf
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an-te0141-1st_steps.zip
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TE0149
Files UM-TE0149-01.pdf
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TE0180
Files te0180-00.pdf
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te0180_schematics.pdf
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te0181-00.pdf
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aml91s100e
Files aoan001.pdf
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Accessories - Connectors, Heatsinks, ...
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22684
Files DF17.pdf
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22938
Files DF17.pdf
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23749
Files 6110.pdf
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23758
Files 6060.pdf
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23836
Files LSHM-1XX-XX-X-DH-A-X-X-TR-MKT.pdf
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23838
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24264
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24851
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24903
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26056
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26125
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27219
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Heatsinks
26920-Heatsink-TE0600
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26922-Heatsink-TE0720
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26923-Heatsink-TE0715
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SFP
TE0422 - SFP 2 SMA Adapter
REV01
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TE0424 - SFP 2 SATA Adapter
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CPCIS_Cards - CompactPCI Serial Standard compatible boards with FPGA/SoC device
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Schematics (2 Files) SCH-TEC0850-02-15EG1E.PDF
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AD-TEC0850-02-15EG1EA.PDF
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3D PDF (4 Files) 3DB-TEC0850-02-15EG1E.PDF
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3DB-TEC0850-02-15EG1EA.PDF
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3DT-TEC0850-02-15EG1E.PDF
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3DT-TEC0850-02-15EG1EA.PDF
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SC-PGM-TEC0850-02_SC0850_SMB-03_20181010.zip
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SC-PGM-TEC0850-02_SC0850_SMB-04_20181024.zip
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Source Code of CPLD Firmware (0 Files) Other Files (0 Files)
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test_board - TEC0850 Basic Design
TEC0850 Basic Design
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Reference Design - Source Code and Configuration Files (1 Files) TEC0850-test_board-vivado_2018.2-build_03_20180913143619.zip
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Reference Design - Documentation (0 Files) Other Files (0 Files)
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TE0802-01-2CG-1E bottom.jpg
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TE0802-01-2CG-1E top.jpg
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TEC0053 - Electric Drive Power Stage (EDPS)
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SCH-TEC0053-04A.PDF
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SCH-TEC0053-04B.PDF
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SCH-TEC0053-04C.PDF
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SCH-TEC0053-04D.PDF
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Assembly Diagrams (5 Files) AD-TEC0053-04.PDF
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AD-TEC0053-04A.PDF
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AD-TEC0053-04B.PDF
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AD-TEC0053-04C.PDF
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AD-TEC0053-04D.PDF
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3D PDF (2 Files) 3DB-TEC0053-04.PDF
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3DT-TEC0053-04.PDF
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Assembly Diagrams (1 Files) AD-TEC0060-01.PDF
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3D PDF (2 Files) 3DB-TEC0060-01.PDF
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3DT-TEC0060-01.PDF
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Assembly Diagrams (1 Files) AD-TEC0060-02.PDF
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3D PDF (2 Files) 3DB-TEC0060-02.PDF
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3DT-TEC0060-02.PDF
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Arrow_USB_Programmer - ARROW USB Programmer Driver
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SCH-TEI0009-02-055-8CA.PDF
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Assembly Diagrams (2 Files) AD-TEI0009-02-055-8C.PDF
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AD-TEI0009-02-055-8CA.PDF
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3D PDF (2 Files) 3DB-TEI0009-02.PDF
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3DT-TEI0009-02.PDF
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documents
Files UM-TE0101-00.de.pdf User manual (German version)
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UM-TE0101-00.en.pdf User manual (English version)
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pictures
Files TE0101-angle.jpg
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TE0101.jpg
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TE0102 - 24 V -> TTL Levelconverter, 16 Channels
documents
Files UM-TE0102-00.de.pdf User manual (German version)
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UM-TE0102-00.en.pdf User manual (English version)
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pictures
Files TE0102.jpg
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FMC_Cards - compatible Adapterboards for FMC Connectors
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Source Code of CPLD Firmware (0 Files) Other Files (0 Files)
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TEF0007 - Xilinx Kintex FMC-Module with Displayport Input/Output
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Assembly Diagrams (1 Files) AD-TEF0007-02.PDF
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3D PDF (2 Files) 3DB-TEF0007-02.PDF
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3DT-TEF0007-02.PDF
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Other Files (0 Files)
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Trace Lengths (0 Files) Other Files (0 Files)
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TEF0007-02 back.jpg
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TEF0007-02 front.jpg
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TEF0007-02A_angle.jpg
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TEF0007-02A_bottom.jpg
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TEF0007-02A_top.jpg
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Reference_Design - FPGA Design Examples for different Vivado Versions
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TEF0008 - Xilinx QSFP+ FMC-Module with MAX10
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Assembly Diagrams (1 Files) AD-TEF0008-02.PDF
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3D PDF (2 Files) 3DB-TEF0008-02.PDF
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3DT-TEF0008-02.PDF
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Source Code of CPLD Firmware (0 Files) Other Files (0 Files)
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TEF0008-02_angle1.jpg
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TEF0008-02_angle2.jpg
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TEF0008-02_angle3.jpg
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TEF0008-02_bottom.jpg
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TEF0008-02_top.jpg
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JTAG_Programmer - for Xilinx, Intel and Lattice FPGA/SoC Devices
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SCH-TE0790-02L.PDF
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Assembly Diagrams (2 Files) AD-TE0790-02.PDF
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AD-TE0790-02L.PDF
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3D PDF (3 Files) 3DB-TE0790-02.PDF
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3DT-TE0790-02.PDF
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PDF3D-TE0790-02.PDF
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SC-PGM-TE0790-02-XMOD_STD_RXTXSWAP-01_20170404.zip
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SC-PGM-TE0790-02_XMOD_DIP40-01_20170426.zip
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SC-PRJ-TE0790-02-XMOD_STD-01_20170404.zip
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SC-PRJ-TE0790-02-XMOD_STD_RXTXSWAP-01_20170404.zip
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SC-PRJ-TE0790-02_XMOD-DIP40-01_20170426.zip
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TE0790-02 bottom.JPG
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TE0790-02 top.JPG
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TE0791 - Adapter für TE0790
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SCH-TE0791-01C.PDF
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Assembly Diagrams (2 Files) AD-TE0791-01.PDF
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AD-TE0791-01C.PDF
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3D PDF (2 Files) 3DB-TE0791-01.PDF
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3DT-TE0791-01.PDF
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TEI0004 - Arrow-USB-Programmer 2 (FTDI JTAG Programmer for Intel FPGA)
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Arrow_USB_Programmer - ARROW USB Programmer Driver
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Other Files (0 Files)
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Arrow_USB_Programmer - ARROW USB Programmer Driver
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Files TEI0005_footprint_libary.zip
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Modules_and_Module_Carriers - modules with FPGA/SoC device and corresponding carrier boards
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Assembly Diagrams (1 Files) AD-TEC0117-01.PDF
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3D PDF (2 Files) 3DB-TEC0117-01.PDF
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3DT-TEC0117-01.PDF
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Other Files (0 Files)
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Trace Lengths (0 Files) Other Files (0 Files)
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Arrow_USB_Programmer - ARROW USB Programmer Driver
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- If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
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Assembly Diagrams (1 Files) AD-TEI0001-01-08-C8.PDF
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3D PDF (2 Files) 3DB-TEI0001-01-08-C8.PDF
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3DT-TEI0001-01-08-C8.PDF
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Other Files (0 Files)
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TEI0001-01 bottom.jpg
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TEI0001-01 top.jpg
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REV02 - PCB Revision: Schematics, AD, STEP, HW Design Files and more ...
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Assembly Diagrams (1 Files) AD-TEI0001-02-08-C8.PDF
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3D PDF (2 Files) 3DB-TEI0001-02-08-C8.PDF
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3DT-TEI0001-02-08-C8.PDF
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Other Files (0 Files)
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TEI0001-01 bottom.jpg
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TEI0001-01 top.jpg
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REV03 - PCB Revision: Schematics, AD, STEP, HW Design Files and more ...
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SCH-TEI0001-03-08-C8P.PDF
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SCH-TEI0001-03-16-C8.PDF
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SCH-TEI0001-03-16-C8A.PDF
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Assembly Diagrams (5 Files) AD-TEI0001-03-08-C8.PDF
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AD-TEI0001-03-08-C8P.PDF
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AD-TEI0001-03-16-C8.PDF
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AD-TEI0001-03-16-C8A.PDF
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3D PDF (4 Files) 3DB-TEI0001-03-08-C8.PDF
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3DB-TEI0001-03.PDF
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3DT-TEI0001-03.PDF
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Reference_Design - FPGA Design Examples for Intel Quartus Prime Suite
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Project Files (4 Files) MAX1000 Nios II Core Lab.zip
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winbond_flash_demo.zip
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TEI0003 - CYC1000 (Intel Cyclone 10)
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Arrow_USB_Programmer - ARROW USB Programmer Driver
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SCH-TEI0003-02A.PDF
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Assembly Diagrams (2 Files) AD-TEI0003-02.PDF
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AD-TEI0003-02A.PDF
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Reference_Design - FPGA Design Examples for Intel Quartus Prime Suite
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LED_Sequencer - TEI0003 LED Sequencer Example
TEI0003 LED Sequencer Example
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TEI0003 NIOS SDRAM Example
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Schematics (1 Files) SCH-TEI0010-02-08-C8.PDF
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Reference_Design - FPGA Design Examples for Intel Quartus Prime Suite
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AnalogMAX_Jupyter
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TEL0001 - LXO2000 (Lattice LCMXO2 FPGA modules)
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SCH-TEL0001-01R.PDF
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AD-TEL0001-01R.PDF
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REV02 - PCB Revision: Schematics, AD, STEP, HW Design Files and more ...
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Assembly Diagrams (1 Files) AD-TEL0001-02.PDF
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Reference_Design - FPGA Design Examples for Lattice Diamond
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Assembly Diagrams (2 Files) AD-TEM0001-01-010C.PDF
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AD-TEM0001-01.PDF
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3D PDF (0 Files) Pinout overview (1 Files) SMF2000-pinout-v8.pdf
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Reference_Design - FPGA Design Examples for Libero SoC Design Suite
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SMFSDRAM
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3.05x6.5 - form factor, like TE0876, ...
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Documents - Technical Reference Manual, Schematics, Assembly Diagrams and ..
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Reference_Design - FPGA Design Examples
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Schematics (5 Files) SCH-TE0725-02-100-2C.PDF
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SCH-TE0725-02-100-2CF1.PDF
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SCH-TE0725-02-100-2CF2.PDF
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SCH-TE0725-02-35-2C.PDF
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Assembly Diagrams (5 Files) AD-TE0725-02-100-2C.PDF
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AD-TE0725-02-100-2CF1.PDF
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AD-TE0725-02-100-2CF2.PDF
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3D PDF (10 Files) 3DB-TE0725-02-100-2C.PDF
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REV03 - PCB Revision: Schematics, AD, STEP, HW Design Files and more ...
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Schematics (5 Files) SCH-TE0725-03-100-2C.PDF
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SCH-TE0725-03-100-2CF.PDF
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SCH-TE0725-03-100-2I9.PDF
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SCH-TE0725-03-15-1C.PDF
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SCH-TE0725-03-35-2C.PDF
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Assembly Diagrams (5 Files) AD-TE0725-03-100-2C.PDF
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AD-TE0725-03-100-2CF.PDF
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AD-TE0725-03-100-2I9.PDF
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AD-TE0725-03-15-1C.PDF
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TE0725-03-100-2CF_angel.jpg
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TE0725-03-100-2CF_angel1.jpg
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Reference_Design - FPGA Design Examples for different Vivado Versions
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labtools - Vivado Labtools ready to use project
Short Description:
Additional content in the larger ZIP with prebuilt-folders:
File | File-Extension | Description |
---|---|---|
Bit-File | *.bit | FPGA Configuration File |
Diverse Reports | -- | Report files in different formats |
Size
TE0725-simple_io_noprebuilt-vivado_2015.4-build_32_20160504110725.zip
Size
test_board - MicroBlaze Basic-System
Short Description:
Excerpt of special Block-Design components/interfaces:
Component | Description |
---|---|
IP-Interfaces | I2C, ASIO (AXI-Stream to IO), SPI-Flash, Uart |
Additional Software Application for SDK/HSI and Linux:
Application | Description |
---|---|
hello_world | Xilinx Hello World Example |
Additional content in the larger ZIP with prebuilt-folders:
File | File-Extension | Description |
---|---|---|
MCS-File | *.mcs | Flash Configuration File with Boot-Image (MicroBlaze or FPGA part only) |
Bit-File | *.bit | FPGA Configuration File |
Software-Application-File | *.elf | Software Application for Zynq or MicroBlaze Processor Systems |
Hardware-Platform-Specification-Files | *.hdf | Hardware Specification from the vivado project. Used in SDK/HSI |
MMI-File | *.mmi | File with BRAM-Location to generate MCS or BIT-File with *.elf content (MicroBlaze only) |
Diverse Reports | -- | Report files in different formats |
Size
TE0725-test_board_noprebuilt-vivado_2015.4-build_32_20160504103252.zip
Size
2016.1
f32c_arduino
Files TE0725-f32c_demo-vivado_2016.1-build_33_20160529102928.zip
Size
TE0725-f32c_demo_noprebuilt-vivado_2016.1-build_33_20160529102755.zip
Size
2016.2
test_board - MicroBlaze Basic-System
MicroBlaze Basic-System
-Downloadable files are located below the description-
Component | Description |
---|---|
Xilinx-IP | I2C,SPI-Flash,UART |
TE-IP | ASIO (AXI-Stream to IO) |
Application | Description |
---|---|
hello_world | Xilinx Hello World Example |
Name | Folder | Description |
---|
File | File-Extension | Description |
---|---|---|
MCS-File | *.mcs | Flash Configuration File with Boot-Image (MicroBlaze or FPGA part only) |
BIT-File | *.bit | FPGA Configuration File |
Software-Application-File | *.elf | Software Application for Zynq or MicroBlaze Processor Systems |
Hardware-Platform-Specification-Files | *.hdf | Exported Vivado Hardware Specification for SDK/HSI |
MMI-File | *.mmi | File with BRAM-Location to generate MCS or BIT-File with *.elf content (MicroBlaze only) |
Diverse Reports | -- | Report files in different formats |
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te0725-test_board_noprebuilt-vivado_2016.2-build_07_20161020133512.zip
Size
2017.4
HyperRAM - TE0725 HyperRAM Example
TE0725 HyperRAM Example
-Downloadable files are located below the description-
This reference designs is bundled with a FREE evaluation edition of the commercially proven, low-cost, low-circuit area, high performance, HyperBus Memory Controller (HBMC) IP supplied by Synaptic Laboratories Ltd. Synaptic Labs HBMC IP is commercially proven in both Intel and Xilinx projects, and was selected by Intel. This FREE HBMC IP evaluation license never expires, and no customer registration or NIC ID is required.
You can check for and obtain the latest version of the FREE evaluation HBMC IP from S/Labs website for Xilinx on S/Labs HBMC IP (Free Trail IP). Please send your HBMC IP support questions to info@synaptic-labs.com
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Reference Design - Source Code and Configuration Files (1 Files) TE0725-HyperRAM-vivado_2017.4-build_10_20180605162425.zip
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TE0725 Basic Example
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Reference Design - Source Code and Configuration Files (1 Files) TE0725-test_board-vivado_2017.4-build_07_20180319171209.zip
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Reference Design - Documentation (0 Files) Other Files (0 Files)
HyperRAM - TE0725 HyperRAM Example
TE0725 HyperRAM Example
-Downloadable files are located below the description-
This reference designs is bundled with a FREE evaluation edition of the commercially proven, low-cost, low-circuit area, high performance, HyperBus Memory Controller (HBMC) IP supplied by Synaptic Laboratories Ltd. Synaptic Labs HBMC IP is commercially proven in both Intel and Xilinx projects, and was selected by Intel. This FREE HBMC IP evaluation license never expires, and no customer registration or NIC ID is required.
You can check for and obtain the latest version of the FREE evaluation HBMC IP from S/Labs website for Xilinx on S/Labs HBMC IP (Free Trail IP). Please send your HBMC IP support questions to info@synaptic-labs.com
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Reference Design - Source Code and Configuration Files (1 Files) TE0725-HyperRAM-vivado_2018.2-build_02_20180809122623.zip
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Reference Design - Documentation (0 Files) Other Files (0 Files)
TE0725 Basic Example
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Reference Design - Source Code and Configuration Files (1 Files) TE0725-test_board-vivado_2018.2-build_02_20180809122018.zip
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Schematics (3 Files) SCH-TE0725LP-01-100-2C.PDF
Size
SCH-TE0725LP-01-100-2D.PDF
Size
SCH-TE0725LP-01-100-2L.PDF
Size
Assembly Diagrams (3 Files) AD-TE0725LP-01-100-2C.PDF
Size
AD-TE0725LP-01-100-2D.PDF
Size
AD-TE0725LP-01-100-2L.PDF
Size
3D PDF (6 Files) 3DB-TE0725LP-01-100-2C.PDF
Size
3DB-TE0725LP-01-100-2D.PDF
Size
3DB-TE0725LP-01-100-2L.PDF
Size
3DT-TE0725LP-01-100-2C.PDF
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3DT-TE0725LP-01-100-2D.PDF
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3DT-TE0725LP-01-100-2L.PDF
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TE0725LP-01-100-2D bottom.jpg
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TE0725LP-01-100-2D top.jpg
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TE0725LP_0.jpg
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TE0725LP_1.jpg
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TE0725LP_2.jpg
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Reference_Design - FPGA Design Examples for different Vivado Versions
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test_board - TE0725LP Frequency Measurement
TE0725LP Frequency Measurement
-Downloadable files are located below the description-
Component | Description |
---|---|
Xilinx-IP | VIO |
TE-IP | Startupe2,LabTools Frequency Counter |
Application | Description |
---|
Name | Folder | Description |
---|
File | File-Extension | Description |
---|---|---|
BIT-File | *.bit | FPGA Configuration File |
DebugProbes-File | *.ltx | Definition File for Vivado/Vivado Labtools Debugging Interface |
Diverse Reports | --- | Report files in different formats |
LabTools Project-File | *.lpr | Vivado Labtools Project File |
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Size
te0725lp-test_board_noprebuilt-vivado_2016.2-build_07_20161025121507.zip
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2017.4
test_board - TE0725LP Basic Example
TE0725LP Basic Example
-Downloadable files are located below the description-
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Reference Design - Source Code and Configuration Files (1 Files) TE0725LP-test_board-vivado_2017.4-build_07_20180319162005.zip
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Reference Design - Documentation (0 Files) Other Files (0 Files)
test_board - TE0725LP Basic Example
TE0725LP Basic Example
-Downloadable files are located below the description-
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Reference Design - Source Code and Configuration Files (1 Files) TE0725LP-test_board-vivado_2018.2-build_02_20180816093341.zip
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Reference Design - Documentation (0 Files) Other Files (0 Files)
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Assembly Diagrams (2 Files) AD-TEBA0714-01.PDF
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AD-TEBA0714-01ALL.PDF
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3D PDF (2 Files) 3DB-TEBA0714-01.PDF
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3DT-TEBA0714-01.PDF
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Trace Lengths (0 Files) Altium Project and Libraries (1 Files) AP-TEBA0741-01.zip
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TEBA0714_1.jpg
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TEBA0714_2.jpg
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TEBB0714 - Carrierboard for TE0714, ...
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Documents - Technical Reference Manual, Schematics, Assembly Diagrams and ..
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Size
Assembly Diagrams (1 Files) AD-TEBB0714-01.PDF
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3D PDF (3 Files) 3DB-TEBB0714-01.PDF
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3DT-TEBB0714-01.PDF
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PDF3D-TEBB0714-01.PDF
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Other Files (0 Files)
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Trace Lengths (0 Files) Altium Project and Libraries (1 Files) AP-TEBB0714-01.zip
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TEBB0714-01 angle2.jpg
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TEBB0714-01 bottom.jpg
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TEBB0714-01 top.jpg
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TEBT0714 - Test Fixture for TE0714, ...
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Assembly Diagrams (1 Files) AD-TET0714-01.PDF
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3D PDF (2 Files) 3DB-TET0714-01.PDF
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3DT-TET0714-01.PDF
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Electronic Design Interchange Format(EDIF) (0 Files) Gerber Files (1 Files) GB-TEBT0714-01.zip
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PCN-20180911 TE0714-02-_-2IC6 SPI Flash Change.pdf
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SCH-TE0714-01-35-2IC6.PDF
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Assembly Diagrams (2 Files) AD-TE0714-01-35-2I.PDF
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AD-TE0714-01-35-2IC6.PDF
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3D PDF (0 Files) Other Files (0 Files)
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STP-TE0714-01-35-2IC6.zip
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Size
TE0714_bottom.jpg
Size
TE0714_top.jpg
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REV02 - PCB Revision: Schematics, AD, STEP, HW Design Files and more ...
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Schematics (5 Files) SCH-TE0714-02-35-2I.PDF
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SCH-TE0714-02-35-2IC6.PDF
Size
SCH-TE0714-02-50-2I.PDF
Size
SCH-TE0714-02-50-2IAC6.PDF
Size
SCH-TE0714-02-50-2IC6.PDF
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Assembly Diagrams (5 Files) AD-TE0714-02-35-2I.PDF
Size
AD-TE0714-02-35-2IC6.PDF
Size
AD-TE0714-02-50-2I.PDF
Size
AD-TE0714-02-50-2IAC6.PDF
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AD-TE0714-02-50-2IC6.PDF
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3D PDF (0 Files) Other Files (0 Files)
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STP-TE0714-02-35-2IC6.zip
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Trace Lengths (1 Files) TL-TE0714-02_signal_length_b2b.xls
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Other Files (0 Files)
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TE0714-02-50-2IC6_bottom.jpg
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TE0714-02-50-2IC6_top.jpg
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Reference_Design - FPGA Design Examples for different Vivado Versions
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vio_led - TE0714 VIO LED Design
TE0714 VIO LED Design
-Downloadable files are located below the description-
Controlling:
- d4_mux_i: 0(d4_user_i), 1(LED_CLK/2), 2(LED_CLK/2^24), 3 (LED_CLK/2^32)
- d4_user_i: 0(off), 1(on)
- sel_clk_i: 0(65MHz ON-Chip CLK), 1(25 MHz On-Module CLK)
- led_freq: LED output frequency (minimum display value is 1Hz)
- startup_clk_freq: 65MHz ON-Chip CLK
- sys_clk_freq: 25 MHz On-Module CLK
Component | Description |
---|---|
Xilinx-IP | VIO (Virtual Input/Output) |
TE-IP | Labtools Frequency Counter, Startupe2 Primitive Wrapper |
Application | Description |
---|
Name | Folder | Description |
---|
File | File-Extension | Description |
---|---|---|
BIT-File | *.bit | FPGA Configuration File |
DebugProbes-File | *.ltx | Definition File for Vivado/Vivado Labtools Debugging Interface |
Diverse Reports | --- | Report files in different formats |
LabTools Project-File | *.lpr | Vivado Labtools Project File |
MCS-File | *.mcs | Flash Configuration File with Boot-Image (MicroBlaze or FPGA part only) |
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Size
te0714-led_vio_noprebuilt-vivado_2016.2-build_07_20161012121736.zip
Size
4x5 - form factor, like TE0820, TE0720, TE0715, TE0841, TE0741, TE0712, TE0711, ...
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- If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
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Other Files (0 Files)
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SC-PGM-TE701-01_FMC1V8-01_20150831.zip.zip
Size
Source Code of CPLD Firmware (1 Files) SC-PRJ-TE701-01_E7010101-01_20150615.zip.zip
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Other Files (0 Files)
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REV02 - PCB Revision: Schematics, AD, STEP, HW Design Files and more ...
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-
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Size
Assembly Diagrams (1 Files) AD-TE0701-02.PDF
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3D PDF (2 Files) 3D-TE0701-02.PDF 3D angled view
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3D-TE0701-02.top.PDF 3D top view
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Other Files (0 Files)
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Trace Lengths (0 Files) Altium Project and Libraries (0 Files) Electronic Design Interchange Format(EDIF) (0 Files) Gerber Files (0 Files) Other Files (0 Files)
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Assembly Diagrams (1 Files) AD-TE0701-03.PDF Assembly diagram
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3D PDF (2 Files) 3D-TE0701-03-TOP.PDF
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3D-TE0701-03.PDF
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Source Code of CPLD Firmware (1 Files) SC-PRJ-TE701-03_Development-01_20140618.zip
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TE0701-03-top.JPG
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REV04 - PCB Revision: Schematics, AD, STEP, HW Design Files and more ...
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Schematics (1 Files) SCH-TE0701-04.PDF
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Assembly Diagrams (1 Files) AD-TE0701-04.PDF
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3D PDF (0 Files) Other Files (0 Files)
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Source Code of CPLD Firmware (0 Files) Other Files (0 Files)
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REV05 - PCB Revision: Schematics, AD, STEP, HW Design Files and more ...
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Schematics (1 Files) SCH-TE0701-05.PDF Schematic diagram
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Assembly Diagrams (1 Files) AD-TE0701-05.PDF Assembly diagram
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3D PDF (0 Files) Other Files (0 Files)
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Source Code of CPLD Firmware (0 Files) Other Files (0 Files)
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Trace Lengths (1 Files) TL-TE0701-05.zip
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Altium Project and Libraries (0 Files) Electronic Design Interchange Format(EDIF) (0 Files) Gerber Files (1 Files) GB-TE0701-05.zip Hardware source files:
- Gerber files
- NC (numerical control) drill files
Size
Other Files (1 Files)
- Altium Designer: Project file
- Altium Designer: schematic diagram
- Altium Designer: PCB layout
- Altium Designer: output job configuration file
Size
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TE0701-05_top.jpg
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REV06 - PCB Revision: Schematics, AD, STEP, HW Design Files and more ...
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Size
Schematics (2 Files) SCH-TE0701-06.PDF
Size
SCH-TE0701-06C10.PDF
Size
Assembly Diagrams (2 Files) AD-TE0701-06.PDF
Size
AD-TE0701-06C10.PDF
Size
3D PDF (3 Files) 3DB-TE0701-06.PDF
Size
3DT-TE0701-06.PDF
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PDF3D-TE0701-06.PDF
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Source Code of CPLD Firmware (1 Files) SC-PRJ-TE701-06_CC701-05_20161122.zip
Size
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Trace Lengths (0 Files) Altium Project and Libraries (1 Files) AP-TE0701-06.zip
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Electronic Design Interchange Format(EDIF) (1 Files) EDIF-TE0701-06.zip
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Gerber Files (0 Files) Other Files (0 Files)
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TE0701-06 bottom.jpg
Size
TE0701-06 top.jpg
Size
TE0703 - Carrierboard for 4x5 modules
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Schematics (1 Files) SCH-TE0703-01.PDF Schematic diagram
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Assembly Diagrams (1 Files) AD-TE0703-01.PDF Assembly diagram
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3D PDF (0 Files) Other Files (0 Files)
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TE0703-00-top.jpg
Size
REV02 - PCB Revision: Schematics, AD, STEP, HW Design Files and more ...
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Schematics (1 Files) SCH-TE0703-02.PDF Schematic diagram
Size
Assembly Diagrams (1 Files) AD-TE0703-02.PDF Assembly diagram
Size
3D PDF (0 Files) Other Files (0 Files)
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Source Code of CPLD Firmware (1 Files) SC-PRJ-TE703-02030405_CC0703S-02_20171013.zip
Size
Other Files (0 Files)
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If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
- If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
- Please read the Legal Notices before downloading Trenz Electronics documents and files.
-
If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
Size
Schematics (1 Files) SCH-TE0703-03.PDF Schematic diagram
Size
Assembly Diagrams (1 Files) AD-TE0703-03.PDF Assembly diagram
Size
3D PDF (0 Files) Other Files (0 Files)
- Please read the Legal Notices before downloading Trenz Electronics documents and files.
-
If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
Size
SC-PGM-TE703-03_CCSpecial4x5-01_20150121.zip
Size
Source Code of CPLD Firmware (2 Files) SC-PRJ-TE703-02030405_CC0703S-02_20171013.zip
Size
SC-PRJ-TE703-03_Development-01_20151026.zip
Size
Other Files (0 Files)
- Please read the Legal Notices before downloading Trenz Electronics documents and files.
- Trenz Electronic use STEP-Models from different sources. Depending from model and soldering process the real dimension (especial maximum height) can be vary from the STEP-Models.
-
If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
Size
Other Files (1 Files) Pictures - PCB pictures
- Please read the Legal Notices before downloading Trenz Electronic documents and files.
-
If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
- If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
- Please read the Legal Notices before downloading Trenz Electronics documents and files.
-
If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
Size
Schematics (1 Files) SCH-TE0703-04.PDF Schematic diagram
Size
Assembly Diagrams (1 Files) AD-TE0703-04.PDF Assembly diagram
Size
3D PDF (0 Files) Other Files (0 Files)
- Please read the Legal Notices before downloading Trenz Electronics documents and files.
-
If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
Size
SC-PGM-TE703-04_CCSpecial4x5-01_20150121.zip
Size
Source Code of CPLD Firmware (2 Files) SC-PRJ-TE703-02030405_CC0703S-02_20171013.zip
Size
SC-PRJ-TE703-04_Development-01_20151026.zip
Size
Other Files (0 Files)
- Please read the Legal Notices before downloading Trenz Electronics documents and files.
- Trenz Electronic use STEP-Models from different sources. Depending from model and soldering process the real dimension (especial maximum height) can be vary from the STEP-Models.
-
If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
Size