Pmod OLED: 128 x 32 Pixel Monochromatic OLED Display

Pmod OLED: 128 x 32 Pixel Monochromatic OLED Display

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Flexible peripheral modules for all your designs Pmod™ devices are Digilent’s... more

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Product information "Pmod OLED: 128 x 32 Pixel Monochromatic OLED Display"

Flexible peripheral modules for all your designs

Pmod™ devices are Digilent’s line of small I/O interface boards that offer an ideal way to extend the capabilities of programmable logic and embedded control boards. They allow sensitive signal conditioning circuits and high-power drive circuits to be placed where they are most effective - near sensors and actuators.

Pmod modules communicate with system boards using 6, 8, or 12-pin connectors that can carry multiple digital control signals, including SPI and other serial protocols. Pmod modules allow for more effective designs by routing analog signals and power supplies only where they are needed, and away from digital controller boards.

Overview Pmod OLED

The Pmod OLED is 128x32 pixel monochrome organic LED (OLED) panel powered by the Solomon Systech SSD1306. Users can display any sort of graphical design by programing the device through SPI as well as sending bitmap images.

The Pmod OLED uses a standard 12-pin connector to display output on a 128 x 32 pixel organic LED (OLED) panel. The graphic display panel uses the Solomon Systech SSD1306 display controller. An SPI interface is used to configure the display, as well as to send the bitmap data to the device. The Pmod OLED displays the last image drawn on the screen until it is powered down or a new image is drawn to the display. Refreshing and updating is handled internally.

Features

128×32 pixel graphic OLED display
Clock speeds of up to 10 MHz
Internal display buffer
16 different brightness settings
Small PCB size for flexible designs
12-pin Pmod connector with SPI interface

Scope of Delivery

1 x Pmod OLED in a custom antistatic Pmod packaging

Pmod Hardware Compatibility Guide

Digilent's guide about determining hardware compatibility.

References

Manufacturer: Digilent Inc.
Manufacturer's article name: PmodOLED: 128 x 32 Pixel Monochromatic OLED Display
Manufacturer's article number: 410-222

Resources

Other Digilent products are available on request.

Related links to "Pmod OLED: 128 x 32 Pixel Monochromatic OLED Display"

Downloads

File	File-Extension	Description
Bit-File	*.bit	FPGA Configuration File
Diverse Reports	--	Report files in different formats

Component	Description
IP-Interfaces	I2C, ASIO (AXI-Stream to IO), SPI-Flash, Uart

Application	Description
hello_world	Xilinx Hello World Example

File	File-Extension	Description
MCS-File	*.mcs	Flash Configuration File with Boot-Image (MicroBlaze or FPGA part only)
Bit-File	*.bit	FPGA Configuration File
Software-Application-File	*.elf	Software Application for Zynq or MicroBlaze Processor Systems
Hardware-Platform-Specification-Files	*.hdf	Hardware Specification from the vivado project. Used in SDK/HSI
MMI-File	*.mmi	File with BRAM-Location to generate MCS or BIT-File with *.elf content (MicroBlaze only)
Diverse Reports	--	Report files in different formats

Component	Description
Xilinx-IP	I2C,SPI-Flash,UART
TE-IP	ASIO (AXI-Stream to IO)

Application	Description
hello_world	Xilinx Hello World Example

File	File-Extension	Description
MCS-File	*.mcs	Flash Configuration File with Boot-Image (MicroBlaze or FPGA part only)
BIT-File	*.bit	FPGA Configuration File
Software-Application-File	*.elf	Software Application for Zynq or MicroBlaze Processor Systems
Hardware-Platform-Specification-Files	*.hdf	Exported Vivado Hardware Specification for SDK/HSI
MMI-File	*.mmi	File with BRAM-Location to generate MCS or BIT-File with *.elf content (MicroBlaze only)
Diverse Reports	--	Report files in different formats

Component	Description
Xilinx-IP	VIO
TE-IP	Startupe2,LabTools Frequency Counter

File	File-Extension	Description
BIT-File	*.bit	FPGA Configuration File
DebugProbes-File	*.ltx	Definition File for Vivado/Vivado Labtools Debugging Interface
Diverse Reports	---	Report files in different formats
LabTools Project-File	*.lpr	Vivado Labtools Project File

Component	Description
Xilinx-IP	VIO (Virtual Input/Output)
TE-IP	Labtools Frequency Counter, Startupe2 Primitive Wrapper

File	File-Extension	Description
BIT-File	*.bit	FPGA Configuration File
DebugProbes-File	*.ltx	Definition File for Vivado/Vivado Labtools Debugging Interface
Diverse Reports	---	Report files in different formats
LabTools Project-File	*.lpr	Vivado Labtools Project File
MCS-File	*.mcs	Flash Configuration File with Boot-Image (MicroBlaze or FPGA part only)

Directory	Content
PCN	Product change notifications: Important changes between hardware revisions
Reference Design	Reference Designs sort by ISE/EDK Version
REV0x	Documents and source files sorted by PCB revision. Connector Pinout Viewer/XDC-Generator available on TE Master Pinout, as well as a additional informations on All Trenz Electronic SoMs
	Documents	PDF documents, like Technical Reference Manual, Schematics, Assembly Diagrams and...
	Firmware	Initial configuration for diverse PCB components, like CPLD, PLL and ...
	HW Design	Relevant files for PCB-Design, like PCB-STEP-Model, Cooler-STEP-Model, Trace-length, Altium libraries / projects (only for selected carrier boards), and ...
	Pictures	PCB-Pictures

Directory	Content
PCN	Product change notifications: Important changes between hardware revisions
REV0x	Documents and source files sorted by PCB revision. Connector Pinout Viewer/XDC-Generator available on TE Master Pinout, as well as a additional informations on All Trenz Electronic SoMs
	Documents	PDF documents, like Technical Reference Manual, Schematics, Assembly Diagrams and...
	Firmware	Initial configuration for diverse PCB components, like CPLD, PLL and ...
	HW Design	Relevant files for PCB-Design, like PCB-STEP-Model, Cooler-STEP-Model, Trace-length, Altium libraries / projects (only for selected carrier boards), and ...
	Pictures	PCB-Pictures

Component	Description
Interface IPs	DDR3, GPIO, Uart0, QSPI and Ethernet

Application	Description
hello_world	Xilinx Hello World Example (.elf file only)

File	File-Extension	Description
MCS-File	*.mcs	Flash Configuration File with Boot-Image (MicroBlaze or FPGA part only)
Bit-File	*.bit	FPGA Configuration File
Software-Application-File	*.elf	Software Application for Zynq or MicroBlaze Processor Systems
Hardware-Platform-Specification-Files	*.hdf	Hardware Specification from the vivado project. Used in SDK/HSI
MMI-File	*.mmi	File with BRAM-Location to generate MCS or BIT-File with *.elf content (MicroBlaze only)
Diverse Reports	--	Report files in different formats

Component	Description
Xilinx-IP	MicroBlaze, MB-Debug, Uartlite, MIG7 for DDR3, QSPI, Timer, Ethernet Lite
TE-IP	ASIO GPIO (AXI-Stream to GPIO)

Application	Description
Hello World	Xilinx Hello world ( generate elf file only)

File	File-Extension	Description
MCS-File	*.mcs	Flash Configuration File with Boot-Image (MicroBlaze or FPGA part only)
BIT-File	*.bit	FPGA Configuration File
Software-Application-File	*.elf	Software Application for Zynq or MicroBlaze Processor Systems
Hardware-Platform-Specification-Files	*.hdf	Exported Vivado Hardware Specification for SDK/HSI
MMI-File	*.mmi	File with BRAM-Location to generate MCS or BIT-File with *.elf content (MicroBlaze only)
Diverse Reports	--	Report files in different formats

Component	Description
Xilinx-IP	VIO,ILA
TE-IP	unio_mac

File	File-Extension	Description
BIT-File	*.bit	FPGA Configuration File
DebugProbes-File	*.ltx	Definition File for Vivado/Vivado Labtools Debugging Interface
Diverse Reports	---	Report files in different formats
Hardware-Platform-Specification-Files	*.hdf	Exported Vivado Hardware Specification for SDK/HSI
LabTools Project-File	*.lpr	Vivado Labtools Project File

Component	Description
Interface IPs	QSPI, Uart, ASIO (Axi-Stream to IO)

Application	Description
hello_world	Xilinx Hello World Example

File	File-Extension	Description
MCS-File	*.mcs	Flash Configuration File with Boot-Image (MicroBlaze or FPGA part only)
Bit-File	*.bit	FPGA Configuration File
Software-Application-File	*.elf	Software Application for Zynq or MicroBlaze Processor Systems
Hardware-Platform-Specification-Files	*.hdf	Hardware Specification from the vivado project. Used in SDK/HSI
MMI-File	*.mmi	File with BRAM-Location to generate MCS or BIT-File with *.elf content (MicroBlaze only)
Diverse Reports	--	Report files in different formats

Component	Description
Xilinx-IP	ILA, VIO, CLK-Wizard
TE-IP	F32C, Vector_LED, UART_MON

File	File-Extension	Description
BIT-File	*.bit	FPGA Configuration File
DebugProbes-File	*.ltx	Definition File for Vivado/Vivado Labtools Debugging Interface
Diverse Reports	---	Report files in different formats
LabTools Project-File	*.lpr	Vivado Labtools Project File
MCS-File	*.mcs	Flash Configuration File with Boot-Image (MicroBlaze or FPGA part only)

Component	Description
IP-Interfaces	DDR3, QSPI, Uart, I2C, Ethernet, ASIO (AXI-Stream to IO)

Application	Description
hello_world	Xilinx Hello World Example (.elf only)

File	File-Extension	Description
MCS-File	*.mcs	Flash Configuration File with Boot-Image (MicroBlaze or FPGA part only)
Bit-File	*.bit	FPGA Configuration File
Software-Application-File	*.elf	Software Application for Zynq or MicroBlaze Processor Systems
Hardware-Platform-Specification-Files	*.hdf	Hardware Specification from the vivado project. Used in SDK/HSI
MMI-File	*.mmi	File with BRAM-Location to generate MCS or BIT-File with *.elf content (MicroBlaze only)
Diverse Reports	--	Report files in different formats

Component	Description
Xilinx-IP	AXI Timer, AXI Interrupt Controller,MIG, AXI QSPI, AXI Uart Lite, AXI I2C, AXI Ethernet Lite, VIO
TE-IP	ASIO (AXI-Stream to IO), labtools_fmeter

Application	Description
hello_world	Xilinx Hello World Example (.elf only)
te_spi_bootloader	SPI Bootloader (.elf only)

File	File-Extension	Description
MCS-File	*.mcs	Flash Configuration File with Boot-Image (MicroBlaze or FPGA part only)
BIT-File	*.bit	FPGA Configuration File
Software-Application-File	*.elf	Software Application for Zynq or MicroBlaze Processor Systems
Hardware-Platform-Specification-Files	*.hdf	Exported Vivado Hardware Specification for SDK/HSI
MMI-File	*.mmi	File with BRAM-Location to generate MCS or BIT-File with *.elf content (MicroBlaze only)
Diverse Reports	--	Report files in different formats

Component	Description
Xilinx-IP	AXI Timer, AXI Interrupt Controller,MIG, AXI QSPI, AXI Uart Lite, AXI I2C, AXI Ethernet Lite

Application	Description
hello_world	Xilinx Hello World Example (.elf only)
memory_tests	Xilinx Memory Example (.elf only)

File	File-Extension	Description
BIT-File	*.bit	FPGA Configuration File
Diverse Reports	---	Report files in different formats
Hardware-Platform-Specification-Files	*.hdf	Exported Vivado Hardware Specification for SDK/HSI
LabTools Project-File	*.lpr	Vivado Labtools Project File
MCS-File	*.mcs	Flash Configuration File with Boot-Image (MicroBlaze or FPGA part only)
MMI-File	*.mmi	File with BRAM-Location to generate MCS or BIT-File with *.elf content (MicroBlaze only)
Software-Application-File	*.elf	Software Application for Zynq or MicroBlaze Processor Systems

Component	Description
Zynq Processor	activated MIO-Interfaces: DDR3, QSPI, GPIO,2x Uart, QSPI,2x I2C,2x SD,1x Ethernet

Application	Description
zynq_fsbl	Zynq First Stage Bootloader (for hdmi modified and provided as library in /sw_lib/)
hello_world	Xilinx Hello World Example

File	File-Extension	Description
Bin-File	*.bin	Flash Configuration File with Boot-Image for Zynq-FPGAs
Bit-File	*.bit	FPGA Configuration File
Software-Application-File	*.elf	Software Application for Zynq or MicroBlace Processor Systems
Hardware-Platform-Specification-Files	*.hdf	Hardware Specification from the vivado project. Used in SDK/HSI
BIF-File	*.bif	File with description to generate Bin-File
OS-Image	*.ub	Image with Linux Kernel (On Petalinux optional with Devicetree and RAM-Disk)
Diverse Reports	--	Report files in different formats