GigaBee with AMD Spartan™ 6 LX100-2C, 2 x 512 MByte DDR3L, 4 x 5 cm

GigaBee with AMD Spartan™ 6 LX100-2C, 2 x 512 MByte DDR3L, 4 x 5 cm

€329.00 (391.51 € gross) *

Prices plus VAT plus shipping costs

expected to be available on 05-Jul-2024

Order number: TE0600-04-72C21-A
In Stock: 0
Standard leadtime (weeks): 30
Article status: Full production

Quantity	Unit price
To 9	€329.00 (391.51 € gross) *
From 10	€296.10 (352.36 € gross) *
From 25	€279.65 (332.78 € gross) *
From 50	€263.20 (313.21 € gross) *
From 100	€246.75 (293.63 € gross) *
From 250	€230.30 (274.06 € gross) *
From 500	€213.85 (254.48 € gross) *
From 1000	€197.40 (234.91 € gross) *

This product is not always in stock, but will be produced on customer order (on demand).... more

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Product information "GigaBee with AMD Spartan™ 6 LX100-2C, 2 x 512 MByte DDR3L, 4 x 5 cm"

This product is not always in stock, but will be produced on customer order (on demand).
Please ask for any minimum quantities.

The predecessor of this article is TE0600-03-72C21-A. All changes are in the Product Change Notification (PCN).

The Trenz Electronic TE0600-04-72C21-A is an commercial temperature range FPGA micromodule integrating a AMD Spartan™ 6 LX100 FPGA, Gigabit Ethernet transceiver (physical layer), two independent banks of 16-bit-wide 512 MBytes DDR3 SDRAM, 16 MBytes SPI Flash memory for configuration and operation, and powerful switch-mode power supplies for all on-board voltages. A large number of configurable I/O's is provided via robust board-to-board (B2B) connectors.

All this on a tiny footprint, smaller than a credit card, at the most competitive price. Modules in 4 x 5 cm form factor are fully mechanically and largely electrically compatible among each other.

All parts are at least commercial temperature range of 0°C to +70°C. The module operating temperature range depends on customer design and cooling solution. Please contact us for options.

Key Features

AMD Spartan™ 6 XC6SLX100-2FGG484C FPGA
10/100/1000 tri-speed Gigabit Ethernet transceiver (PHY)
2 x 4 Gbit (512 MByte) DDR3L SDRAM
128 Mbit (16 MByte) serial Flash memory with dual/quad SPI-Interface (for configuration and operation), accessible through:
- 1 kb protected 1-Wire EEPROM with SHA-1 Engine
JTAG port (SPI indirect)
FPGA configuration through:
- B2B connector
- JTAG port
- SPI Flash memory
Plug-on module with 2 × 100-pin high-speed hermaphroditic strips
Up to 52 differential, up to 109 single-ended (+ 1 dual-purpose) FPGA I/O pins available on B2B strips
6.0 A x 1.2 V power rail
3.0 A x 1.5 V power rail
2x 1A x 2.5V power rail
125 MHz reference clock signal
Single-ended custom oscillator (option)
eFUSE bit-stream encryption (LX100 or larger)
1 user LED
Evenly-spread supply pins for good signal integrity
Size: 4 x 5 cm

Other assembly options for cost or performance optimization plus high volume prices available on request.

Recommended Software

for Trenz Electronic modules with Spartan™ 6 LX100/LX150

ISE Design Suite (purchase of a software license is necessary)

ISE design suite supports the Spartan™ 6, Virtex-6, and CoolRunner devices, as well as their previous generation families. ISE design suite runs on Windows XP/7/Server and Linux operating systems. Additionally, ISE supports Spartan™ 6 devices on Windows 10.

Download and further information:

https://www.xilinx.com/products/design-tools/ise-design-suite.html

Development Support

There is a base board available for this module.

Latest documentation, design support files and reference designs with source files are available for download free of charge.

Applications

Industrial networks
Vehicle networking and connectivity
High-resolution videos and graphics

Scope of Delivery

1 x TE0600-04-72C21-A Trenz Electronic GigaBee module with AMD Spartan™ 6 FPGA
8 x screws
4 x bolts

Additional Information

Manufacturer's article number: TE0600-04-72C21-A
Trenz Electronic TE0600 Wiki
Support Forum

All modules produced by Trenz Electronic are developed and manufactured in Germany.

The online pictures of this product are not a legally binding offer, but are symbol pictures for illustration and presentation only.

Related links to "GigaBee with AMD Spartan™ 6 LX100-2C, 2 x 512 MByte DDR3L, 4 x 5 cm"

Downloads

File	File-Extension	Description
Bit-File	*.bit	FPGA Configuration File
Diverse Reports	--	Report files in different formats

Component	Description
IP-Interfaces	I2C, ASIO (AXI-Stream to IO), SPI-Flash, Uart

Application	Description
hello_world	Xilinx Hello World Example

File	File-Extension	Description
MCS-File	*.mcs	Flash Configuration File with Boot-Image (MicroBlaze or FPGA part only)
Bit-File	*.bit	FPGA Configuration File
Software-Application-File	*.elf	Software Application for Zynq or MicroBlaze Processor Systems
Hardware-Platform-Specification-Files	*.hdf	Hardware Specification from the vivado project. Used in SDK/HSI
MMI-File	*.mmi	File with BRAM-Location to generate MCS or BIT-File with *.elf content (MicroBlaze only)
Diverse Reports	--	Report files in different formats

Component	Description
Xilinx-IP	I2C,SPI-Flash,UART
TE-IP	ASIO (AXI-Stream to IO)

Application	Description
hello_world	Xilinx Hello World Example

File	File-Extension	Description
MCS-File	*.mcs	Flash Configuration File with Boot-Image (MicroBlaze or FPGA part only)
BIT-File	*.bit	FPGA Configuration File
Software-Application-File	*.elf	Software Application for Zynq or MicroBlaze Processor Systems
Hardware-Platform-Specification-Files	*.hdf	Exported Vivado Hardware Specification for SDK/HSI
MMI-File	*.mmi	File with BRAM-Location to generate MCS or BIT-File with *.elf content (MicroBlaze only)
Diverse Reports	--	Report files in different formats

Component	Description
Xilinx-IP	VIO
TE-IP	Startupe2,LabTools Frequency Counter

File	File-Extension	Description
BIT-File	*.bit	FPGA Configuration File
DebugProbes-File	*.ltx	Definition File for Vivado/Vivado Labtools Debugging Interface
Diverse Reports	---	Report files in different formats
LabTools Project-File	*.lpr	Vivado Labtools Project File

Component	Description
Xilinx-IP	VIO (Virtual Input/Output)
TE-IP	Labtools Frequency Counter, Startupe2 Primitive Wrapper

File	File-Extension	Description
BIT-File	*.bit	FPGA Configuration File
DebugProbes-File	*.ltx	Definition File for Vivado/Vivado Labtools Debugging Interface
Diverse Reports	---	Report files in different formats
LabTools Project-File	*.lpr	Vivado Labtools Project File
MCS-File	*.mcs	Flash Configuration File with Boot-Image (MicroBlaze or FPGA part only)

Directory	Content
PCN	Product change notifications: Important changes between hardware revisions
Reference Design	Reference Designs sort by ISE/EDK Version
REV0x	Documents and source files sorted by PCB revision. Connector Pinout Viewer/XDC-Generator available on TE Master Pinout, as well as a additional informations on All Trenz Electronic SoMs
	Documents	PDF documents, like Technical Reference Manual, Schematics, Assembly Diagrams and...
	Firmware	Initial configuration for diverse PCB components, like CPLD, PLL and ...
	HW Design	Relevant files for PCB-Design, like PCB-STEP-Model, Cooler-STEP-Model, Trace-length, Altium libraries / projects (only for selected carrier boards), and ...
	Pictures	PCB-Pictures

Directory	Content
PCN	Product change notifications: Important changes between hardware revisions
REV0x	Documents and source files sorted by PCB revision. Connector Pinout Viewer/XDC-Generator available on TE Master Pinout, as well as a additional informations on All Trenz Electronic SoMs
	Documents	PDF documents, like Technical Reference Manual, Schematics, Assembly Diagrams and...
	Firmware	Initial configuration for diverse PCB components, like CPLD, PLL and ...
	HW Design	Relevant files for PCB-Design, like PCB-STEP-Model, Cooler-STEP-Model, Trace-length, Altium libraries / projects (only for selected carrier boards), and ...
	Pictures	PCB-Pictures

Component	Description
Interface IPs	DDR3, GPIO, Uart0, QSPI and Ethernet

Application	Description
hello_world	Xilinx Hello World Example (.elf file only)

File	File-Extension	Description
MCS-File	*.mcs	Flash Configuration File with Boot-Image (MicroBlaze or FPGA part only)
Bit-File	*.bit	FPGA Configuration File
Software-Application-File	*.elf	Software Application for Zynq or MicroBlaze Processor Systems
Hardware-Platform-Specification-Files	*.hdf	Hardware Specification from the vivado project. Used in SDK/HSI
MMI-File	*.mmi	File with BRAM-Location to generate MCS or BIT-File with *.elf content (MicroBlaze only)
Diverse Reports	--	Report files in different formats

Component	Description
Xilinx-IP	MicroBlaze, MB-Debug, Uartlite, MIG7 for DDR3, QSPI, Timer, Ethernet Lite
TE-IP	ASIO GPIO (AXI-Stream to GPIO)

Application	Description
Hello World	Xilinx Hello world ( generate elf file only)

File	File-Extension	Description
MCS-File	*.mcs	Flash Configuration File with Boot-Image (MicroBlaze or FPGA part only)
BIT-File	*.bit	FPGA Configuration File
Software-Application-File	*.elf	Software Application for Zynq or MicroBlaze Processor Systems
Hardware-Platform-Specification-Files	*.hdf	Exported Vivado Hardware Specification for SDK/HSI
MMI-File	*.mmi	File with BRAM-Location to generate MCS or BIT-File with *.elf content (MicroBlaze only)
Diverse Reports	--	Report files in different formats

Component	Description
Xilinx-IP	VIO,ILA
TE-IP	unio_mac

File	File-Extension	Description
BIT-File	*.bit	FPGA Configuration File
DebugProbes-File	*.ltx	Definition File for Vivado/Vivado Labtools Debugging Interface
Diverse Reports	---	Report files in different formats
Hardware-Platform-Specification-Files	*.hdf	Exported Vivado Hardware Specification for SDK/HSI
LabTools Project-File	*.lpr	Vivado Labtools Project File

Component	Description
Interface IPs	QSPI, Uart, ASIO (Axi-Stream to IO)

Application	Description
hello_world	Xilinx Hello World Example

File	File-Extension	Description
MCS-File	*.mcs	Flash Configuration File with Boot-Image (MicroBlaze or FPGA part only)
Bit-File	*.bit	FPGA Configuration File
Software-Application-File	*.elf	Software Application for Zynq or MicroBlaze Processor Systems
Hardware-Platform-Specification-Files	*.hdf	Hardware Specification from the vivado project. Used in SDK/HSI
MMI-File	*.mmi	File with BRAM-Location to generate MCS or BIT-File with *.elf content (MicroBlaze only)
Diverse Reports	--	Report files in different formats

Component	Description
Xilinx-IP	ILA, VIO, CLK-Wizard
TE-IP	F32C, Vector_LED, UART_MON

File	File-Extension	Description
BIT-File	*.bit	FPGA Configuration File
DebugProbes-File	*.ltx	Definition File for Vivado/Vivado Labtools Debugging Interface
Diverse Reports	---	Report files in different formats
LabTools Project-File	*.lpr	Vivado Labtools Project File
MCS-File	*.mcs	Flash Configuration File with Boot-Image (MicroBlaze or FPGA part only)

Component	Description
IP-Interfaces	DDR3, QSPI, Uart, I2C, Ethernet, ASIO (AXI-Stream to IO)

Application	Description
hello_world	Xilinx Hello World Example (.elf only)

File	File-Extension	Description
MCS-File	*.mcs	Flash Configuration File with Boot-Image (MicroBlaze or FPGA part only)
Bit-File	*.bit	FPGA Configuration File
Software-Application-File	*.elf	Software Application for Zynq or MicroBlaze Processor Systems
Hardware-Platform-Specification-Files	*.hdf	Hardware Specification from the vivado project. Used in SDK/HSI
MMI-File	*.mmi	File with BRAM-Location to generate MCS or BIT-File with *.elf content (MicroBlaze only)
Diverse Reports	--	Report files in different formats

Component	Description
Xilinx-IP	AXI Timer, AXI Interrupt Controller,MIG, AXI QSPI, AXI Uart Lite, AXI I2C, AXI Ethernet Lite, VIO
TE-IP	ASIO (AXI-Stream to IO), labtools_fmeter

Application	Description
hello_world	Xilinx Hello World Example (.elf only)
te_spi_bootloader	SPI Bootloader (.elf only)

File	File-Extension	Description
MCS-File	*.mcs	Flash Configuration File with Boot-Image (MicroBlaze or FPGA part only)
BIT-File	*.bit	FPGA Configuration File
Software-Application-File	*.elf	Software Application for Zynq or MicroBlaze Processor Systems
Hardware-Platform-Specification-Files	*.hdf	Exported Vivado Hardware Specification for SDK/HSI
MMI-File	*.mmi	File with BRAM-Location to generate MCS or BIT-File with *.elf content (MicroBlaze only)
Diverse Reports	--	Report files in different formats

Component	Description
Xilinx-IP	AXI Timer, AXI Interrupt Controller,MIG, AXI QSPI, AXI Uart Lite, AXI I2C, AXI Ethernet Lite

Application	Description
hello_world	Xilinx Hello World Example (.elf only)
memory_tests	Xilinx Memory Example (.elf only)

File	File-Extension	Description
BIT-File	*.bit	FPGA Configuration File
Diverse Reports	---	Report files in different formats
Hardware-Platform-Specification-Files	*.hdf	Exported Vivado Hardware Specification for SDK/HSI
LabTools Project-File	*.lpr	Vivado Labtools Project File
MCS-File	*.mcs	Flash Configuration File with Boot-Image (MicroBlaze or FPGA part only)
MMI-File	*.mmi	File with BRAM-Location to generate MCS or BIT-File with *.elf content (MicroBlaze only)
Software-Application-File	*.elf	Software Application for Zynq or MicroBlaze Processor Systems

Component	Description
Zynq Processor	activated MIO-Interfaces: DDR3, QSPI, GPIO,2x Uart, QSPI,2x I2C,2x SD,1x Ethernet

Application	Description
zynq_fsbl	Zynq First Stage Bootloader (for hdmi modified and provided as library in /sw_lib/)
hello_world	Xilinx Hello World Example

Digilent
OHO-Elektronik
SunDance
Trenz_Electronic - Documents and Design files for Trenz Electronic Products
inrevium
reference

Name	Folder	Description
Source Name	<design_name><folder>	Source Description
PetaLinux Project	<design_name>/os/petalinux	PetaLinux Project with Ethernet,USB,RTC

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