Prices plus VAT plus shipping costs
expected to be available on 15-Nov-2024
- Order number: TE0714-04-42I-7-L
- In Stock: 0
- Standard leadtime (weeks): 20
- Article status: Full production
Quantity | Unit price |
---|---|
To 9 | €104.00 (123.76 € gross) * |
From 10 | €93.60 (111.38 € gross) * |
From 25 | €88.40 (105.20 € gross) * |
From 50 | €83.20 (99.01 € gross) * |
From 100 | €78.00 (92.82 € gross) * |
From 250 | €72.80 (86.63 € gross) * |
From 500 | €67.60 (80.44 € gross) * |
From 1000 | €62.40 (74.26 € gross) * |
The predecessor is offered at a reduced price in the sales section.
Only valid while stocks last!
The predecessor of this article is TE0714-03-35-2I3. All changes are in the Product Change Notification (PCN).
This module is identical to variant TE0714-04-42I-7-B except the lower 2.5 mm Samtec connectors.
The Trenz Electronic TE0714-04-42I-7-L is an industrial-grade FPGA module integrating a AMD/Xilinx Artix™ 7 35T, 16 MByte QSPI Flash memory for configuration and operation and powerful switch-mode power supplies for all on-board voltages. A large number of configurable I/O's is provided via rugged high-speed stacking strips.
All this on a tiny footprint, smaller than half a credit card, at the most competitive price.
All parts are at least industrial temperature range of -40°C to +85°C. The module operating temperature range depends on customer design and cooling solution. Please contact us for options.
Key Features
- AMD/Xilinx Artix™ 7 XC7A35T-2CSG325I
- Rugged for high shock and vibration
- 16 MByte QSPI Flash memory
- Differential MEMS oscillator for MGT clocking
- MEMS oscillator for PL clocks (optional)
- Plug-on module with 2 × 100-pin high-speed hermaphroditic strips (low profile)
- 138 FPGA I/O's (max 68 differential) +5 I/O's (QSPI or user I/O's)
- XADC Analog Input
- 4 GTP (high-performance transceiver) lanes
- GT reference clock inputs
- Optimized I/O and power pins for good signal integrity
- On-board high-efficiency DC-DC converters
- Power supply for all on-board components
- eFUSE bit-stream encryption (AES)
- One user configurable LED
- Size: 3 x 4 cm
Other assembly options for cost or performance optimization plus high volume prices available on request.
Recommended Software
Vivado ML Standard Edition (free version)
The Vivado ML Standard Edition is the FREE version of the Vivado design suite. Vivado ML Standard delivers instant access to some basic Vivado features and functionality at no cost.
Overview of all editions of Vivado MLDevelopment Support
There is a base board available for this module.
Latest documentation, design support files and reference designs with source files are available for download free of charge.
Scope of Delivery
- 1 x TE0714-04-42I-7-L Trenz Electronic FPGA module with AMD/Xilinx Artix™ 7 35T, low profile
Additional Information
- Manufacturer's article number: TE0714-04-42I-7-L
- Trenz Electronic TE0714 Wiki
- Support Forum
All modules produced by Trenz Electronic are developed and manufactured in Germany.
The online pictures of this product are not a legally binding offer, but are symbol pictures for illustration and presentation only.
23260-XUP-USB-JTAG
Files Xilinx AR36156 - Direct SPI Programming.pdf
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Xilinx configuration solutions.pdf
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Xilinx ds300 v3.2 - Platform Cable USB.pdf
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Xilinx xapp951 v1.3 - SPI Serial Flash.pdf
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23955-Electronic_Explorer_(EEBOARD)
Files ASEE 2011 Mihaela paper .pdf
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ASEE EE board EWU.pdf
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ASEE EE board U of I.pdf
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EEBoard-tutorial-DE-v1.1.pdf
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lab-at-home-ASEEE2011.pdf
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24084-VHDCI - VHDCI (a.k.a. VHDC): Nexys-3, Atlys, Genesys.
Files R-HI-008068-2_plug-male-mating.pdf
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R-HS-008068-2C_receptacle-female-on_board.pdf
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24243-ChipKIT-BASIC-IO-SHIELD
sample_projects
Files Oled_Temperature_Demo.zip
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24383-CEREBOT-MX7
Files Ethernet Reference Designs.pdf
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FreeRTOS Reference Designs.pdf
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MiWi Reference Designs.pdf
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PIC32 Reference Designs.pdf
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Professor Richard Wall.txt
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24496-Analog Discovery
Files Revolutionizing_How_Engineering_Students_Learn_Analog...Design.pdf
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25894-ChipKIT-STARTER-KIT
Files chipKIT Starter Kit - part list - draft.pdf
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chipKIT kit - project-descriptions - draft.pdf
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chipKIT kit - projects - draft.zip
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26261-NetFPGA-SUME
Files AV02-3399EN+DS+AFBR-709SMZ+25Jan2013%2C0.pdf
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NetFPGA SUME promotional sheet.pptx
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zilberman2014sume.pdf
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26702-NI-LabVIEW
Files LabVIEW Home Bundle product sheet.pptx
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LabVIEW Physical Computing Kit product sheet.pptx
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27069-Analog Discovery 2
Analog Discovery based LCR-Meter - Analog Discovery based LCR - Meter
The Analog_Discovery_Wrapper_DLL_Vers_2.zip contains
- Wrapper-DLL
- Source-Code
- Excel VBA Programs (Examples + LCR Meter)
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Digilent Introduction
Files Digilent Introduction.pdf
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Nexys 2 (retired) - Nexys-2 (Xilinx Spartan-3E FPGA Board)
Cortex-M0 Implementation in the Nexys2 FPGA Board – A Step by Step Guide
An Application Note has been written by Pedro Martos and Fabricio Baglivo from the Embedded Systems Laboratory in the School of Engineering at the University of Buenos Aires. It describes a basic implementation of the Cortex-M0_DS in an FPGA board. It’s intended as a starting point to build a system around the Cortex-M0_DS processor. It includes example hardware and software, and takes you through synthesizing the system, functional simulation, and hardware verification.
- Cortex-M0_DS Application Note and Deliverables (5.82 MB .zip file)
- Implementing the Cortex-M0 DesignStart Processor in a Low-end FPGA, Oct. 2010
- (Original work presented in Spanish at SASE 2011)
http://www.sase.com.ar/2011/tutoriales/implementing-the-cortex-m0-processor-in-fpga/ Files SASE2011-Implementacion-CortexM0-en-FPGA.pdf
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SASE2011_ImplementingTheCortexM0.zip
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SASE2011_ImplementingTheCortexM0DesignStartProcessorInALowEndFPGA.pdf
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Pmod
Files Connecting UART Pmod Interfaces.pdf
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Zrobot
pictures
Files Zrobot - camera.jpg
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Zrobot - crane.jpg
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Zrobot - webcam.jpg
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OHO-Elektronik
TE0250-GOP_XC9572XL
design_development
Files gop_xc9572xl_20.vhd
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gop_xc9572xl_24.vhd
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ucf_xc9572xl_20.ucf
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ucf_xc9572xl_24.ucf
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documents
Files UM_XC9572XL.pdf
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pictures
archive
Files GOP_XC9572XL.diagram.old.jpg
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GOP_XC9572XL.diagram.jpg
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GOP_XC9572XL.jpg
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GOP_XC9572XL.top.jpg
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reference_designs
Files GOP_XC9572XL.zip
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TE0251-GOP_XCR3064XL
design_development
Files gop_xcr3064xl_20.vhd
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gop_xcr3064xl_24.vhd
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ucf_xcr3064xl_24.ucf
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documents
Files UM_XCR3064XL.pdf
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pictures
Files TE0251-00_top.jpg
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reference_designs
Files GOP_XCR3064XL.zip
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TE0252-GOP_XC2C64
design_development
Files gop_xc2c64_20.vhd
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gop_xc2c64_24.vhd
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ucf_xc2c64_20.ucf
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ucf_xc2c64_24.ucf
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documents
Files UM_XC2C64.pdf
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pictures
Files GOP_XC2C64.bottom.jpg
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GOP_XC2C64.diagram.gif
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GOP_XC2C64.top.jpg
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reference_designs
Files GOP_XC2C64.zip
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TE0253-GOP_XC3S200
archive
Files GOP_XC3S200-v1.2old.pdf
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design_development
Files gop_xc3s200_20.vhd
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gop_xc3s200_24.vhd
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ucf_xc3s200_20.ucf
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ucf_xc3s200_24.ucf
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documentation
Files UM_XC3S200-v1.2.pdf
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pictures
Files GOP_XC3S200.TE.jpg
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OHO_DY1-XC3S200.jpg
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reference_designs
Files GOP_XC3S200.zip
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TE0259-GOPLCP
documents
Files UM_GOPLCP.pdf
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pictures
Files GOPLCP+GOP_XC3S200.jpg
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GOPLCP.jpg
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TE0260-GODIL
USB
Files TUSB3410 Single Driver Installer.zip
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archive
Files UM_GODIL-v090.pdf
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design_development
Files F03_E.page14.pdf
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GODIL40.ucf
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GODIL40.vhd
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GODIL48.ucf
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GODIL48.vhd
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documents
Files GODIL_SCH_BRD.pdf
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UM_GODIL-v091.pdf
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Working_with_the_GODIL.pdf
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archive
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THT socket.jpg
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TE0261-GODIL
USB
Files TUSB3410 Single Driver Installer.zip
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archive
Files UM_GODIL-v090.pdf
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design_development
Files F03_E.page14.pdf
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GODIL40.ucf
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GODIL40.vhd
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GODIL48.ucf
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GODIL48.vhd
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documents
Files GODIL_SCH_BRD.pdf
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UM_GODIL-v091.pdf
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Working_with_the_GODIL.pdf
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pictures
archive
Files GODIL50_XC3S250E.bottom.old.jpg
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THT plug.jpg
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THT socket.jpg
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TE0262-GODIL
USB
Files TUSB3410 Single Driver Installer.zip
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archive
Files UM_GODIL-v090.pdf
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design_development
Files F03_E.page14.pdf
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GODIL40.ucf
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GODIL40.vhd
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GODIL48.ucf
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GODIL48.vhd
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documents
Files GODIL_SCH_BRD.pdf
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UM_GODIL-v091.pdf
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Working_with_the_GODIL.pdf
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pictures
archive
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GODIL50_XC3S250E.top.old1.jpg
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Files F03_E.page14.jpg
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GODIL40_XC3S250E.diagram.wmf
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GODIL48_XC3S250E.diagram.500x738.gif
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GODIL_XCS3500E.top.jpg
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THT plug.jpg
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THT socket.jpg
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TE0265-OHO_DY1
archive
Files UM_OHO_DY1-v1.1.pdf
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documents
Files UM_OHO_DY1-v1.2.pdf
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pictures
Files OHO_DY1-XC3S200.jpg
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OHO_DY1.6pin.1.jpg
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OHO_DY1.6pin.jpg
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OHO_DY1.9pin.jpg
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OHO_DY1.jpg
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OHO_DY1.lab.jpg
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reference_designs
Files OHO_DY1_GODIL48_103.zip
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OHO_DY1_GOPXC3S200_103.zip
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OHO_DY1_S3A_103.zip
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OHO_DY1_S3D1800A_103.zip
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OHO_DY1_S3E_103.zip
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common
documents
Files PB-GOP_CPLDs.pdf
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PB-GOP_FPGA.pdf
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SunDance
26751-EMC2-DP
documents
Files EMC2-DP-block-diagram.pdf
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EMC2-DP-block-diagram.png
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about emc2 and emc2-dp solutions.pdf
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Trenz_Electronic - Documents and Design files for Trenz Electronic Products
- If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
- If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
Files Trenz Electronic Logo Vector.eps
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Trenz Electronic Logo sw.bmp
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Trenz Electronic Logo.bmp
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Trenz Electronic Logo.jpg
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Trenz Electronic Logo.png
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logob10b.gif
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Files 20230614 Trenz Electronic Image Presentation.pdf
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ISO 14001 Certificate 2024 EN.pdf
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ISO 14001 Zertifikat 2024 DE.pdf
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ISO 9001 Certificate 2024 EN.pdf
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ISO 9001 Zertifikat 2024 DE.pdf
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Trenz Electronic Flyer - Xilinx Products 2019.pdf
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Trenz_Electronic_Catalogue_2024_web.pdf
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Trenz_Electronic_Flyer_DINA3.pdf
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Trenz_Electronic_Flyer_DINA6.pdf
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-obsolete_products
25572 Heatsink for TE0720
documents
Files HH-FPGA-Heatsink_rev2.PDF
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HH-FPGA_heatsink_rev2_assembly_drawing.PDF
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pictures
Files Heatsink for TE0720.jpg
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IP
TE-USB
Files ev-51.zip
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ps-te51.pdf
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TE51
Files ds-usbSIE.pdf
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TE0115
TE-XC2S
Files an-XC2S-BL.pdf
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an-XC2S-BL.zip
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an-XC2S-GOL.pdf
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an-XC2S-GOL.zip
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an-XC2S-MB-USB.zip
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an-XC2S-USB.pdf
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an-XC2S-USB.zip
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an-XC2S-XR16.pdf
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an-XC2S-XR16.zip
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ps-TE-BL.pdf
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ps-TE-XC2S-01.pdf
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tc-XC2S-SoC-1.pdf
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tc-XC2S-SoC-2.pdf
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TE0126
Files TEprog.exe
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TEprog2MB.exe
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an-XC2SE-Demo.zip
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an-XC2SE-GOL.zip
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an-XC2SE-MB-USB.zip
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pbxc2se.pdf
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ps-TE-XC2Se.pdf
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TE0141
Files AD-TE0141-01.pdf
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SCH-TE0141-01.pdf
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UM-TE0141-01.pdf
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an-te0141-1st_steps.pdf
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an-te0141-1st_steps.zip
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TE0149
Files UM-TE0149-01.pdf
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TE0180
Files te0180-00.pdf
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te0180_schematics.pdf
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te0181-00.pdf
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aml91s100e
Files aoan001.pdf
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pbaml91s100e.pdf
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Files test.txt
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Accessories - Connectors, Heatsinks, ...
- If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
22684
Files DF17.pdf
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22938
Files DF17.pdf
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23749
Files 6110.pdf
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23758
Files 6060.pdf
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23836
Files LSHM-1XX-XX-X-DH-A-X-X-TR-MKT.pdf
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LSHM-1XX-XX.X-XX-DV-A-X-X-TR-MKT.pdf
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REF-189016-01.pdf
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REF-189016-02.pdf
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REF-189017-01.pdf
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REF-189017-02.pdf
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hsc-report_lshm-lshm-05mm_web.pdf
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hsc-report_lshm-lshm-12mm_web.pdf
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lshm-1xx-xx.x-x-dv-a-x-x-tr-footprint.pdf
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lshm.pdf
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micro_backplane_guide.pdf
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razor_beam.pdf
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tc0923--2523rev1_qua.pdf
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23838
Files LSHM-1XX-XX-X-DH-A-X-X-TR-MKT.pdf
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REF-189016-01.pdf
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hsc-report_lshm-lshm-05mm_web.pdf
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lshm.pdf
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micro_backplane_guide.pdf
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razor_beam.pdf
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tc0923--2523rev1_qua.pdf
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24264
Files 50110-xx.conn.ASE. rev-A.pdf
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24265
Files 50103-xx. 0.8.receptacle.ASE.. rev-O.pdf
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24851
Files ASP-134486-01.pdf
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ASP-134602-01.pdf
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Samtec_FMC_PwrRating.pdf
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rework_array.pdf
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searay_soldering1.pdf
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24903
Files LSHM-1XX-XX-X-DH-A-X-X-TR-MKT.pdf
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LSHM-1XX-XX.X-XX-DV-A-X-X-TR-MKT.pdf
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REF-189016-01.pdf
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REF-189017-02.pdf
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hsc-report_lshm-lshm-05mm_web.pdf
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hsc-report_lshm-lshm-12mm_web.pdf
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lshm-1xx-xx.x-x-dv-a-x-x-tr-footprint.pdf
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lshm.pdf
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micro_backplane_guide.pdf
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razor_beam.pdf
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tc0923--2523rev1_qua.pdf
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24996
Files ASP-134603-01.pdf
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24998
Files asp-134488-01-mkt.pdf
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seam-xx-xx.x-xx-xx-x-a-xx-k-tr-mkt.pdf
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26056
Files REF-189018-01.pdf
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TEMX-1XX-XX-XX.X-XX-D-XX-XX-FOOTPRINT.pdf
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TEMX-1XX-XX-XX.X-XX-D-XX-XX-MKT.pdf
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tem.pdf
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26125
Files LSHM-1XX-XX-X-DH-A-X-X-TR-MKT.pdf
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LSHM-1XX-XX.X-XX-DV-A-X-X-TR-MKT.pdf
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REF-189016-01.pdf
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REF-189017-02.pdf
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hsc-report_lshm-lshm-05mm_web.pdf
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hsc-report_lshm-lshm-12mm_web.pdf
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lshm-1xx-xx.x-x-dv-a-x-x-tr-footprint.pdf
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lshm.pdf
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micro_backplane_guide.pdf
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razor_beam.pdf
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tc0923--2523rev1_qua.pdf
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27219
Files REF-192552-01.pdf
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ss5-st5.pdf
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ss5-xx-x.xx-x-d-k-tr-mkt.pdf
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ss5.pdf
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Heatsinks
26920-Heatsink-TE0600
Files 26920-TE0600-02-2015-09-16.pdf
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26921-Heatsink-TE0741 - Heatspreader relevant files, like technical drawing and STEP-Model.
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Other Files (1 Files) 26922-Heatsink-TE0720 - Heatspreader relevant files, like technical drawing and STEP-Model.
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Files[-] Close all Mechanical Drawing (0 Files) Assembly Diagrams (0 Files) STEP Models (1 Files) STP-26922-TE0720-Heatsink.zip
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Other Files (1 Files) 26924-Heatsink-TE0712 - Heatspreader relevant files, like technical drawing and STEP-Model.
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Other Files (1 Files) 26925-Heatsink-TE0710
Files 26925-TE0710-2016-08-08.pdf
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STP-26925-TE0710-Heatsink.zip
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30832-Heatsink-TE0724 - Heatspreader relevant files, like technical drawing and STEP-Model.
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Other Files (1 Files) 33013-Heatsink-TE0741 - Heatspreader relevant files, like technical drawing and STEP-Model.
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STEP Models (1 Files) STP-33013 -Assembly EN - on TE0741-04,-05-Part.zip
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STEP Models (0 Files) Other Files (1 Files) 33338-Heatsink-TE0820 - Heatspreader relevant files, like technical drawing and STEP-Model.
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STEP Models (1 Files) STP-33338-TE0820-05.zip
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Other Files (0 Files)
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TE0424 - SFP 2 SATA Adapter
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TE042x_series - SFP Test Adapters
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TEC0106 - SFP 2 SMA Adapter
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CPCIS_Cards - CompactPCI Serial Standard compatible boards with FPGA/SoC device
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TEC0850 - Xilinx Zynq UltraScale+ FPGA CPCIS card
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PCN-20211125 TEC0850-03 Components Change.pdf
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Schematics (2 Files) SCH-TEC0850-02-15EG1E.PDF
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SCH-TEC0850-02-15EG1EA.PDF
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REV03 - PCB Revision: Schematics, AD, STEP, HW Design Files and more ...
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SCH-TEC0850-03-BBEX1-B.PDF
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Assembly Diagrams (5 Files) AD-TEC0850-03-15EG1E.PDF
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AD-TEC0850-03-15EG1EA.PDF
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AD-TEC0850-03-BBEX1-A.PDF
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Reference_Design - FPGA Design Examples for different Vivado Versions
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test_board - TEC0850 Basic Design
TEC0850 Basic Design
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CR00005 - CRUVI Low Speed to Pmod Adapter
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CR00025 - CRUVI Low Speed Host Slot
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CR00040 - CRUVI CO2 Sensor
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SCH-CR00040-01-40.PDF
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SCH-CR00040-01-41.PDF
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SCH-CR00040-01-default.PDF
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Assembly Diagrams (4 Files) AD-CR00040-01-0.PDF
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AD-CR00040-01-40.PDF
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AD-CR00040-01-41.PDF
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AD-CR00040-01-default.PDF
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CR00049 - CRUVI eMMC Extension
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3DT-CR00049-01.PDF
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CR00091 - CRUVI HS Loopback Adapter
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CR00100 - CRUVI MAX Baseboard for CRUVI Modules
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SCH-CR00100-01-FBC82A.PDF
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Assembly Diagrams (2 Files) AD-CR00100-01-DBC82A.PDF
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AD-CR00100-01-FBC82A.PDF
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3D PDF (2 Files) 3DB-CR00100-01-No Variations.PDF
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3DT-CR00100-01-No Variations.PDF
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Reference_Design - FPGA Design Examples for Intel Quartus Prime Suite
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test_board - CR00100 Basic Example
CR00100 Basic Example
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Project Files (2 Files) CR00100-test_board-quartus_20.1.1-20220225104254.zip
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CR00100-test_board_noprebuilt-quartus_20.1.1-20220225103813.zip
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test_board - CR00100 Basic Example
CR00100 Basic Example
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Assembly Diagrams (1 Files) AD-CR00101-01.PDF
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3D PDF (2 Files) 3DB-CR00101-01.PDF
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3DT-CR00101-01.PDF
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CR00103 - CRUVI Certus-NX Baseboard for CRUVI Modules
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Assembly Diagrams (1 Files) AD-CR00103-01-A.PDF
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3D PDF (2 Files) 3DB-CR00103-01-No Variations.PDF
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3DT-CR00103-01-No Variations.PDF
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REV02 - PCB Revision: Schematics, AD, STEP, HW Design Files and more ...
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Assembly Diagrams (1 Files) AD-CR00103-02-A.PDF
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3D PDF (2 Files) 3DB-CR00103-02-No Variations.PDF
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3DT-CR00103-02-No Variations.PDF
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REV03 - PCB Revision: Schematics, AD, STEP, HW Design Files and more ...
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Assembly Diagrams (1 Files) AD-CR00103-03-A.PDF
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3D PDF (2 Files) 3DB-CR00103-03-No Variations.PDF
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3DT-CR00103-03-No Variations.PDF
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Reference_Design - FPGA Design Examples for Lattice Radiant and Propel
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test_certus - CR00103 Test Certus
CR00103 Certus Test
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Assembly Diagrams (1 Files) AD-CR00107-01.PDF
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3D PDF (3 Files) 3DB-CR00107-01.PDF
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3DT-CR00107-01.PDF
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PDF3D-CR00107-01.PDF
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Reference_Design - FPGA Design Examples for different Vivado Versions
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Assembly Diagrams (1 Files) AD-CR00111-01.PDF
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3D PDF (2 Files) 3DB-CR00111-01.PDF
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3DT-CR00111-01.PDF
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PCN-20210608 CR00140-02 Kit SoM Update.pdf
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PCN-20240209 CR00140-02 Kit SoM Update.pdf
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Schematics (1 Files) SCH-CR00140-02-default.PDF
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Assembly Diagrams (1 Files) AD-CR00140-02-default.PDF
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3D PDF (3 Files) 3DB-CR00140-02-No Variations.PDF
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3DT-CR00140-02-No Variations.PDF
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PDF3D-CR00140-02-No Variations.PDF
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Other Files (1 Files) Firmware - Initial Configuration for diverse PCB components, like CPLD, PLL and ...
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Source Code of CPLD Firmware (0 Files) Other Files (0 Files)
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CR00200 - CRUVI ETH
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PCN-20210608 CR00140-02 Kit SoM Update.pdf
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Assembly Diagrams (1 Files) AD-CR00200-01.PDF
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3D PDF (3 Files) 3DB-CR00200-01.PDF
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3DT-CR00200-01.PDF
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PDF3D-CR00200-01.PDF
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PCN-20210608 CR00140-02 Kit SoM Update.pdf
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Assembly Diagrams (1 Files) AD-CR00202-01.PDF
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3D PDF (2 Files) 3DB-CR00202-01.PDF
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3DT-CR00202-01.PDF
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Assembly Diagrams (1 Files) AD-CR00240-01-P001.PDF
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3D PDF (2 Files) 3DB-CR00240-01-No Variations.PDF
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3DT-CR00240-01-No Variations.PDF
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CR00300 - CRUVI HS to FFC Adapter
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Assembly Diagrams (1 Files) AD-CR00300-01-Default.PDF
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3D PDF (2 Files) 3DB-CR00300-01-No Variations.PDF
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3DT-CR00300-01-No Variations.PDF
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Development_Boards - complete Evaluation Platforms with FPGA/SoC device
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Files AVN-20230623 TE0802-02-1AEV2-A-v3-06_29_2023.pdf
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PCN - Product change notifications
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TE0802-01-2CG-1E bottom.jpg
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TE0802-01-2CG-1E top.jpg
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REV02 - PCB Revision: Schematics, AD, STEP, HW Design Files and more ...
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Schematics (4 Files) SCH-TE0802-02-1AEV2-A.PDF
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SCH-TE0802-02-1BEV2-A.PDF
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SCH-TE0802-02-2AEU2-A.PDF
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SCH-TE0802-02-2AEV2-A.PDF
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Assembly Diagrams (3 Files) AD-TE0802-02-1AEV2-A.PDF
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AD-TE0802-02-2AEU2-A.PDF
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AD-TE0802-02-2AEV2-A.PDF
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3D PDF (2 Files) 3DB-TE0802-02-No Variations.PDF
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3DT-TE0802-02-No Variations.PDF
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Other Files (2 Files)
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PMOD-TE0802-02.PDF
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TE0802-02-2AEV2-A angle.jpg
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TE0802-02-2AEV2-A bottom.jpg
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TE0802-02-2AEV2-A top.jpg
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Reference_Design - FPGA Design Examples for different Vivado Versions
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test_board - TE0802 Basic Linux Example
TE0802 Basic Linux Example
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Reference Design - Source Code and Configuration Files (1 Files) TE0802-test_board-vivado_2018.3-build_07_20190830103019.zip
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test_board - TE0802 Basic Linux Example
TE0802 Basic Linux Example
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Reference Design - Source Code and Configuration Files (1 Files) TE0802-test_board-vivado_2019.2-build_12_20200602111955.zip
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Reference Design - Documentation (1 Files) TE0802-test_board-vivado_2019.2-build_12_-v.2-08_24_2022.pdf
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test_board - TE0802 Basic Linux Example
TE0802 Basic Linux Example
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Reference Design - Source Code and Configuration Files (1 Files) TE0802-test_board-vivado_2021.2-build_20_20230210132253.zip
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Reference Design - Documentation (0 Files) Other Files (1 Files) 2022.2
test_board - TE0802 Basic Linux Example
TE0802 Basic Linux Example
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Reference Design - Source Code and Configuration Files (1 Files) TE0802-test_board-vivado_2022.2-build_2_20230628100458.zip
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Reference Design - Documentation (0 Files) Other Files (0 Files)
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Assembly Diagrams (1 Files) AD-TE0950-01-EGBE11A_PRELIMINARY.PDF
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3D PDF (2 Files) 3DB-TE0950-01-No Variations_PRELIMINARY.PDF
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3DT-TE0950-01-No Variations_PRELIMINARY.PDF
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TE0950-01 bottom.jpg
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TE0950-01 top.jpg
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REV02 - PCB Revision: Schematics, AD, STEP, HW Design Files and more ...
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Schematics (1 Files) SCH-TE0950-02-EGBE21A.PDF
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Assembly Diagrams (1 Files) AD-TE0950-02-EGBE21A.PDF
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3D PDF (2 Files) 3DB-TE0950-02-No Variations.PDF
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3DT-TE0950-02-No Variations.PDF
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Other Files (1 Files) HW_Design - PCB Design relevant files, like PCB-STEP-Model, Cooler-STEP-Model, Trace-length, Altium libraries / projects (only for selected carrier boards), and ...
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TE0950-02 bottom.jpg
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TE0950-02 top.jpg
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REV03 - PCB Revision: Schematics, AD, STEP, HW Design Files and more ...
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SCH-TE0950-03-EGBE21C.PDF
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SCH-TE0950-03-EGBE22A.PDF
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SCH-TE0950-03-MAKE21C.PDF
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Assembly Diagrams (4 Files) AD-TE0950-03-EGBE21A.PDF
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AD-TE0950-03-EGBE21C.PDF
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AD-TE0950-03-EGBE22A.PDF
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AD-TE0950-03-No Variations.PDF
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3D PDF (2 Files) 3DB-TE0950-03-No Variations.PDF
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3DT-TE0950-03-No Variations.PDF
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Other Files (2 Files)
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PAN-TE0950-03-No Variations.PDF
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test_board - TE0950 Basic Linux Example
TE0950 Basic Linux Example
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TE0950-test_board_noprebuilt-vivado_2023.2-build_4_20240531092954.zip
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Reference Design - Source Code and Configuration Files (2 Files) TE0950-test_board-vivado_2023.2-build_4_20240531092954.zip
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TE0950-test_board_artix-vivado_2023.2-build_4_20240531084104.zip
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Reference Design - Documentation (0 Files) Other Files (0 Files)
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SCH-TEC0053-03A.PDF
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SCH-TEC0053-03B.PDF
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SCH-TEC0053-03C.PDF
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Assembly Diagrams (4 Files) AD-TEC0053-03.PDF
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AD-TEC0053-03A.PDF
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AD-TEC0053-03B.PDF
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AD-TEC0053-03C.PDF
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3D PDF (6 Files) 3DB-TEC0053-03.PDF
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3DT-TEC0053-03.PDF
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PDF3D-TEC0053-03.PDF
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PDF3D-TEC0053-03A.PDF
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PDF3D-TEC0053-03B.PDF
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PDF3D-TEC0053-03C.PDF
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SCH-TEC0053-04A.PDF
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Assembly Diagrams (2 Files) AD-TEC0053-04.PDF
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AD-TEC0053-04A.PDF
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3D PDF (2 Files) 3DB-TEC0053-04.PDF
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3DT-TEC0053-04.PDF
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Other Files (3 Files)
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EDDP User Manual-v.199-11_12_2020.pdf
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EDPS User Manual-v.58-11_12_2020.pdf
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Assembly Diagrams (1 Files) AD-TEC0060-01.PDF
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3D PDF (2 Files) 3DB-TEC0060-01.PDF
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3DT-TEC0060-01.PDF
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Assembly Diagrams (1 Files) AD-TEC0060-02.PDF
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3D PDF (2 Files) 3DB-TEC0060-02.PDF
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3DT-TEC0060-02.PDF
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SCH-TEC0089-02-D2C-1-D.PDF
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Assembly Diagrams (2 Files) AD-TEC0089-02-325-2CC.PDF
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AD-TEC0089-02-D2C-1-D.PDF
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3D PDF (2 Files) 3DB-TEC0089-02.PDF
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3DT-TEC0089-02.PDF
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Trace Lengths (0 Files) Other Files (0 Files)
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Arrow_USB_Programmer - ARROW USB Programmer Driver
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PCN-20220609 TEI0009-02 HyperRAM Change.pdf
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SCH-TEI0009-02-055-8CA.PDF
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SCH-TEI0009-02-PHIQ2R.PDF
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Assembly Diagrams (3 Files) AD-TEI0009-02-055-8C.PDF
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AD-TEI0009-02-055-8CA.PDF
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AD-TEI0009-02-PHIQ2R.PDF
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3D PDF (2 Files) 3DB-TEI0009-02.PDF
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3DT-TEI0009-02.PDF
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TEI0009-02-055-8CA bottom.jpg
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TEI0009-02-055-8CA top.jpg
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Reference_Design - FPGA Design Examples for Intel Quartus Prime Suite
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Other Files (0 Files)
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Files C10LP Refkit User Guide.pdf
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C10LP_Refkit__Demo_v2.zip
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TEI0022 - M-Board FMC Carrier for M-Series Precision Converters (Intel Cyclon V development board)
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Schematics (1 Files) SCH-TEI0022-03.PDF
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Assembly Diagrams (1 Files) AD-TEI0022-03.PDF
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3D PDF (3 Files) 3DB-TEI0022-03.PDF
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3DT-TEI0022-03.PDF
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PDF3D-TEI0022-03.PDF
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TEI0022-03 bottom.jpg
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TEI0022-03 top.jpg
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Reference_Design - FPGA Design Examples for Intel Quartus Prime Suite
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test_board - TEI0022 Basic Example
TEI0022 Basic Example
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Project Files (2 Files) TEI0022-test_board-quartus_20.1.1-20220426153922.zip
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TEI0022-test_board_noprebuilt-quartus_20.1.1-20220426153812.zip
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test_board - TEI0022 Basic Example
TEI0022 Basic Example
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TEI0022-test_board_noprebuilt-quartus_21.1.0-20220615163042.zip
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Other Files (0 Files)
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documents
Files UM-TE0101-00.de.pdf User manual (German version)
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UM-TE0101-00.en.pdf User manual (English version)
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pictures
Files TE0101-angle.jpg
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TE0101.jpg
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TE0102 - 24 V -> TTL Levelconverter, 16 Channels
documents
Files UM-TE0102-00.de.pdf User manual (German version)
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UM-TE0102-00.en.pdf User manual (English version)
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pictures
Files TE0102.jpg
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FMC_Cards - compatible Adapterboards for FMC Connectors
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Assembly Diagrams (1 Files) AD-TEF0003-01.PDF
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3D PDF (0 Files) Other Files (0 Files)
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Source Code of CPLD Firmware (0 Files) Other Files (0 Files)
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TEF0007 - Xilinx Kintex FMC-Module with Displayport Input/Output
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Size
SCH-TEF0007-02A.PDF
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Assembly Diagrams (2 Files) AD-TEF0007-02.PDF
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AD-TEF0007-02A.PDF
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3D PDF (2 Files) 3DB-TEF0007-02.PDF
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3DT-TEF0007-02.PDF
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Trace Lengths (0 Files) Other Files (0 Files)
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TEF0007-02 back.jpg
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TEF0007-02 front.jpg
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TEF0007-02A_angle.jpg
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TEF0007-02A_bottom.jpg
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TEF0007-02A_top.jpg
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Reference_Design - FPGA Design Examples for different Vivado Versions
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TEF0008 - QSFP+ FMC-Module with MAX10
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PCN-20240807 TEF0008-02 PLL Change.pdf
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Other Files (0 Files)
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Schematics (1 Files) SCH-TEF0008-02.PDF
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Assembly Diagrams (1 Files) AD-TEF0008-02.PDF
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3D PDF (2 Files) 3DB-TEF0008-02.PDF
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3DT-TEF0008-02.PDF
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Source Code of CPLD Firmware (0 Files) Other Files (1 Files) HW_Design - PCB Design relevant files, like PCB-STEP-Model, Cooler-STEP-Model, Trace-length and ...
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Trace Lengths (0 Files) Other Files (0 Files)
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Size
TEF0008-02_angle2.jpg
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TEF0008-02_bottom.jpg
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TEF0008-02_top.jpg
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TEF0010 - Xilinx Artix FPGA FMC-Module with GMSL II Output
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Size
SCH-TEF0010-01A.PDF
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Assembly Diagrams (2 Files) AD-TEF0010-01.PDF
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AD-TEF0010-01A.PDF
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3D PDF (2 Files) 3DB-TEF0010-01.PDF
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3DT-TEF0010-01.PDF
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Source Code of CPLD Firmware (0 Files) Other Files (0 Files)
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TEF0010-01_bottom.jpg
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TEF0010-01_top.jpg
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JTAG_Programmer - for Xilinx, Intel and Lattice FPGA/SoC Devices
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REV02 - PCB Revision: Schematics, AD, STEP, HW Design Files and more ...
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Schematics (3 Files) SCH-TE0790-02.PDF
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SCH-TE0790-02L.PDF
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SCH-TE0790-02NC.PDF
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Assembly Diagrams (3 Files) AD-TE0790-02.PDF
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AD-TE0790-02L.PDF
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AD-TE0790-02NC.PDF
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3D PDF (3 Files) 3DB-TE0790-02.PDF
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3DT-TE0790-02.PDF
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PDF3D-TE0790-02.PDF
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SC-PGM-TE0790-02-XMOD_STD_RXTXSWAP-01_20170404.zip
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SC-PGM-TE0790-02_XMOD_DIP40-01_20170426.zip
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SC-PRJ-TE0790-02-XMOD_STD-01_20170404.zip
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SC-PRJ-TE0790-02-XMOD_STD_RXTXSWAP-01_20170404.zip
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SC-PRJ-TE0790-02_XMOD-DIP40-01_20170426.zip
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TE0790-02 bottom.JPG
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TE0790-02 top.JPG
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REV03 - PCB Revision: Schematics, AD, STEP, HW Design Files and more ...
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Schematics (3 Files) SCH-TE0790-03.PDF
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SCH-TE0790-03L.PDF
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SCH-TE0790-03NC.PDF
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Assembly Diagrams (3 Files) AD-TE0790-03.PDF
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AD-TE0790-03L.PDF
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AD-TE0790-03NC.PDF
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3D PDF (2 Files) 3DB-TE0790-03.PDF
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3DT-TE0790-03.PDF
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SC-PGM-TE0790-0203-XMOD_STD_RXTXSWAP-01_20170404.zip
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SC-PGM-TE0790-0203_XMOD_DIP40-01_20170426.zip
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SC-PRJ-TE0790-0203-XMOD_STD-01_20170404.zip
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SC-PRJ-TE0790-0203-XMOD_STD_RXTXSWAP-01_20170404.zip
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SC-PRJ-TE0790-0203_XMOD-DIP40-01_20170426.zip
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TE0790-03_bottom.jpg
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TE0790-03_top.jpg
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TE0791 - Adapter für TE0790
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SCH-TE0791-01C.PDF
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Assembly Diagrams (2 Files) AD-TE0791-01.PDF
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AD-TE0791-01C.PDF
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3D PDF (2 Files) 3DB-TE0791-01.PDF
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3DT-TE0791-01.PDF
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TEI0004 - Arrow-USB-Programmer 2 (FTDI JTAG Programmer for Intel FPGA)
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Arrow_USB_Programmer - ARROW USB Programmer Driver
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Files STP-TEI0004-02.zip
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Pictures - PCB pictures
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TEI0004-02 angle1.jpg
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TEI0004-02 angle2.jpg
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TEI0004-02 bottom.jpg
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TEI0004-02 top.jpg
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TEI0005 - Arrow-USB-Programmer 2 SMD (FTDI JTAG Programmer for Intel FPGA)
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Arrow_USB_Programmer - ARROW USB Programmer Driver
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Other Files (0 Files)
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TEI0005-01_bottom.jpg
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TEI0005-01_top.jpg
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REV02 - PCB Revision: Documents and more ...
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Other Files (0 Files)
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Trace Lengths (0 Files) Electronic Design Interchange Format(EDIF) (0 Files) Other Files (2 Files)
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TEI0005_footprint_libary.zip
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TEI0005-02_bottom.jpg
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TEI0005-02_top.jpg
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TEM0009 - FPGA USB-Programmer (JTAG Programmer for Microchip FPGAs)
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Pictures - PCB pictures
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TEM0009-01 top.jpg
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REV02 - PCB Revision: Documents and more ...
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SCH-TEM0009-02.PDF
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Files STP-TEM0009-02.zip
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Pictures - PCB pictures
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3DT-TEM0009-02.PDF
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Modules_and_Module_Carriers - modules with FPGA/SoC device and corresponding carrier boards
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SC-PGM-TE701-01_FMC1V8-01_20150831.zip.zip
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Source Code of CPLD Firmware (1 Files) SC-PRJ-TE701-01_E7010101-01_20150615.zip.zip
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TE0717 - Xilinx Spartan 7 FPGA modules
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test_board - TE0717 Hello World Example
TE0717 Hello World Example
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Reference Design - Source Code and Configuration Files (1 Files) TE0717-test_board-vivado_2021.2-build_14_20220628114204.zip
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Reference Design - Documentation (0 Files) Other Files (0 Files)
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Other Files (0 Files)
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Assembly Diagrams (1 Files) AD-TEC0117-01.PDF
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3D PDF (2 Files) 3DB-TEC0117-01.PDF
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3DT-TEC0117-01.PDF
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Other Files (0 Files)
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TEC0117-01_bottom.jpg
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TEC0117-01_top.jpg
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Reference_Design
Factory_Image
Files TEC0117_ApNote.pdf
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TEC0117_factory_image_v1_20210114.zip
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TEI0001 - MAX1000 (Intel MAX10 FPGA modules)
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Arrow_USB_Programmer - ARROW USB Programmer Driver
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Other Files (0 Files)
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SCH-TEI0001-01-08-C8P.PDF
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Assembly Diagrams (2 Files) AD-TEI0001-01-08-C8.PDF
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AD-TEI0001-01-08-C8P.PDF
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3D PDF (2 Files) 3DB-TEI0001-01-08-C8.PDF
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3DT-TEI0001-01-08-C8.PDF
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TEI0001-01 bottom.jpg
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TEI0001-01 top.jpg
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REV02 - PCB Revision: Schematics, AD, STEP, HW Design Files and more ...
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SCH-TEI0001-02-16-C8.PDF
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Assembly Diagrams (2 Files) AD-TEI0001-02-08-C8.PDF
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AD-TEI0001-02-16-C8.PDF
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3D PDF (2 Files) 3DB-TEI0001-02-08-C8.PDF
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3DT-TEI0001-02-08-C8.PDF
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TEI0001-01 bottom.jpg
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TEI0001-01 top.jpg
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TEI0001-02-08-C8_verpackung1.jpg
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TEI0001-02-08-C8_verpackung2.jpg
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TEI0001-02-08-C8_verpackung3.jpg
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REV03 - PCB Revision: Schematics, AD, STEP, HW Design Files and more ...
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SCH-TEI0001-03-16-C8.PDF
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SCH-TEI0001-03-16-C8A.PDF
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SCH-TEI0001-03-DBC83A.PDF
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SCH-TEI0001-03-FBC83A.PDF
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SCH-TEI0001-03-FBC84A.PDF
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Assembly Diagrams (7 Files) AD-TEI0001-03-08-C8.PDF
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AD-TEI0001-03-16-C8.PDF
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AD-TEI0001-03-16-C8A.PDF
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AD-TEI0001-03-DBC83A.PDF
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AD-TEI0001-03-FBC83A.PDF
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AD-TEI0001-03-FBC84A.PDF
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AD-TEI0001-03.PDF
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3D PDF (4 Files) 3DB-TEI0001-03-08-C8.PDF
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3DB-TEI0001-03.PDF
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3DT-TEI0001-03-08-C8.PDF
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3DT-TEI0001-03.PDF
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TEI0001-03-08-C8_bottom.jpg
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TEI0001-03-08-C8_top.jpg
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TEI0001-03-16-C8A_angle.jpg
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TEI0001-03-16-C8A_bottom.jpg
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TEI0001-03-16-C8A_top.jpg
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REV04 - PCB Revision: Schematics, AD, STEP, HW Design Files and more ...
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SCH-TEI0001-04-FBC84A.PDF
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Assembly Diagrams (2 Files) AD-TEI0001-04-DBC83A.PDF
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AD-TEI0001-04-FBC84A.PDF
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3D PDF (2 Files) 3DB-TEI0001-04.PDF
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3DT-TEI0001-04.PDF
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Other Files (0 Files)
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Project Files (4 Files) MAX1000 Nios II Core Lab.zip
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MAX1000_LED_Sequencer.zip
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MAX1000_SpiritLevel_demo.zip
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winbond_flash_demo.zip
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test_board - TEI0001 Basic Example
TEI0001 Basic Example
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Project Files (2 Files) TEI0001-test_board-quartus_18.1-20191111104348.zip
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TEI0001-test_board_noprebuilt-quartus_18.1-20191111104201.zip
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test_board - TEI0001 Basic Example
TEI0001 Basic Example
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Project Files (2 Files) TEI0001-test_board-quartus_19.1.0-20201019101651.zip
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TEI0001-test_board_noprebuilt-quartus_19.1.0-20201019101714.zip
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test_board - TEI0001 Basic Example
TEI0001 Basic Example
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Project Files (2 Files) TEI0001-test_board-quartus_20.1.1-20210709113644.zip
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TEI0001-test_board_noprebuilt-quartus_20.1.1-20210709113727.zip
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test_board - TEI0001 Basic Example
TEI0001 Basic Example
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test_board - TEI0001 Basic Example
TEI0001 Basic Example
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MAX1000 User Guide.pdf
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TEI0003 - CYC1000 (Intel Cyclone 10)
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Arrow_USB_Programmer - ARROW USB Programmer Driver
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Schematics (5 Files) SCH-TEI0003-02-B.PDF
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SCH-TEI0003-02.PDF
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SCH-TEI0003-02A-A.PDF
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SCH-TEI0003-02A-B.PDF
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SCH-TEI0003-02A.PDF
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Assembly Diagrams (7 Files) AD-TEI0003-02-B.PDF
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AD-TEI0003-02-No Variations.PDF
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AD-TEI0003-02.PDF
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AD-TEI0003-02A-A.PDF
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DIM-TEI0003-02A.PDF
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REV03 - PCB Revision: Schematics, AD, STEP, HW Design Files and more ...
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SCH-TEI0003-03-QFCR4A.PDF
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Assembly Diagrams (2 Files) AD-TEI0003-03-QFCR1A.PDF
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AD-TEI0003-03-QFCR4A.PDF
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Reference_Design - FPGA Design Examples for Intel Quartus Prime Suite
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LED_Sequencer - TEI0003 LED Sequencer Example
TEI0003 LED Sequencer Example
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TEI0003 NIOS SDRAM Example
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test_board - TEI0003 Basic Example
TEI0003 Basic Example
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test_board - TEI0003 Basic Example
TEI0003 Basic Example
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test_board - TEI0003 Basic Example
TEI0003 Basic Example
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test_board - TEI0003 Basic Example
TEI0003 Basic Example
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test_board - TEI0003 Basic Example
TEI0003 Basic Example
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Arrow_USB_Programmer - ARROW USB Programmer Driver
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Schematics (1 Files) SCH-TEI0010-02-08-C8.PDF
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Reference_Design - FPGA Design Examples for Intel Quartus Prime Suite
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AnalogMAX_Jupyter
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18.1
test_board - TEI0010 Basic Example
TEI0010 Basic Example
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test_board - TEI0010 Basic Example
TEI0010 Basic Example
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test_board - TEI0010 Basic Example
TEI0010 Basic Example
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test_board - TEI0010 Basic Example
TEI0010 Basic Example
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SCH-TEL0001-01R.PDF
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Assembly Diagrams (2 Files) AD-TEL0001-01.PDF
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AD-TEL0001-01R.PDF
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3D PDF (4 Files) 3DB-TEL0001-01.PDF
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3DB-TEL0001-01R.PDF
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REV02 - PCB Revision: Schematics, AD, STEP, HW Design Files and more ...
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Reference_Design - FPGA Design Examples for Lattice Diamond
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SCH-TEM0001-01A-ABC-2.PDF
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SCH-TEM0001-01B-010C.PDF
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SCH-TEM0001-01B-ABC-2.PDF
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Assembly Diagrams (2 Files) AD-TEM0001-01A-010C.PDF
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AD-TEM0001-01B-010C.PDF
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Reference_Design - FPGA Design Examples for Libero SoC Design Suite
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SMFSDRAM
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2021.2
test_board - TEM0001 Test Board Example
TEM0001 Test Board Example
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archive
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SF2_Fab_Probe_20201002.zip
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SF2_GL2_Fabric_lab_guide_v3.1.pdf
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SF2_GL2_Fabric_lab_guide_v3.4.pdf
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SF2_GL2_Fabric_lab_guide_v3.5.pdf
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SMF2000_Cortex_M3_PWM_lab_guide_Lib12_SC6.pdf
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SMF2000_Cortex_M3_PWM_lab_guide_Lib12d5_SC6d4_v1.2.pdf
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SMF2000_Cortex_M3_PWM_lab_guide_Lib12d6_SC6d5_v1.3.pdf
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SMF2000_Cortex_M3_PWM_lab_sources.zip
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SMF2000_Cortex_M3_PWM_lab_sources_20190429.zip
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SMF2000_Cortex_M3_PWM_lab_sources_20201029.zip
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TCL_Example_MiV_SMF2000_L12d5_SC6d4_20201002.zip
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Files SF2_Fab_Probe_20210211.zip
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SF2_GL2_Fabric_lab_guide_v3.6.pdf
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SMF2000_Cortex_M3_PWM_lab_sources_20210316.7z
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TCL_Example_MiV_RV32IMC_sources_16mar21.7z
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2.5x7.07 - form factor, like TEI0050
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SCH-TEI0050-01-AAH13A.PDF
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Assembly Diagrams (2 Files) AD-TEI0050-01-AAH11A.PDF
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AD-TEI0050-01-AAH13A.PDF
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3D PDF (2 Files) 3DB-TEI0050-01-No Variations.PDF
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3DT-TEI0050-01-No Variations.PDF
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Reference_Design - FPGA Design Examples for Intel Quartus Prime Suite
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test_board - TEI0050 Basic Example
TEI0050 Basic Example
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Project Files (2 Files) TEI0050-test_board-quartus_21.1.1-20230213145613.zip
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TEI0050-test_board_noprebuilt-quartus_21.1.1-20230213145533.zip
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test_board - TEI0050 Basic Example
TEI0050 Basic Example
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Project Files (2 Files) TEI0050-test_board-quartus_22.1std.2-20240517115802.zip
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TEI0050-test_board_noprebuilt-quartus_22.1std.2-20240517115737.zip
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test_board - TEI0050 Basic Example
TEI0050 Basic Example
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TEI0050-test_board_noprebuilt-quartus_23.1std.1-20240808153710.zip
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Arrow_USB_Programmer - ARROW USB Programmer Driver
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Assembly Diagrams (1 Files) AD-TEI0015-01-08-C8A.PDF
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3DT-TEI0015-01-08-C8A.PDF
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Assembly Diagrams (1 Files) AD-TEI0015-02-08-C8A.PDF
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3D PDF (2 Files) 3DB-TEI0015-02-No Variations.PDF
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3DT-TEI0015-02-No Variations.PDF
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Other Files (1 Files) HW_Design - PCB Design relevant files, like PCB-STEP-Model, Cooler-STEP-Model, Trace-length and ...
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Assembly Diagrams (1 Files) AD-TEI0015-03-08-C8A.PDF
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3D PDF (2 Files) 3DB-TEI0015-03-No Variations.PDF
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3DT-TEI0015-03-No Variations.PDF
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Other Files (1 Files) HW_Design - PCB Design relevant files, like PCB-STEP-Model, Cooler-STEP-Model, Trace-length and ...
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DAQ_Capture_Demo - TEI0015 DAQ Capture Demo
TEI0015 DAQ Capture Demo
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TEI0015 Data Capture Demo
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TEI0015 Jupyter Demo
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TEI0016 Jupyter Demo
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TEI0023 DAQ Capture Demo
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PCN-20201003 TE0890-01 SPI Flash Change.pdf
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SCH-TE0890-01-25-1C.PDF
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Reference_Design - FPGA Design Examples for different Vivado Versions
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test_board - TE0890 Hello World Example
TE0890 Hello World Example
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REV02 - PCB Revision: Schematics, AD, STEP, HW Design Files and more ...
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Reference_Design - FPGA Design Examples for different Vivado Versions
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zbzerodemo1 - VIDEO/AUDIO Design with RPI video camera stream to monitor
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Reference Design - Source Code and Configuration Files (1 Files) TE0727-zbzerodemo1-vivado_2019.2-build_15_20201124064045.zip
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test_board - Basic Linux Example
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Reference Design - Source Code and Configuration Files (1 Files) TE0727-test_board-vivado_2020.2-build_8_20210921113440.zip
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ZynqberryZero Demo VIDEO/AUDIO Design with RPI video camera stream to monitor
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Reference Design - Source Code and Configuration Files (1 Files) TE0727-zbzerodemo1-vivado_2020.2-build_8_20211006122624.zip
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REV02 - PCB Revision
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AD-TE0876-02.PDF
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Reference_Design - FPGA Design Examples
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TEMB0001 - Carrier for Module like TEM0005, ...
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TEMB0005 - Carrier for Module like TEM0005, ...
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TEM0005 - M2S010 (MicroSemi SmartFusion2 SoC modules)
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Schematics (3 Files) SCH-TEM0005-02-010C.PDF
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SCH-TEM0005-02-010I.PDF
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SCH-TEM0005-02-ADI11-A.PDF
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Assembly Diagrams (3 Files) AD-TEM0005-02-010C.PDF
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AD-TEM0005-02-010I.PDF
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Reference_Design - FPGA Design Examples for Libero SoC Design Suite
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webserver_DEMO1 - TEM0005 Webserver Demo1
TEM0005 Webserver Demo1
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PCN-20240302 TE0725-03 to TE0725-04 Hardware Revision Change.pdf
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SCH-TE0725-02-15-1C.PDF
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Assembly Diagrams (5 Files) AD-TE0725-02-100-2C.PDF
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AD-TE0725-02-15-1C.PDF
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AD-TE0725-02-35-2C.PDF
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3D PDF (10 Files) 3DB-TE0725-02-100-2C.PDF
Size
3DB-TE0725-02-100-2CF1.PDF
Size
3DB-TE0725-02-100-2CF2.PDF
Size
3DB-TE0725-02-15-1C.PDF
Size
3DB-TE0725-02-35-2C.PDF
Size
3DT-TE0725-02-100-2C.PDF
Size
3DT-TE0725-02-100-2CF1.PDF
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3DT-TE0725-02-100-2CF2.PDF
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3DT-TE0725-02-15-1C.PDF
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3DT-TE0725-02-35-2C.PDF
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Other Files (0 Files)
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Trace Lengths (0 Files) Other Files (0 Files)
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Size
TE0725-02 bottom.jpg
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TE0725-02 top.jpg
Size
TE0725-02a angle.jpg
Size
TE0725-02a bottom.jpg
Size
TE0725-02a top.jpg
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REV03 - PCB Revision: Schematics, AD, STEP, HW Design Files and more ...
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Schematics (8 Files) SCH-TE0725-03-100-2C.PDF
Size
SCH-TE0725-03-100-2C8.PDF
Size
SCH-TE0725-03-100-2CF.PDF
Size
SCH-TE0725-03-100-2I9.PDF
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SCH-TE0725-03-15-1C.PDF
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SCH-TE0725-03-35-2C.PDF
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SCH-TE0725-03-35-2I.PDF
Size
SCH-TE0725-03-35-2IN.PDF
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Assembly Diagrams (8 Files) AD-TE0725-03-100-2C.PDF
Size
AD-TE0725-03-100-2C8.PDF
Size
AD-TE0725-03-100-2CF.PDF
Size
AD-TE0725-03-100-2I9.PDF
Size
AD-TE0725-03-15-1C.PDF
Size
AD-TE0725-03-35-2C.PDF
Size
AD-TE0725-03-35-2I.PDF
Size
AD-TE0725-03-35-2IN.PDF
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3D PDF (2 Files) 3DB-TE0725-03.PDF
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3DT-TE0725-03.PDF
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Trace Lengths (1 Files) TL-TE0725-03.xls
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Altium Project and Libraries (1 Files) AP-TE0725_Baseboard_Template.zip
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Electronic Design Interchange Format(EDIF) (0 Files) Gerber Files (0 Files) Other Files (0 Files)
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Size
TE0725-03 bottom.JPG
Size
TE0725-03 top.JPG
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TE0725-03-100-2CF_angel.jpg
Size
TE0725-03-100-2CF_bottom.jpg
Size
TE0725-03-100-2CF_top.jpg
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TE0725-03-100-2C_angle.jpg
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TE0725-03-100-2C_bottom.jpg
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TE0725-03-100-2C_top.jpg
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TE0725-03-100-2I9_angle.jpg
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TE0725-03-100-2I9_bottom.jpg
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TE0725-03-100-2I9_top.jpg
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TE0725-03-15-1C_angle.jpg
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TE0725-03-15-1C_bottom.jpg
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TE0725-03-15-1C_top.jpg
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TE0725-03-35-2C_angle.jpg
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TE0725-03-35-2C_bottom.jpg
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TE0725-03-35-2C_top.jpg
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Reference_Design - FPGA Design Examples for different Vivado Versions
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labtools - Vivado Labtools ready to use project
Short Description:
Additional content in the larger ZIP with prebuilt-folders:
File | File-Extension | Description |
---|---|---|
Bit-File | *.bit | FPGA Configuration File |
Diverse Reports | -- | Report files in different formats |
Size
TE0725-simple_io_noprebuilt-vivado_2015.4-build_32_20160504110725.zip
Size
test_board - MicroBlaze Basic-System
Short Description:
Excerpt of special Block-Design components/interfaces:
Component | Description |
---|---|
IP-Interfaces | I2C, ASIO (AXI-Stream to IO), SPI-Flash, Uart |
Additional Software Application for SDK/HSI and Linux:
Application | Description |
---|---|
hello_world | Xilinx Hello World Example |
Additional content in the larger ZIP with prebuilt-folders:
File | File-Extension | Description |
---|---|---|
MCS-File | *.mcs | Flash Configuration File with Boot-Image (MicroBlaze or FPGA part only) |
Bit-File | *.bit | FPGA Configuration File |
Software-Application-File | *.elf | Software Application for Zynq or MicroBlaze Processor Systems |
Hardware-Platform-Specification-Files | *.hdf | Hardware Specification from the vivado project. Used in SDK/HSI |
MMI-File | *.mmi | File with BRAM-Location to generate MCS or BIT-File with *.elf content (MicroBlaze only) |
Diverse Reports | -- | Report files in different formats |
Size
TE0725-test_board_noprebuilt-vivado_2015.4-build_32_20160504103252.zip
Size
2016.1
f32c_arduino
Files TE0725-f32c_demo-vivado_2016.1-build_33_20160529102928.zip
Size
TE0725-f32c_demo_noprebuilt-vivado_2016.1-build_33_20160529102755.zip
Size
2016.2
test_board - MicroBlaze Basic-System
MicroBlaze Basic-System
-Downloadable files are located below the description-
Component | Description |
---|---|
Xilinx-IP | I2C,SPI-Flash,UART |
TE-IP | ASIO (AXI-Stream to IO) |
Application | Description |
---|---|
hello_world | Xilinx Hello World Example |
Name | Folder | Description |
---|
File | File-Extension | Description |
---|---|---|
MCS-File | *.mcs | Flash Configuration File with Boot-Image (MicroBlaze or FPGA part only) |
BIT-File | *.bit | FPGA Configuration File |
Software-Application-File | *.elf | Software Application for Zynq or MicroBlaze Processor Systems |
Hardware-Platform-Specification-Files | *.hdf | Exported Vivado Hardware Specification for SDK/HSI |
MMI-File | *.mmi | File with BRAM-Location to generate MCS or BIT-File with *.elf content (MicroBlaze only) |
Diverse Reports | -- | Report files in different formats |
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Size
te0725-test_board_noprebuilt-vivado_2016.2-build_07_20161020133512.zip
Size
2017.4
HyperRAM - TE0725 HyperRAM Example
TE0725 HyperRAM Example
-Downloadable files are located below the description-
This reference designs is bundled with a FREE evaluation edition of the commercially proven, low-cost, low-circuit area, high performance, HyperBus Memory Controller (HBMC) IP supplied by Synaptic Laboratories Ltd. Synaptic Labs HBMC IP is commercially proven in both Intel and Xilinx projects, and was selected by Intel. This FREE HBMC IP evaluation license never expires, and no customer registration or NIC ID is required.
You can check for and obtain the latest version of the FREE evaluation HBMC IP from S/Labs website for Xilinx on S/Labs HBMC IP (Free Trail IP). Please send your HBMC IP support questions to info@synaptic-labs.com
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Size
Reference Design - Source Code and Configuration Files (1 Files) TE0725-HyperRAM-vivado_2017.4-build_10_20180605162425.zip
Size
Reference Design - Documentation (0 Files) Other Files (0 Files)
TE0725 Basic Example
-Downloadable files are located below the description-
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Size
Reference Design - Source Code and Configuration Files (1 Files) TE0725-test_board-vivado_2017.4-build_07_20180319171209.zip
Size
Reference Design - Documentation (0 Files) Other Files (0 Files)
HyperRAM - TE0725 HyperRAM Example
TE0725 HyperRAM Example
-Downloadable files are located below the description-
This reference designs is bundled with a FREE evaluation edition of the commercially proven, low-cost, low-circuit area, high performance, HyperBus Memory Controller (HBMC) IP supplied by Synaptic Laboratories Ltd. Synaptic Labs HBMC IP is commercially proven in both Intel and Xilinx projects, and was selected by Intel. This FREE HBMC IP evaluation license never expires, and no customer registration or NIC ID is required.
You can check for and obtain the latest version of the FREE evaluation HBMC IP from S/Labs website for Xilinx on S/Labs HBMC IP (Free Trail IP). Please send your HBMC IP support questions to info@synaptic-labs.com
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Size
Reference Design - Source Code and Configuration Files (1 Files) TE0725-HyperRAM-vivado_2018.2-build_02_20180809122623.zip
Size
Reference Design - Documentation (0 Files) Other Files (0 Files)
TE0725 Basic Example
-Downloadable files are located below the description-
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Size
Reference Design - Source Code and Configuration Files (1 Files) TE0725-test_board-vivado_2018.2-build_02_20180809122018.zip
Size
Reference Design - Documentation (0 Files) Other Files (0 Files)
HyperRAM - TE0725 HyperRAM Example
TE0725 HyperRAM Example
-Downloadable files are located below the description-
This reference designs is bundled with a FREE evaluation edition of the commercially proven, low-cost, low-circuit area, high performance, HyperBus Memory Controller (HBMC) IP supplied by Synaptic Laboratories Ltd. Synaptic Labs HBMC IP is commercially proven in both Intel and Xilinx projects, and was selected by Intel. This FREE HBMC IP evaluation license never expires, and no customer registration or NIC ID is required.
You can check for and obtain the latest version of the FREE evaluation HBMC IP from S/Labs website for Xilinx on S/Labs HBMC IP (Free Trail IP). Please send your HBMC IP support questions to info@synaptic-labs.com
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Size
Reference Design - Source Code and Configuration Files (1 Files) TE0725-HyperRAM-vivado_2019.2-build_10_20200429134447.zip
Size
Reference Design - Documentation (0 Files) Other Files (1 Files) test_board - TE0725 Basic Example
TE0725 Basic Example
-Downloadable files are located below the description-
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Size
Reference Design - Source Code and Configuration Files (1 Files) TE0725-test_board-vivado_2019.2-build_10_20200420092815.zip
Size
Reference Design - Documentation (1 Files) TE0725-test_board-vivado_2019.2-build_10_v.13-08_29_2022.pdf
Size
Other Files (0 Files)
HyperRAM - TE0725 HyperRAM Example
TE0725 HyperRAM Example
-Downloadable files are located below the description-
This reference designs is bundled with a FREE evaluation edition of the commercially proven, low-cost, low-circuit area, high performance, HyperBus Memory Controller (HBMC) IP supplied by Synaptic Laboratories Ltd. Synaptic Labs HBMC IP is commercially proven in both Intel and Xilinx projects, and was selected by Intel. This FREE HBMC IP evaluation license never expires, and no customer registration or NIC ID is required.
You can check for and obtain the latest version of the FREE evaluation HBMC IP from S/Labs website for Xilinx on S/Labs HBMC IP (Free Trail IP). Please send your HBMC IP support questions to info@synaptic-labs.com
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Size
Reference Design - Source Code and Configuration Files (1 Files) TE0725-HyperRAM-vivado_2021.2-build_15_20220830154134.zip
Size
Reference Design - Documentation (0 Files) Other Files (0 Files)
TE0725 Basic Example
-Downloadable files are located below the description-
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Size
Reference Design - Source Code and Configuration Files (1 Files) TE0725-test_board-vivado_2021.2-build_15_20220829124226.zip
Size
Reference Design - Documentation (1 Files) TE0725-test_board-vivado_2021.2-build_15_v.14-07_03_2024.pdf
Size
Other Files (0 Files)
test_board - TE0725 Basic Example
TE0725 Basic Example
-Downloadable files are located below the description-
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Size
Reference Design - Source Code and Configuration Files (1 Files) TE0725-test_board-vivado_2023.2-build_4_20240703150642.zip
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Reference Design - Documentation (0 Files) Other Files (0 Files)
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Other Files (0 Files)
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-
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Size
Schematics (8 Files) SCH-TE0725LP-01-100-2C.PDF
Size
SCH-TE0725LP-01-100-2D.PDF
Size
SCH-TE0725LP-01-100-2L.PDF
Size
SCH-TE0725LP-01-72C-1.PDF
Size
SCH-TE0725LP-01-72C-1H.PDF
Size
SCH-TE0725LP-01-72C-1T.PDF
Size
SCH-TE0725LP-01-72C-1U.PDF
Size
SCH-TE0725LP-01-72I-1T.PDF
Size
Assembly Diagrams (8 Files) AD-TE0725LP-01-100-2C.PDF
Size
AD-TE0725LP-01-100-2D.PDF
Size
AD-TE0725LP-01-100-2L.PDF
Size
AD-TE0725LP-01-72C-1.PDF
Size
AD-TE0725LP-01-72C-1H.PDF
Size
AD-TE0725LP-01-72C-1T.PDF
Size
AD-TE0725LP-01-72C-1U.PDF
Size
AD-TE0725LP-01-72I-1T.PDF
Size
3D PDF (6 Files) 3DB-TE0725LP-01-100-2C.PDF
Size
3DB-TE0725LP-01-100-2D.PDF
Size
3DB-TE0725LP-01-100-2L.PDF
Size
3DT-TE0725LP-01-100-2C.PDF
Size
3DT-TE0725LP-01-100-2D.PDF
Size
3DT-TE0725LP-01-100-2L.PDF
Size
Other Files (0 Files)
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Trace Lengths (0 Files) Other Files (0 Files)
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Size
TE0725LP-01-100-2D bottom.jpg
Size
TE0725LP-01-100-2D top.jpg
Size
TE0725LP-01-72I-1T_angle.jpg
Size
TE0725LP-01-72I-1T_bottom.jpg
Size
TE0725LP-01-72I-1T_top.jpg
Size
TE0725LP_0.jpg
Size
TE0725LP_1.jpg
Size
TE0725LP_2.jpg
Size
Reference_Design - FPGA Design Examples for different Vivado Versions
- If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
test_board - TE0725LP Frequency Measurement
TE0725LP Frequency Measurement
-Downloadable files are located below the description-
Component | Description |
---|---|
Xilinx-IP | VIO |
TE-IP | Startupe2,LabTools Frequency Counter |
Application | Description |
---|
Name | Folder | Description |
---|
File | File-Extension | Description |
---|---|---|
BIT-File | *.bit | FPGA Configuration File |
DebugProbes-File | *.ltx | Definition File for Vivado/Vivado Labtools Debugging Interface |
Diverse Reports | --- | Report files in different formats |
LabTools Project-File | *.lpr | Vivado Labtools Project File |
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Size
te0725lp-test_board_noprebuilt-vivado_2016.2-build_07_20161025121507.zip
Size
2017.4
test_board - TE0725LP Basic Example
TE0725LP Basic Example
-Downloadable files are located below the description-
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Size
Reference Design - Source Code and Configuration Files (1 Files) TE0725LP-test_board-vivado_2017.4-build_07_20180319162005.zip
Size
Reference Design - Documentation (0 Files) Other Files (0 Files)
test_board - TE0725LP Basic Example
TE0725LP Basic Example
-Downloadable files are located below the description-
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Size
Reference Design - Source Code and Configuration Files (1 Files) TE0725LP-test_board-vivado_2018.2-build_04_20191119080742.zip
Size
Reference Design - Documentation (0 Files) Other Files (0 Files)
test_board - TE0725LP Basic Example
TE0725LP Basic Example
-Downloadable files are located below the description-
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Size
Reference Design - Source Code and Configuration Files (1 Files) TE0725LP-test_board-vivado_2019.2-build_10_20200420092959.zip
Size
Reference Design - Documentation (0 Files) Other Files (1 Files) 2021.2
test_board - TE0725LP Basic Example
TE0725LP Basic Example
-Downloadable files are located below the description-
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Size
Reference Design - Source Code and Configuration Files (1 Files) TE0725LP-test_board-vivado_2021.2-build_15_20220831152107.zip
Size
Reference Design - Documentation (0 Files) Other Files (0 Files)
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- If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
- If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
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-
If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
- If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
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-
If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
Size
Schematics (1 Files) SCH-TEBA0714-01.PDF
Size
Assembly Diagrams (2 Files) AD-TEBA0714-01.PDF
Size
AD-TEBA0714-01ALL.PDF
Size
3D PDF (2 Files) 3DB-TEBA0714-01.PDF
Size
3DT-TEBA0714-01.PDF
Size
Other Files (0 Files)
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Trace Lengths (0 Files) Altium Project and Libraries (1 Files) AP-TEBA0741-01.zip
Size
Electronic Design Interchange Format(EDIF) (0 Files) Gerber Files (0 Files) Other Files (0 Files)
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TEBA0714_1.jpg
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TEBA0714_2.jpg
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TEBB0714 - Carrierboard for TE0714, ...
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Documents - Technical Reference Manual, Schematics, Assembly Diagrams and ..
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Size
Schematics (1 Files) SCH-TEBB0714-01.PDF
Size
Assembly Diagrams (1 Files) AD-TEBB0714-01.PDF
Size
3D PDF (3 Files) 3DB-TEBB0714-01.PDF
Size
3DT-TEBB0714-01.PDF
Size
PDF3D-TEBB0714-01.PDF
Size
Other Files (0 Files)
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Trace Lengths (0 Files) Altium Project and Libraries (1 Files) AP-TEBB0714-01.zip
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Electronic Design Interchange Format(EDIF) (0 Files) Gerber Files (0 Files) Other Files (0 Files)
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Size
TEBB0714-01 angle2.jpg
Size
TEBB0714-01 bottom.jpg
Size
TEBB0714-01 top.jpg
Size
TEBT0714 - Test Fixture for TE0714, ...
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Size
Assembly Diagrams (1 Files) AD-TET0714-01.PDF
Size
3D PDF (2 Files) 3DB-TET0714-01.PDF
Size
3DT-TET0714-01.PDF
Size
Other Files (0 Files)
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Electronic Design Interchange Format(EDIF) (0 Files) Gerber Files (1 Files) GB-TEBT0714-01.zip
Size
Other Files (0 Files)
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- If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
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If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
Size
PCN-20180911 TE0714-02-_-2IC6 SPI Flash Change.pdf
Size
PCN-20190430 TE0714-02-_ to TE0714-03-_ Hardware Revision Change-v10-20190715_1545.pdf
Size
PCN-20230101 TE0714-03 to TE0714-04 Hardware Revision Change.pdf
Size
Other Files (0 Files)
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Size
SCH-TE0714-01-35-2IC6.PDF
Size
Assembly Diagrams (2 Files) AD-TE0714-01-35-2I.PDF
Size
AD-TE0714-01-35-2IC6.PDF
Size
3D PDF (0 Files) Other Files (0 Files)
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STP-TE0714-01-35-2IC6.zip
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Trace Lengths (0 Files) Other Files (0 Files)
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Size
TE0714_bottom.jpg
Size
TE0714_top.jpg
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REV02 - PCB Revision: Schematics, AD, STEP, HW Design Files and more ...
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Schematics (7 Files) SCH-TE0714-02-35-2I.PDF
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SCH-TE0714-02-35-2I3.PDF
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SCH-TE0714-02-35-2IC6.PDF
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SCH-TE0714-02-35-2IC7.PDF
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SCH-TE0714-02-50-2I.PDF
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SCH-TE0714-02-50-2IAC6.PDF
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SCH-TE0714-02-50-2IC6.PDF
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Assembly Diagrams (7 Files) AD-TE0714-02-35-2I.PDF
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AD-TE0714-02-35-2I3.PDF
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AD-TE0714-02-35-2IC6.PDF
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AD-TE0714-02-35-2IC7.PDF
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AD-TE0714-02-50-2I.PDF
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AD-TE0714-02-50-2IAC6.PDF
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AD-TE0714-02-50-2IC6.PDF
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3D PDF (0 Files) Other Files (0 Files)
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STP-TE0714-02-35-2IC6.zip
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Trace Lengths (1 Files) TL-TE0714-02_signal_length_b2b.xls
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TE0714-02-50-2IC6_bottom.jpg
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TE0714-02-50-2IC6_top.jpg
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REV03 - PCB Revision: Schematics, AD, STEP, HW Design Files and more ...
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Schematics (10 Files) SCH-TE0714-03-35-2I.PDF
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SCH-TE0714-03-35-2I3.PDF
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SCH-TE0714-03-35-2IC6.PDF
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SCH-TE0714-03-35-2IC7.PDF
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SCH-TE0714-03-50-2I.PDF
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SCH-TE0714-03-50-2IAC6.PDF
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SCH-TE0714-03-50-2IC6.PDF
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SCH-TE0714-03-52I-2-D.PDF
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SCH-TE0714-03-S001.PDF
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SCH-TE0714-03-S002.PDF
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Assembly Diagrams (10 Files) AD-TE0714-03-35-2I.PDF
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AD-TE0714-03-35-2I3.PDF
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AD-TE0714-03-35-2IC6.PDF
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AD-TE0714-03-35-2IC7.PDF
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AD-TE0714-03-50-2I.PDF
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AD-TE0714-03-50-2IAC6.PDF
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AD-TE0714-03-50-2IC6.PDF
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AD-TE0714-03-52I-2-D.PDF
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AD-TE0714-03-S001.PDF
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AD-TE0714-03-S002.PDF
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3D PDF (2 Files) 3DB-TE0714-03.PDF
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3DT-TE0714-03.PDF
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Other Files (1 Files) HW_Design - PCB Design relevant files, like PCB-STEP-Model, Cooler-STEP-Model, Trace-length and ...
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STP-TE0714-03-35-2I.zip
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STP-TE0714-03-35-2IC6-H.zip
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STP-TE0714-03-35-2IC6.zip
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Trace Lengths (0 Files) Other Files (0 Files)
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TE0714-03-35-2I_bottom.jpg
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TE0714-03-35-2I_top.jpg
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TE0714-03-50-2I_angle.jpg
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TE0714-03-50-2I_bottom.jpg
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TE0714-03-50-2I_top.jpg
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REV04 - PCB Revision: Schematics, AD, STEP, HW Design Files and more ...
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SCH-TE0714-04-42I-7-C.PDF
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SCH-TE0714-04-42I-7-L.PDF
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SCH-TE0714-04-52I-7-B.PDF
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SCH-TE0714-04-52I-8-A.PDF
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SCH-TE0714-04-No Variations.PDF
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Assembly Diagrams (5 Files) AD-TE0714-04-42I-7-B.PDF
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AD-TE0714-04-42I-7-C.PDF
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AD-TE0714-04-42I-7-L.PDF
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AD-TE0714-04-52I-7-B.PDF
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AD-TE0714-04-52I-8-A.PDF
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3D PDF (2 Files) 3DB-TE0714-04-No Variations.PDF
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3DT-TE0714-04-No Variations.PDF
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Other Files (1 Files) HW_Design - PCB Design relevant files, like PCB-STEP-Model, Cooler-STEP-Model, Trace-length and ...
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vio_led - TE0714 VIO LED Design
TE0714 VIO LED Design
-Downloadable files are located below the description-
Controlling:
- d4_mux_i: 0(d4_user_i), 1(LED_CLK/2), 2(LED_CLK/2^24), 3 (LED_CLK/2^32)
- d4_user_i: 0(off), 1(on)
- sel_clk_i: 0(65MHz ON-Chip CLK), 1(25 MHz On-Module CLK)
- led_freq: LED output frequency (minimum display value is 1Hz)
- startup_clk_freq: 65MHz ON-Chip CLK
- sys_clk_freq: 25 MHz On-Module CLK
Component | Description |
---|---|
Xilinx-IP | VIO (Virtual Input/Output) |
TE-IP | Labtools Frequency Counter, Startupe2 Primitive Wrapper |
Application | Description |
---|
Name | Folder | Description |
---|
File | File-Extension | Description |
---|---|---|
BIT-File | *.bit | FPGA Configuration File |
DebugProbes-File | *.ltx | Definition File for Vivado/Vivado Labtools Debugging Interface |
Diverse Reports | --- | Report files in different formats |
LabTools Project-File | *.lpr | Vivado Labtools Project File |
MCS-File | *.mcs | Flash Configuration File with Boot-Image (MicroBlaze or FPGA part only) |
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te0714-led_vio_noprebuilt-vivado_2016.2-build_07_20161012121736.zip
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2021.2
test_board - TE0714 Baremetal Design
TE0714 Basic Barmetal Example
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Reference Design - Source Code and Configuration Files (1 Files) TE0714-test_board-vivado_2021.2-build_20_20230417135347.zip
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Reference Design - Documentation (0 Files) Other Files (0 Files)
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SCH-TE0763-02-82I51-B.PDF
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Assembly Diagrams (2 Files) AD-TE0763-02-82I51-A.PDF
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AD-TE0763-02-82I51-B.PDF
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3D PDF (2 Files) 3DB-TE0763-02-No Variations.PDF
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3DT-TE0763-02-No Variations.PDF
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Other Files (2 Files)
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PAN-TE0763-02-No Variations.PDF
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test_board - TE0763 Hello World Example
TE0763 Hello World Example
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Reference Design - Source Code and Configuration Files (1 Files) TE0763-test_board-vivado_2021.2-build_20_20230324094232.zip
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Reference Design - Documentation (0 Files) Other Files (0 Files)
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SCH-TE0716-01-61C32-M.PDF
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SCH-TE0716-01-61C32-N.PDF
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Assembly Diagrams (3 Files) AD-TE0716-01-61C32-A.PDF
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AD-TE0716-01-61C32-M.PDF
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AD-TE0716-01-61C32-N.PDF
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3D PDF (2 Files) 3DB-TE0716-01-No Variations.PDF
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3DT-TE0716-01-No Variations.PDF
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Other Files (1 Files) HW_Design - PCB Design relevant files, like PCB-STEP-Model, Cooler-STEP-Model, Trace-length and ...
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TE0716-01-61C32-A_bottom.jpg
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TE0716-01-61C32-A_top.jpg
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Reference_Design - FPGA Design Examples for different Vivado Versions
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Other Files (1 Files) REV01 - PCB Revision: Schematics, AD, STEP, HW Design Files and more ...
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SC-PGM-TE701-01_FMC1V8-01_20150831.zip.zip
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Source Code of CPLD Firmware (1 Files) SC-PRJ-TE701-01_E7010101-01_20150615.zip.zip
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REV02 - PCB Revision: Schematics, AD, STEP, HW Design Files and more ...
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Assembly Diagrams (1 Files) AD-TE0701-02.PDF
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3D PDF (2 Files) 3D-TE0701-02.PDF 3D angled view
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3D-TE0701-02.top.PDF 3D top view
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Assembly Diagrams (1 Files) AD-TE0701-03.PDF Assembly diagram
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3D PDF (2 Files) 3D-TE0701-03-TOP.PDF
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3D-TE0701-03.PDF
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Source Code of CPLD Firmware (1 Files) SC-PRJ-TE701-03_Development-01_20140618.zip
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Other Files (0 Files)
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TE0701-03-top.JPG
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REV04 - PCB Revision: Schematics, AD, STEP, HW Design Files and more ...
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Schematics (1 Files) SCH-TE0701-04.PDF
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Assembly Diagrams (1 Files) AD-TE0701-04.PDF
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3D PDF (0 Files) Other Files (0 Files)
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Source Code of CPLD Firmware (0 Files) Other Files (0 Files)
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REV05 - PCB Revision: Schematics, AD, STEP, HW Design Files and more ...
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Schematics (1 Files) SCH-TE0701-05.PDF Schematic diagram
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Assembly Diagrams (1 Files) AD-TE0701-05.PDF Assembly diagram
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3D PDF (0 Files) Other Files (0 Files)
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Source Code of CPLD Firmware (0 Files) Other Files (0 Files)
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Trace Lengths (1 Files) TL-TE0701-05.zip
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Altium Project and Libraries (0 Files) Electronic Design Interchange Format(EDIF) (0 Files) Gerber Files (1 Files) GB-TE0701-05.zip Hardware source files:
- Gerber files
- NC (numerical control) drill files
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Other Files (1 Files)
- Altium Designer: Project file
- Altium Designer: schematic diagram
- Altium Designer: PCB layout
- Altium Designer: output job configuration file
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TE0701-05_top.jpg
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REV06 - PCB Revision: Schematics, AD, STEP, HW Design Files and more ...
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Schematics (1 Files) SCH-TE0701-06.PDF
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Assembly Diagrams (1 Files) AD-TE0701-06.PDF
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3D PDF (3 Files) 3DB-TE0701-06.PDF
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3DT-TE0701-06.PDF
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PDF3D-TE0701-06.PDF
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Other Files (0 Files)
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Source Code of CPLD Firmware (1 Files) SC-PRJ-TE701-06_CC701-05_20161122.zip
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Trace Lengths (0 Files) Altium Project and Libraries (1 Files) AP-TE0701-06.zip
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Electronic Design Interchange Format(EDIF) (1 Files) EDIF-TE0701-06.zip
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Gerber Files (0 Files) Other Files (0 Files)
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TE0701-06 bottom.jpg
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TE0701-06 top.jpg
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TE0703 - Carrierboard for 4x5 modules
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PCN-20190104 TE0703-05 to TE0703-06 Hardware Revision Change-v8-20190430_1650.pdf
Size
PCN-20190826 TE0703-06 Under Voltage Protection Change-v7-20190905_0847.pdf
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PCN-20230705 TE0703-06 to TE0703-07 Hardware Revision Change.pdf
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PCN-20240705 TE0703-07 Assembly pull-down resistor R36.pdf
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Schematics (1 Files) SCH-TE0703-01.PDF Schematic diagram
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Assembly Diagrams (1 Files) AD-TE0703-01.PDF Assembly diagram
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3D PDF (0 Files) Other Files (0 Files)
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TE0703-00-top.jpg
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REV02 - PCB Revision: Schematics, AD, STEP, HW Design Files and more ...
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Schematics (1 Files) SCH-TE0703-02.PDF Schematic diagram
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Assembly Diagrams (1 Files) AD-TE0703-02.PDF Assembly diagram
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3D PDF (0 Files) Other Files (0 Files)
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Source Code of CPLD Firmware (1 Files) SC-PRJ-TE703-02030405_CC0703S-02_20171013.zip
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Schematics (1 Files) SCH-TE0703-03.PDF Schematic diagram
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Assembly Diagrams (1 Files) AD-TE0703-03.PDF Assembly diagram
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SC-PGM-TE703-03_CCSpecial4x5-01_20150121.zip
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Source Code of CPLD Firmware (2 Files) SC-PRJ-TE703-02030405_CC0703S-02_20171013.zip
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SC-PRJ-TE703-03_Development-01_20151026.zip
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Other Files (1 Files) Pictures - PCB pictures
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Schematics (1 Files) SCH-TE0703-04.PDF Schematic diagram
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Assembly Diagrams (1 Files) AD-TE0703-04.PDF Assembly diagram
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3D PDF (0 Files) Other Files (0 Files)
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SC-PGM-TE703-04_CCSpecial4x5-01_20150121.zip
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Source Code of CPLD Firmware (2 Files) SC-PRJ-TE703-02030405_CC0703S-02_20171013.zip
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SC-PRJ-TE703-04_Development-01_20151026.zip
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Other Files (0 Files)
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Trace Lengths (0 Files) Altium Project and Libraries (0 Files) Electronic Design Interchange Format(EDIF) (0 Files) Gerber Files (1 Files) GB-TE0703-04.zip
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Other Files (1 Files) Pictures - PCB pictures
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TE0703-04 top.jpg
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REV05 - PCB Revision: Schematics, AD, STEP, HW Design Files and more ...
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Schematics (1 Files) SCH-TE0703-05.PDF
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Assembly Diagrams (1 Files) AD-TE0703-05.PDF
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3D PDF (3 Files) 3DB-TE0703-05.PDF
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3DT-TE0703-05.PDF
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PDF3D-TE0703-05.PDF
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Other Files (0 Files)
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Source Code of CPLD Firmware (1 Files) SC-PRJ-TE703-02030405_CC0703S-02_20171013.zip
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Other Files (0 Files)
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Trace Lengths (0 Files) Altium Project and Libraries (1 Files) AP-TE0703-05.zip
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TE0703-05 bottom.jpg
Size
TE0703-05 top.jpg
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REV06 - PCB Revision: Schematics, AD, STEP, HW Design Files and more ...
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SCH-TE0703-06-M.PDF
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SCH-TE0703-06-MC.PDF
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SCH-TE0703-06.PDF
Size
Assembly Diagrams (4 Files) AD-TE0703-06-D.PDF
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AD-TE0703-06-M.PDF
Size
AD-TE0703-06-MC.PDF
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AD-TE0703-06.PDF
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3D PDF (4 Files) 3DB-TE0703-06.PDF
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3DT-TE0703-06.PDF
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PDF3D-TE0703-06-D.PDF
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PDF3D-TE0703-06.PDF
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Other Files (2 Files)
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TE0703+TRM-v41-20191007_0821.pdf
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Files SC-PGM-TE703-0203040506_CC0703S-02_20171013.zip
Size
SC-PGM-TE703-02030405_CC0703S-02_TE0715_CPLD_access_20190703.zip
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Files[-] Close all Programming files of CPLD Firmware (1 Files) SC-PGM-TE0703-0506_CARRIER-03_20220815.zip
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Source Code of CPLD Firmware (1 Files) SC-PRJ-TE0703-0506_CARRIER-03_20220815.zip
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Trace Lengths (0 Files) Altium Project and Libraries (1 Files) AP-TE0703-06.zip
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TE0703-06_bottom.jpg
Size
TE0703-06_plus_Stiftleisten.jpg
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TE0703-06_top.jpg
Size
REV07 - PCB Revision: Schematics, AD, STEP, HW Design Files and more ...
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Schematics (2 Files) SCH-TE0703-07-D.PDF
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SCH-TE0703-07.PDF
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Assembly Diagrams (2 Files) AD-TE0703-07-D.PDF
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AD-TE0703-07.PDF
Size
3D PDF (2 Files) 3DB-TE0703-07.PDF
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3DT-TE0703-07.PDF
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Other Files (1 Files) Firmware - Initial Configuration for diverse PCB components, like CPLD, PLL and ...
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Source Code of CPLD Firmware (1 Files) SC-PRJ-TE0703-0506_CARRIER-03_20220815.zip
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Other Files (0 Files)
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Trace Lengths (0 Files) Altium Project and Libraries (1 Files) AP-TE0703-07.zip
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Source Code of CPLD Firmware (1 Files) SC-PRJ-TE705-02_VADJFIXED1V8-01_20160217.zip
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Other Files (0 Files)
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Assembly Diagrams (1 Files) AD-TE0705-03.PDF
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3D PDF (0 Files) Other Files (0 Files)
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SC-PGM-TE705-03_VADJFIXED1V8-01_20160204.zip
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Source Code of CPLD Firmware (1 Files) SC-PRJ-TE705-03_VADJFIXED1V8-01_20160217.zip
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Other Files (0 Files)
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Trace Lengths (0 Files) Altium Project and Libraries (0 Files) Electronic Design Interchange Format(EDIF) (0 Files) Gerber Files (0 Files) Other Files (0 Files)
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TE0705_bottom.jpg
Size
TE0705_top.jpg
Size
REV04 - PCB Revision: Schematics, AD, STEP, HW Design Files and more ...
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Schematics (1 Files) SCH-TE0705-04.PDF
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Assembly Diagrams (1 Files) AD-TE0705-04.PDF
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3D PDF (3 Files) 3DB-TE0705-04.PDF
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3DT-TE0705-04.PDF
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PDF3D-TE0705-04.PDF
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Other Files (0 Files)
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Files SC-PGM-TE705-04_CC705-02_20161115.zip
Size
SC-PRJ-TE705-04_CC705-02_20161115.zip
Size
Files[-] Close all Programming files of CPLD Firmware (1 Files) SC-PGM-TE0705-PCB_REV0304-CARRIER-CPLD_REV03-20230329.zip
Size
Source Code of CPLD Firmware (1 Files) SC-PRJ-TE0705-PCB_REV0304-CARRIER-CPLD_REV03-20230329.zip
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Other Files (0 Files)
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Trace Lengths (0 Files) Altium Project and Libraries (1 Files) AP-TE0705-04.zip
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TE0705-04 top.jpg
Size
TE0706 - Carrierboard for 4x5 modules
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PCN-20190105 TE0706-02 to TE0706-03 Hardware Revision Change-v10-20190513_1152.pdf
Size
PCN-20190827 TE0706-03 Under Voltage Protection Change-v8-20190905_0847.pdf
Size
PCN-20231106 TE0706-03 BOM Change.pdf
Size
PCN-20240614 TE0706-03 to TE0706-04 Hardware Revision Change.pdf
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Other Files (0 Files)
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Assembly Diagrams (1 Files) AD-TE0706-01.PDF
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3D PDF (0 Files) Other Files (0 Files)
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Trace Lengths (0 Files) Altium Project and Libraries (0 Files) Electronic Design Interchange Format(EDIF) (0 Files) Gerber Files (0 Files) Other Files (0 Files)
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Size
TE0706-bottom.jpg
Size
TE0706-top.jpg
Size
REV02 - PCB Revision: Schematics, AD, STEP, HW Design Files and more ...
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Size
Schematics (2 Files) SCH-TE0706-02.PDF
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SCH-TE0706-D-02.PDF
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Assembly Diagrams (2 Files) AD-TE0706-02.PDF
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AD-TE0706-D-02.PDF
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3D PDF (5 Files) 3DB-TE0706-02.PDF
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3DB-TE0706-D-02.PDF
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3DT-TE0706-02.PDF
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3DT-TE0706-D-02.PDF
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PDF3D-TE0706-02.PDF
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Other Files (0 Files)
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STP-TE0706-D-02.zip
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Trace Lengths (0 Files) Altium Project and Libraries (1 Files) AP-TE0706-02.zip
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TE0706-02_angle1.jpg
Size
TE0706-02_bottom.jpg
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TE0706-02_top.jpg
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REV03 - PCB Revision: Schematics, AD, STEP, HW Design Files and more ...
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Size
Schematics (2 Files) SCH-TE0706-03-D.PDF
Size
SCH-TE0706-03.PDF
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Assembly Diagrams (2 Files) AD-TE0706-03-D.PDF
Size
AD-TE0706-03.PDF
Size
3D PDF (5 Files) 3DB-TE0706-03-D.PDF
Size
3DB-TE0706-03.PDF
Size
3DT-TE0706-03-D.PDF
Size
3DT-TE0706-03.PDF
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PDF3D-TE0706-03.PDF
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Other Files (1 Files) HW_Design - PCB Design relevant files, like PCB-STEP-Model, Cooler-STEP-Model, Trace-length, Altium libraries / projects (only for selected carrier boards), and ...
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STP-TE0706-03.zip
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Trace Lengths (0 Files) Altium Project and Libraries (1 Files) AP-TE0706-03.zip
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Size
TE0706-03_bottom.jpg
Size
TE0706-03_plus_Stiftleiste.jpg
Size
TE0706-03_top.jpg
Size
TEB0707 - Carrierboard for 4x5 modules
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Other Files (0 Files)
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Schematics (1 Files) SCH-TEB0707-02-Default.PDF
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Assembly Diagrams (1 Files) AD-TEB0707-02-Default.PDF
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3D PDF (3 Files) 3DB-TEB0707-02-No Variations.PDF
Size
3DT-TEB0707-02-No Variations.PDF
Size
PDF3D-TEB0707-02-No Variations.PDF
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Other Files (1 Files) Firmware - Initial Configuration for diverse PCB components, like CPLD, PLL and ...
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Source Code of CPLD Firmware (1 Files) SC-PRJ-TEB0707-02_CCB0707-01_20200702.zip
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Other Files (0 Files)
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Trace Lengths (0 Files) Altium Project and Libraries (1 Files) AP-TEB0707-02.zip
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TEB0707-02 angle1.jpg
Size
TEB0707-02 bottom.jpg
Size
TEB0707-02 top.jpg
Size
TEB2000 - Carrierboard for 4x5 modules Microship Modules like TEM0007,...
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Assembly Diagrams (1 Files) AD-TEB2000-01-T001.PDF
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3D PDF (2 Files) 3DB-TEB2000-01.PDF
Size
3DT-TEB2000-01.PDF
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Other Files (1 Files) Firmware - Initial Configuration for diverse PCB components, like CPLD, PLL and ...
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Source Code of CPLD Firmware (0 Files) Other Files (0 Files)
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Trace Lengths (0 Files) Altium Project and Libraries (1 Files) AP-TEB2000_REV01.zip
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Schematics (1 Files) SCH-TEBA0841-01.PDF
Size
Assembly Diagrams (1 Files) AD-TEBA0841-01.PDF
Size
3D PDF (2 Files) 3DB-TEBA0841-01.PDF
Size
3DT-TEBA0841-01.PDF
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Other Files (1 Files) HW_Design - PCB Design relevant files, like PCB-STEP-Model, Cooler-STEP-Model, Trace-length, Altium libraries / projects (only for selected carrier boards), and ...
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Trace Lengths (0 Files) Altium Project and Libraries (1 Files) AP-TEBA0841_01.zip
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Electronic Design Interchange Format(EDIF) (0 Files) Gerber Files (0 Files) Other Files (0 Files)
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TEBA0841-01_1.jpg
Size
TEBA0841-01_2.jpg
Size
REV02 - PCB Revision: Schematics, AD, STEP, HW Design Files and more ...
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Size
Schematics (1 Files) SCH-TEBA0841-02.PDF
Size
Assembly Diagrams (2 Files) AD-TEBA0841-02.PDF
Size
AD-TEBA0841-02Full.PDF
Size
3D PDF (4 Files) 3DB-TEBA0841-02.PDF
Size
3DT-TEBA0841-02.PDF
Size
PDF3D-TEBA0841-02.PDF
Size
PDF3D-TEBA0841-02Full.PDF
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Other Files (1 Files) HW_Design - PCB Design relevant files, like PCB-STEP-Model, Cooler-STEP-Model, Trace-length, Altium libraries / projects (only for selected carrier boards), and ...
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Trace Lengths (0 Files) Altium Project and Libraries (1 Files) AP-TEBA0841-02.zip
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Electronic Design Interchange Format(EDIF) (0 Files) Gerber Files (0 Files) Other Files (0 Files)
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Size
TEBA0841-02_angle2.jpg
Size
TEBA0841-02_bottom.jpg
Size
TEBA0841-02_top.jpg
Size
TEF1002 - Carrierboard for 4x5 modules
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Other Files (0 Files)
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Size
Schematics (1 Files) SCH-TEF1002-02.PDF
Size
Assembly Diagrams (1 Files) AD-TEF1002-02-default.PDF
Size
3D PDF (3 Files) 3DB-TEF1002-02-No Variations.PDF
Size
3DT-TEF1002-02-No Variations.PDF
Size
PDF3D-TEF1002-02-No Variations.PDF
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Other Files (1 Files) Firmware - Initial Configuration for diverse PCB components, like CPLD, PLL and ...
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Source Code of CPLD Firmware (1 Files) SC-PRJ-TEF1002-02_CCF1002-03_20200313.zip
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Other Files (0 Files)
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Trace Lengths (0 Files) Altium Project and Libraries (1 Files) AP-TEF1002-02.zip
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Size
TEF1002-02_bottom.jpg
Size
TEF1002-02_top.jpg
Size
TE0600 - GigaBee series (Xilinx Spartan-6 Micromodules with Gigabit Ethernet and baseboard)
- Sollten Sie die von Ihnen benötigten Dokumente nicht gefunden haben, wenden Sie sich bitte an den Trenz Electronic Support (support[at]trenz-electronic.de).
Directory | Content | ||
---|---|---|---|
PCN | Product change notifications: Important changes between hardware revisions | ||
Reference Design | Reference Designs sort by ISE/EDK Version | ||
REV0x | Documents and source files sorted by PCB revision. Connector Pinout Viewer/XDC-Generator available on TE Master Pinout, as well as a additional informations on All Trenz Electronic SoMs | ||
Documents | PDF documents, like Technical Reference Manual, Schematics, Assembly Diagrams and... | ||
Firmware | Initial configuration for diverse PCB components, like CPLD, PLL and ... | ||
HW Design | Relevant files for PCB-Design, like PCB-STEP-Model, Cooler-STEP-Model, Trace-length, Altium libraries / projects (only for selected carrier boards), and ... | ||
Pictures | PCB-Pictures |
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Trenz Electronic TE0600: Hardware revision 02 released.
Size
PCN-20160825 TE0600-02 to TE0600-03 Hardware Revision Change.pdf
Size
PCN-20171110 TE0600-03 SPI Flash Change.pdf
Size
PCN-20210114 TE0600-03 DDR3 Change and Product Update-v6-02_16_2021.pdf
Size
PCN-20240124 TE0600-03 to TE0600-04 Hardware Revision Change.pdf
Size
Other Files (0 Files)
Documents - Technical Reference Manual, Schematics, Assembly Diagrams and ..
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Size
Assembly Diagrams (2 Files) AD-TE0600-01.pdf Assembly diagram
Size
AD-TE0600-all-01.PDF
Size
3D PDF (0 Files) Other Files (2 Files)
Size
UM-TE0600-01.pdf User manual for revision 01
Size
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Size
STP-26920-TE0600-Heatsink.step.zip
Size
STP-TE0600-01 GigaBee.3D-STEP.zip Trenz Electronic TE0600 series modules:
- 3D STEP (ISO 10303) model
Size
Trace Lengths (0 Files) Other Files (1 Files) Pictures - PCB pictures
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Size
TE0600-00.bottom.jpg
Size
TE0600-00.top.jpg
Size
TE0600-01.angle IMG_1959.tif
Size
TE0600-01.angle.jpg
Size
REV02 - PCB Revision
Documents - Technical Reference Manual, Schematics, Assembly Diagrams and ..
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Assembly Diagrams (1 Files) AD-TE0600-02.pdf Assembly diagram
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3D PDF (0 Files) Other Files (2 Files)
Size
UM-TE0600-02.pdf User manual for revision 02
Size
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Size
STP-26920-TE0600-Heatsink.step.zip
Size
STP-TE0600-02 GigaBee.3D-STEP.zip Trenz Electronic TE0600 series modules:
- 3D STEP (ISO 10303) model
Size
Trace Lengths (1 Files) TL-PO-TE0600-pinouts+tracelengths.zip Pin-out lists and signal line lengths for Trenz Electronic TE0600 B2B connector
Size
Other Files (2 Files)
Size
TE0600 GigaBee.LIB-Eagle.lbr.zip Trenz Electronic TE0600 (GigaBee): module and connectors footprint:
- document type: EAGLE SYSTEM
- EAGLE version: 6.1
Size
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TE0600-02.angle.jpg
Size
REV03 - PCB Revision
Documents - Technical Reference Manual, Schematics, Assembly Diagrams and ..
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-
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Size
Schematics (16 Files) SCH-TE0600-03-52I11-A.PDF
Size
SCH-TE0600-03-52I11-C.PDF
Size
SCH-TE0600-03-52I11-M.PDF
Size
SCH-TE0600-03-52I11-W.PDF
Size
SCH-TE0600-03-72C11-A.PDF
Size
SCH-TE0600-03-72C21-A.PDF
Size
SCH-TE0600-03-83C21-A.PDF
Size
SCH-TE0600-03-83I11-A.PDF
Size
SCH-TE0600-03-83I21-A.PDF
Size
SCH-TE0600-03.PDF
Size
SCH-TE0600-03B.PDF
Size
SCH-TE0600-03BM.PDF
Size
SCH-TE0600-03I.PDF
Size
SCH-TE0600-03IMVF.PDF
Size
SCH-TE0600-03IN.PDF
Size
SCH-TE0600-03IVF.PDF
Size
Assembly Diagrams (16 Files) AD-TE0600-03-52I11-A.PDF
Size
AD-TE0600-03-52I11-C.PDF
Size
AD-TE0600-03-52I11-M.PDF
Size
AD-TE0600-03-52I11-W.PDF
Size
AD-TE0600-03-72C11-A.PDF
Size
AD-TE0600-03-72C21-A.PDF
Size
AD-TE0600-03-83C21-A.PDF
Size
AD-TE0600-03-83I11-A.PDF
Size
AD-TE0600-03-83I21-A.PDF
Size
AD-TE0600-03.PDF
Size
AD-TE0600-03B.PDF
Size
AD-TE0600-03BM.PDF
Size
AD-TE0600-03I.PDF
Size
AD-TE0600-03IMVF.PDF
Size
AD-TE0600-03IN.PDF
Size
AD-TE0600-03IVF.PDF
Size
3D PDF (2 Files) 3DB-TE0600-03.PDF
Size
3DT-TE0600-03.PDF
Size
Other Files (1 Files) Firmware - Initial Configuration for diverse PCB components, like CPLD, PLL and ...
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Trace Lengths (0 Files) Other Files (1 Files) Pictures - PCB pictures
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TE0600-03B_1.jpg
Size
TE0600-03B_2.jpg
Size
TE0600-03I_0.jpg
Size
TE0600-03I_1.jpg
Size
TE0600-03I_2.jpg
Size
REV04 - PCB Revision
Documents - Technical Reference Manual, Schematics, Assembly Diagrams and ..
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Schematics (7 Files) SCH-TE0600-04-52I11-A.PDF
Size
SCH-TE0600-04-52I11-M.PDF
Size
SCH-TE0600-04-72C11-A.PDF
Size
SCH-TE0600-04-72C21-A.PDF
Size
SCH-TE0600-04-83C21-A.PDF
Size
SCH-TE0600-04-83I11-A.PDF
Size
SCH-TE0600-04-83I21-A.PDF
Size
Assembly Diagrams (7 Files) AD-TE0600-04-52I11-A.PDF
Size
AD-TE0600-04-52I11-M.PDF
Size
AD-TE0600-04-72C11-A.PDF
Size
AD-TE0600-04-72C21-A.PDF
Size
AD-TE0600-04-83C21-A.PDF
Size
AD-TE0600-04-83I11-A.PDF
Size
AD-TE0600-04-83I21-A.PDF
Size
3D PDF (2 Files) 3DB-TE0600-04-No Variations.PDF
Size
3DT-TE0600-04-No Variations.PDF
Size
Other Files (1 Files) Firmware - Initial Configuration for diverse PCB components, like CPLD, PLL and ...
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- Please read the Legal Notices before downloading Trenz Electronic documents and files.
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Trace Lengths (0 Files) Other Files (1 Files) Pictures - PCB pictures
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12.1
Files TE0600-GigaBee_v3_EDK12.zip
Size
12.4
Files TE0600-GigaBee_XC6SLX-MIG-ISE-12.4-v1.0.f79134d.zip Hardware: Trenz Electronic TE0600) GigaBee XC6SLX
Reference design: Memory Interface Generator 3.61 project ported to TE0600 (GigaBee)
Development environment: Xilinx ISE PN v12.4
Size
13.1
Files TE0600-GigaBee_UDP-Datalogger-ISE-13.1-v1.0.f79134d.zip Hardware: Trenz Electronic GigaBee XC6SLX45
Development environment: Xilinx ISE XMP v13.1
This project demonstrates how to use the GigaBee module with its baseboard (equipped with an ethernet connector) as a data logger with 16 digital inputs and 16 digital outputs. Broadcast UDP packets are transmitted to a Gigabit Ethernet network.
Gigabit Ethernet only design, it does not work with 100 megabit Ethernet.
Size
13.2
Files TE0600-GigaBee_XC6LX-Axi-EDK-13.2-v1.0.f79134d.zip Recommended starting point for EDK-based designs
Hardware: Trenz Electronic TE0600 (GigaBee) XC6SLX100
Development environment: Xilinx ISE XMP v13.2
This HW project is derived from SP605_AXI (Gigabit Ethernet, DMA, 100 MHz Microblaze) of Xilinx XAPP1026 "LightWeight IP (lwIP) Application Examples"
http://www.xilinx.com/support/documentation/application_notes/xapp1026.pdf
Software from XAPP1026 is fully compatible with this HW design.
Remarks:
- PARAMETER C_USE_BRANCH_TARGET_CACHE was set to 0 to meet timing requirements.
- When upgrading to ISE XMP v13.3 or higher, we reccommend NOT to upgrade the AXI_ETHERNET core to v3.00.a, as we could not get it work!
- Re-implement to specific FPGA device (LX45, LX150) by
- setting the proper FPGA device in project options and
- uncommenting the corresponding IDELAY_VALUE at the beginning of data/system.ucf file!
Size
TE0600-GigaBee_XC6LX-Axi_lite-EDK-13.2-v1.0.04f6314.zip Hardware: Trenz Electronic TE0600 (GigaBee) XC6SLX100
Development environment: Xilinx ISE XMP v13.1
Software from Xilinx XAPP1026 "LightWeight IP (lwIP) Application Examples"
http://www.xilinx.com/support/documentation/application_notes/xapp1026.pdf
is fully compatible with this HW design, derived from SP601_AXI reference design (10/100 EthernetLite, 100 MHz Microblaze).
Size
TE0600-GigaBee_XC6LX-blinker_test-ISE-13.2-v1.0.f79134d.zip Sample project for a blinking LED on a Trenz Electronic TE0600 (GigaBee) FPGA module:
- Xilinx ISE version: 13.2
- language: VHDL
Size
14.2
Files GigaBee_XPS14.2-Base-v1.0.11f30ae.zip Hardware: Trenz Electronic TE0600 (GigaBee) XC6SLX100
Development environment: Xilinx EDK v14.2
This project show simple FIFO-based access to Ethernet. Software part contain support of ARP ICMP and UDP/TFTP. Files received by TFTP writed to Flash.
Default IP Address 192.168.42.88.
For new modules with Memphis 4G DDR3 chips replace system.mhs by system.mhs.memphis.
Please note: the design without license for AXI_Ethernet will work only 8 hours.
Size
GigaBee_XPS14.2-FlashWriter-v1.0.11f30ae.zip Hardware: Trenz Electronic TE0600 (GigaBee) XC6SLX100
Development environment: Xilinx ISE XMP v14.2
This project provide example of QSPI Flash update using custom protocol and tools
Please note: the design without license for AXI_Ethernet will work only 8 hours.
Size
TE0603 - Baseboard for GigaBee module
Directory | Content | ||
---|---|---|---|
PCN | Product change notifications: Important changes between hardware revisions | ||
REV0x | Documents and source files sorted by PCB revision. Connector Pinout Viewer/XDC-Generator available on TE Master Pinout, as well as a additional informations on All Trenz Electronic SoMs | ||
Documents | PDF documents, like Technical Reference Manual, Schematics, Assembly Diagrams and... | ||
Firmware | Initial configuration for diverse PCB components, like CPLD, PLL and ... | ||
HW Design | Relevant files for PCB-Design, like PCB-STEP-Model, Cooler-STEP-Model, Trace-length, Altium libraries / projects (only for selected carrier boards), and ... | ||
Pictures | PCB-Pictures |
- If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
- Please read the Legal Notices before downloading Trenz Electronic documents and files.
-
If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
Documents - Technical Reference Manual, Schematics, Assembly Diagrams and ..
- Please read the Legal Notices before downloading Trenz Electronic documents and files.
-
If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
Size
Assembly Diagrams (1 Files) AD-TE0603-01.PDF
Size
3D PDF (0 Files) Other Files (0 Files)
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If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
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-
If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
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If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
Size
TE603+TE600.top.jpg
Size
TE603.top.jpg
Size
REV02 - PCB Revision
Documents - Technical Reference Manual, Schematics, Assembly Diagrams and ..
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If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
Size
Assembly Diagrams (1 Files) AD-TE0603-02.pdf Assembly diagram
Size
3D PDF (0 Files) Other Files (1 Files) Firmware - Initial Configuration for diverse PCB components, like CPLD, PLL and ...
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If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
- Please read the Legal Notices before downloading Trenz Electronic documents and files.
- Trenz Electronic use STEP-Models from different sources. Depending from model and soldering process the real dimension (especial maximum height) can be vary from the STEP-Models.
-
If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
Size
GB-TE0603-02.zip Trenz Electronic TE0603 Prototyping Baseboard hardware source files:
- Gerber files
- NC (numerical control) drill files
Size
TE0603-02.PRJ-Altium.zip Trenz Electronic TE0603 Prototyping Baseboard hardware source files:
- Altium Designer: Project file
- Altium Designer: schematic diagram
- Altium Designer: PCB layout
Size
- Please read the Legal Notices before downloading Trenz Electronic documents and files.
-
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Documents - Technical Reference Manual, Schematics, Assembly Diagrams and ..
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-
If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
Size
SCH-TE0603-03C1.PDF
Size
SCH-TE0603-03NP.PDF
Size
Assembly Diagrams (3 Files) AD-TE0603-03.PDF
Size
AD-TE0603-03C1.PDF
Size
AD-TE0603-03NP.PDF
Size
3D PDF (6 Files) 3DB-TE0603-03.PDF
Size
3DB-TE0603-03C1.PDF
Size
3DB-TE0603-03NP.PDF
Size
3DT-TE0603-03.PDF
Size
3DT-TE0603-03C1.PDF
Size
3DT-TE0603-03NP.PDF
Size
Other Files (1 Files) Firmware - Initial Configuration for diverse PCB components, like CPLD, PLL and ...
- Please read the Legal Notices before downloading Trenz Electronic documents and files.
-
If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
- Please read the Legal Notices before downloading Trenz Electronic documents and files.
- Trenz Electronic use STEP-Models from different sources. Depending from model and soldering process the real dimension (especial maximum height) can be vary from the STEP-Models.
-
If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
Size
Trace Lengths (0 Files) Altium Project and Libraries (1 Files) AP-TE0603-03.zip
Size
Electronic Design Interchange Format(EDIF) (0 Files) Gerber Files (0 Files) Other Files (0 Files)
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TE0710 - Xilinx Artix FPGA modules
- If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
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Other Files (0 Files)
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PCN-20201005 TE0710-02 DDR Change.pdf
Size
PCN-20230620 TE0710-02 to TE0710-03 Hardware Revision Change.pdf
Size
Other Files (0 Files)
- If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
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Size
TRM-TE0710_02-v.9-01_13_2021.pdf
Size
Schematics (8 Files) SCH-TE0710-02-100-1Q.PDF
Size
SCH-TE0710-02-100-2CF.PDF
Size
SCH-TE0710-02-100-2CFV.PDF
Size
SCH-TE0710-02-100-2IF.PDF
Size
SCH-TE0710-02-35-2CF.PDF
Size
SCH-TE0710-02-35-2IF.PDF
Size
SCH-TE0710-02-42I21-A.PDF
Size
SCH-TE0710-02-72I21-A.PDF
Size
Assembly Diagrams (8 Files) AD-TE0710-02-100-1Q.PDF
Size
AD-TE0710-02-100-2CF.PDF
Size
AD-TE0710-02-100-2CFV.PDF
Size
AD-TE0710-02-100-2IF.PDF
Size
AD-TE0710-02-35-2CF.PDF
Size
AD-TE0710-02-35-2IF.PDF
Size
AD-TE0710-02-42I21-A.PDF
Size
AD-TE0710-02-72I21-A.PDF
Size
3D PDF (2 Files) 3DB-TE0710-02.PDF
Size
3DT-TE0710-02.PDF
Size
Other Files (0 Files)
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Size
SC-PGM-TE0710-02_SC0710-02_preliminary_20210520.zip
Size
SC-PGM-TE0710-02_SC0710-02v.5-02_15_2024.pdf
Size
Source Code of CPLD Firmware (0 Files) Other Files (0 Files)
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Size
STP-26925-TE0710-Heatsink.zip
Size
STP-TE0710-02.zip
Size
Trace Lengths (1 Files) TL-TE0710-02.xls
Size
Other Files (0 Files)
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Size
TE0710-02-100-2CF bottom.jpg
Size
TE0710-02-100-2CF top.jpg
Size
TE0710-02-100-2CF_angle.jpg
Size
TE0710-02-100-2CF_bottom.jpg
Size
TE0710-02-100-2CF_top.jpg
Size
TE0710-02-100-2IF_angle.jpg
Size
TE0710-02-100-2IF_bottom.jpg
Size
TE0710-02-100-2IF_top.jpg
Size
TE0710-02-35-2CF angle.jpg
Size
TE0710-02-35-2CF bottom.jpg
Size
TE0710-02-35-2CF top.jpg
Size
TE0710-02-35-2IF_angle.jpg
Size
TE0710-02-35-2IF_bottom.jpg
Size
TE0710-02-35-2IF_top.jpg
Size
TE0710-02-42I21-A angle.jpg
Size
TE0710-02-42I21-A bottom.jpg
Size
TE0710-02-42I21-A top.jpg
Size
TE0710-02-72I21-A angle.jpg
Size
TE0710-02-72I21-A bottom.jpg
Size
TE0710-02-72I21-A top.jpg
Size
TE0710-02_back.jpg
Size
TE0710-02_back_angle.jpg
Size
TE0710-02_front.jpg
Size
TE0710-02_front_angle.jpg
Size
REV03 - PCB Revision: Schematics, AD, STEP, HW Design Files and more ...
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-
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Size
SCH-TE0710-03-42I21-A.PDF
Size
SCH-TE0710-03-72C21-A.PDF
Size
SCH-TE0710-03-72I21-A.PDF
Size
Assembly Diagrams (4 Files) AD-TE0710-03-42C21-A.PDF
Size
AD-TE0710-03-42I21-A.PDF
Size
AD-TE0710-03-72C21-A.PDF
Size
AD-TE0710-03-72I21-A.PDF
Size
3D PDF (2 Files) 3DB-TE0710-03-No Variations.PDF
Size
3DT-TE0710-03-No Variations.PDF
Size
Other Files (1 Files) Firmware - Initial Configuration for diverse PCB components, like CPLD, PLL and ...
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Files SC-PGM-TE0710-02_SC0710-01_20150417.zip
Size
SC-PGM-TE0710-02_SC0710-02_preliminary_20210520.zip
Size
SC-PGM-TE0710-02_SC0710-02v.5-02_15_2024.pdf
Size
Files[-] Close all Programming files of CPLD Firmware (1 Files) SC-PGM-TE0710-03_SC0710-03_20240215.zip
Size
Source Code of CPLD Firmware (0 Files) Other Files (0 Files)
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Files TE0710-02.zip
Size
2015.4
test_board - MicroBlaze Basic-System
Short Description:
Excerpt of special Block-Design components/interfaces:
Component | Description |
---|---|
Interface IPs | DDR3, GPIO, Uart0, QSPI and Ethernet |
Additional Software Application for SDK/HSI and Linux:
Application | Description |
---|---|
hello_world | Xilinx Hello World Example (.elf file only) |
Additional content in the larger ZIP with prebuilt-folders:
File | File-Extension | Description |
---|---|---|
MCS-File | *.mcs | Flash Configuration File with Boot-Image (MicroBlaze or FPGA part only) |
Bit-File | *.bit | FPGA Configuration File |
Software-Application-File | *.elf | Software Application for Zynq or MicroBlaze Processor Systems |
Hardware-Platform-Specification-Files | *.hdf | Hardware Specification from the vivado project. Used in SDK/HSI |
MMI-File | *.mmi | File with BRAM-Location to generate MCS or BIT-File with *.elf content (MicroBlaze only) |
Diverse Reports | -- | Report files in different formats |
Size
TE0710-test_board_noprebuilt-vivado_2015.4-build_32_20160504095457.zip
Size
2016.1
f32c_arduino
Files TE0710-f32c_demo-vivado_2016.1-build_33_20160529154358.zip
Size
TE0710-f32c_demo_noprebuilt-vivado_2016.1-build_33_20160529154512.zip
Size
2016.2
test_board - TE0710 MicroBlaze System
TE0710 MicroBlaze System
-Downloadable files are located below the description-
Component | Description |
---|---|
Xilinx-IP | MicroBlaze, MB-Debug, Uartlite, MIG7 for DDR3, QSPI, Timer, Ethernet Lite |
TE-IP | ASIO GPIO (AXI-Stream to GPIO) |
Application | Description |
---|---|
Hello World | Xilinx Hello world ( generate elf file only) |
Name | Folder | Description |
---|
File | File-Extension | Description |
---|---|---|
MCS-File | *.mcs | Flash Configuration File with Boot-Image (MicroBlaze or FPGA part only) |
BIT-File | *.bit | FPGA Configuration File |
Software-Application-File | *.elf | Software Application for Zynq or MicroBlaze Processor Systems |
Hardware-Platform-Specification-Files | *.hdf | Exported Vivado Hardware Specification for SDK/HSI |
MMI-File | *.mmi | File with BRAM-Location to generate MCS or BIT-File with *.elf content (MicroBlaze only) |
Diverse Reports | -- | Report files in different formats |
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Size
te0710-test_board_noprebuilt-vivado_2016.2-build_07_20161011104229.zip
Size
unio_mac - TE0710 UNIO MAC
TE0710 UNIO MAC
-Downloadable files are located below the description-
Component | Description |
---|---|
Xilinx-IP | VIO,ILA |
TE-IP | unio_mac |
Application | Description |
---|
Name | Folder | Description |
---|
File | File-Extension | Description |
---|---|---|
BIT-File | *.bit | FPGA Configuration File |
DebugProbes-File | *.ltx | Definition File for Vivado/Vivado Labtools Debugging Interface |
Diverse Reports | --- | Report files in different formats |
Hardware-Platform-Specification-Files | *.hdf | Exported Vivado Hardware Specification for SDK/HSI |
LabTools Project-File | *.lpr | Vivado Labtools Project File |
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Size
te0710-unio_mac_noprebuilt-vivado_2016.2-build_07_20161103131728.zip
Size
2017.4
test_board - TE0710 Basic Linux Example
TE0710 Basic Linux Example
-Downloadable files are located below the description-
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Size
Reference Design - Source Code and Configuration Files (1 Files) te0710-test_board-vivado_2017.4-build_07_20180329130739.zip
Size
Reference Design - Documentation (0 Files) Other Files (0 Files)
test_board - TE0710 Basic Linux Example
TE0710 Basic Linux Example
-Downloadable files are located below the description-
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Size
Reference Design - Source Code and Configuration Files (1 Files) TE0710-test_board-vivado_2019.2-build_10_20200421063949.zip
Size
Reference Design - Documentation (1 Files) TE0710-test_board-vivado_2019.2-build_10_v.5-02_04_2022.pdf
Size
Other Files (0 Files)
test_board - TE0710 Basic Linux Example
TE0710 Basic Linux Example
-Downloadable files are located below the description-
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Size
Reference Design - Source Code and Configuration Files (1 Files) TE0710-test_board-vivado_2021.2-build_11_20220216112910.zip
Size
Reference Design - Documentation (1 Files) TE0710-test_board-vivado_2021.2-build_11_v.9-02_19_2024.pdf
Size
Other Files (0 Files)
test_board - TE0710 Basic Linux Example
TE0710 Basic Linux Example
-Downloadable files are located below the description-
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Size
Reference Design - Source Code and Configuration Files (1 Files) TE0710-test_board-vivado_2023.2-build_4_20240219100859.zip
Size
Reference Design - Documentation (0 Files) Other Files (0 Files)
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-
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Other Files (0 Files)
- If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
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-
If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
Size
Schematics (5 Files) SCH-TE0711-01-100-2C.PDF
Size
SCH-TE0711-01-100-2I.PDF
Size
SCH-TE0711-01-100-3E.PDF
Size
SCH-TE0711-01-35-2C.PDF
Size
SCH-TE0711-01-35-2I.PDF
Size
Assembly Diagrams (5 Files) AD-TE0711-01-100-2C.PDF
Size
AD-TE0711-01-100-2I.PDF
Size
AD-TE0711-01-100-3E.PDF
Size
AD-TE0711-01-35-2C.PDF
Size
AD-TE0711-01-35-2I.PDF
Size
3D PDF (2 Files) 3D-TE0711-01-bottom.PDF
Size
3D-TE0711-01-top.PDF
Size
Other Files (0 Files)
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Size
SC-PGM-TE0711-01_SC0711-01_20150417_CPLD-v.3-01_11_2024.pdf
Size
Source Code of CPLD Firmware (0 Files) Other Files (0 Files)
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-
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Trace Lengths (1 Files) TL-NetLenght-TE0711-01.xls
Size
Other Files (0 Files)
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Size
TE0711-01-100-2I_bottom.jpg
Size
TE0711-01-100-2I_top.jpg
Size
TE0711-01-35-2I_angle.jpg
Size
TE0711-01-35-2I_bottom.jpg
Size
TE0711-01-35-2I_top.jpg
Size
REV02 - PCB Revision: Schematics, AD, STEP, HW Design Files and more ...
- If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
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-
If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
Size
SCH-TE0711-02-42I-1-A.PDF
Size
SCH-TE0711-02-72C-1-A.PDF
Size
SCH-TE0711-02-72I-1-A.PDF
Size
Assembly Diagrams (4 Files) AD-TE0711-02-42C-1-A.PDF
Size
AD-TE0711-02-42I-1-A.PDF
Size
AD-TE0711-02-72C-1-A.PDF
Size
AD-TE0711-02-72I-1-A.PDF
Size
3D PDF (2 Files) 3DB-TE0711-02-No Variations.PDF
Size
3DT-TE0711-02-No Variations.PDF
Size
Other Files (2 Files)
Size
PAN-TE0711-02-No Variations.PDF
Size
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Files SC-PGM-TE0711-01_SC0711-01_20150417.zip
Size
SC-PGM-TE0711-01_SC0711-01_20150417_CPLD-v.3-01_11_2024.pdf
Size
Files[-] Close all Programming files of CPLD Firmware (1 Files) SC-PGM-TE0711-02_SC0711-02_20240123.zip
Size
Source Code of CPLD Firmware (0 Files) Other Files (0 Files)
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Trace Lengths (0 Files) Other Files (0 Files)
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- If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
carrier_te0701_design
Files TE0711-TE0711_FT600_loop_noprebuilt-vivado_2015.4-build_30_20160425122452.zip
Size
test_board - MicroBlaze Basic-System
Short Description:
Excerpt of special Block-Design components/interfaces:
Component | Description |
---|---|
Interface IPs | QSPI, Uart, ASIO (Axi-Stream to IO) |
Additional Software Application for SDK/HSI and Linux:
Application | Description |
---|---|
hello_world | Xilinx Hello World Example |
Additional content in the larger ZIP with prebuilt-folders:
File | File-Extension | Description |
---|---|---|
MCS-File | *.mcs | Flash Configuration File with Boot-Image (MicroBlaze or FPGA part only) |
Bit-File | *.bit | FPGA Configuration File |
Software-Application-File | *.elf | Software Application for Zynq or MicroBlaze Processor Systems |
Hardware-Platform-Specification-Files | *.hdf | Hardware Specification from the vivado project. Used in SDK/HSI |
MMI-File | *.mmi | File with BRAM-Location to generate MCS or BIT-File with *.elf content (MicroBlaze only) |
Diverse Reports | -- | Report files in different formats |
Size
TE0711-test_board_noprebuilt-vivado_2015.4-build_32_20160504095506.zip
Size
2016.1
f32c_arduino
Files TE0711-f32c_demo-vivado_2016.1-build_33_20160529162116.zip
Size
TE0711-f32c_demo_noprebuilt-vivado_2016.1-build_33_20160529162135.zip
Size
2016.2
f32c_demo - TE0711 F32C Demo Design
TE0711 F32C Demo Design
-Downloadable files are located below the description-
Component | Description |
---|---|
Xilinx-IP | ILA, VIO, CLK-Wizard |
TE-IP | F32C, Vector_LED, UART_MON |
Application | Description |
---|
Name | Folder | Description |
---|
File | File-Extension | Description |
---|---|---|
BIT-File | *.bit | FPGA Configuration File |
DebugProbes-File | *.ltx | Definition File for Vivado/Vivado Labtools Debugging Interface |
Diverse Reports | --- | Report files in different formats |
LabTools Project-File | *.lpr | Vivado Labtools Project File |
MCS-File | *.mcs | Flash Configuration File with Boot-Image (MicroBlaze or FPGA part only) |
- Please read the Legal Notices before downloading Trenz Electronic documents and files.
Size
TE0711-f32c_demo_noprebuilt-vivado_2016.2-build_07_20161021121719.zip
Size
2017.2
test_board - TE0711 MicroBlaze Design
TE0711 MicroBlaze Design
-Downloadable files are located below the description-
- Please read the Legal Notices before downloading Trenz Electronics documents and files.
Size
Reference Design - Source Code and Configuration Files (1 Files) TE0711-test_board-vivado_2017.2-build_05_20171207122644.zip
Size
Reference Design - Documentation (0 Files) Other Files (0 Files)
test_board - TE0711 MicroBlaze Design
TE0711 MicroBlaze Design
-Downloadable files are located below the description-
- Please read the Legal Notices before downloading Trenz Electronics documents and files.
Size
Reference Design - Source Code and Configuration Files (1 Files) TE0711-test_board-vivado_2019.2-build_14_20200901073500.zip
Size
Reference Design - Documentation (0 Files) Other Files (1 Files) 2021.2
test_board - TE0711 MicroBlaze Design
TE0711 MicroBlaze Design
-Downloadable files are located below the description-
- Please read the Legal Notices before downloading Trenz Electronics documents and files.
Size
Reference Design - Source Code and Configuration Files (1 Files) TE0711-test_board-vivado_2021.2-build_15_20220822132519.zip
Size
Reference Design - Documentation (1 Files) TE0711-test_board-vivado_2021.2-build_15_v.2-01_24_2024.pdf
Size
Other Files (0 Files)
test_board - TE0711 MicroBlaze Design
TE0711 MicroBlaze Design
-Downloadable files are located below the description-
- Please read the Legal Notices before downloading Trenz Electronics documents and files.
Size
Reference Design - Source Code and Configuration Files (1 Files) TE0711-test_board-vivado_2023.2-build_4_20240124092126.zip
Size
Reference Design - Documentation (0 Files) Other Files (0 Files)
- If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
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-
If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
Size
PCN-20210216a TE0712-02 DDR3, Flash Change and Product Update (Revised)-v10-05_18_2021.pdf
Size
PCN-20220825 TE0712-02 to TE0712-03 Revision Change.pdf
Size
Other Files (0 Files)
- If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
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-
If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
Size
SCH-TE0712-01-100-2C.PDF
Size
SCH-TE0712-01-100-2C2.PDF
Size
SCH-TE0712-01-100-2C3.PDF
Size
SCH-TE0712-01-200-1I.PDF
Size
SCH-TE0712-01-200-1IC1.PDF
Size
SCH-TE0712-01-200-2C.PDF
Size
SCH-TE0712-01-200-2C3.PDF
Size
SCH-TE0712-01.PDF
Size
Assembly Diagrams (9 Files) AD-TE0712-01-100-1I.PDF
Size
AD-TE0712-01-100-2C.PDF
Size
AD-TE0712-01-100-2C2.PDF
Size
AD-TE0712-01-100-2C3.PDF
Size
AD-TE0712-01-200-1I.PDF
Size
AD-TE0712-01-200-1IC1.PDF
Size
AD-TE0712-01-200-2C.PDF
Size
AD-TE0712-01-200-2C3.PDF
Size
AD-TE0712-01.PDF
Size
3D PDF (0 Files) Other Files (0 Files)
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-
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Size
Source Code of CPLD Firmware (0 Files) Other Files (1 Files) HW_Design - PCB Design relevant files, like PCB-STEP-Model, Cooler-STEP-Model, Trace-length and ...
- Please read the Legal Notices before downloading Trenz Electronics documents and files.
- Trenz Electronic use STEP-Models from different sources. Depending from model and soldering process the real dimension (especial maximum height) can be vary from the STEP-Models.
-
If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
Size
STP-26924-TE0712-Heatsink.zip
Size
STP-TE0712-01.zip
Size
TL-NetLenght-TE0712-01.XLS
Size
Pictures - PCB pictures
- Please read the Legal Notices before downloading Trenz Electronics documents and files.
-
If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
Size
TE0712-01-100-1I angle2.jpg
Size
TE0712-01-100-1I bottom.jpg
Size
TE0712-01-100-1I top.jpg
Size
REV02 - PCB Revision: Schematics, AD, STEP, HW Design Files and more ...
- If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
- Please read the Legal Notices before downloading Trenz Electronics documents and files.
-
If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
Size
Schematics (35 Files) SCH-TE0712-02-100-1I.PDF
Size
SCH-TE0712-02-100-2C.PDF
Size
SCH-TE0712-02-100-2C2.PDF
Size
SCH-TE0712-02-100-2C3.PDF
Size
SCH-TE0712-02-100-2CA.PDF
Size
SCH-TE0712-02-200-1I.PDF
Size
SCH-TE0712-02-200-1I3.PDF
Size
SCH-TE0712-02-200-1I39.PDF
Size
SCH-TE0712-02-200-2C.PDF
Size
SCH-TE0712-02-200-2C10.PDF
Size
SCH-TE0712-02-200-2C3.PDF
Size
SCH-TE0712-02-200-2C9.PDF
Size
SCH-TE0712-02-200-2I.PDF
Size
SCH-TE0712-02-200-2IC1.PDF
Size
SCH-TE0712-02-35-2I.PDF
Size
SCH-TE0712-02-35-2I9.PDF
Size
SCH-TE0712-02-42I36-A.PDF
Size
SCH-TE0712-02-71I01-M.PDF
Size
SCH-TE0712-02-71I06-M.PDF
Size
SCH-TE0712-02-71I36-A.PDF
Size
SCH-TE0712-02-72C03-M.PDF
Size
SCH-TE0712-02-72C06-M.PDF
Size
SCH-TE0712-02-72C36-A.PDF
Size
SCH-TE0712-02-72C36-C.PDF
Size
SCH-TE0712-02-72C36-L.PDF
Size
SCH-TE0712-02-81I36-A.PDF
Size
SCH-TE0712-02-81I36-L.PDF
Size
SCH-TE0712-02-81I36-X.PDF
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SCH-TE0712-02-82C11-P.PDF
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SCH-TE0712-02-82C36-P.PDF
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SCH-TE0712-02-82I36-A.PDF
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SCH-TE0712-02.PDF
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Assembly Diagrams (35 Files) AD-TE0712-02-100-1I.PDF
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AD-TE0712-02-100-2C.PDF
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AD-TE0712-02-100-2C2.PDF
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AD-TE0712-02-100-2C3.PDF
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AD-TE0712-02-100-2CA.PDF
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AD-TE0712-02-200-1I.PDF
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AD-TE0712-02-200-1I3.PDF
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AD-TE0712-02-200-1I39.PDF
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AD-TE0712-02-200-2C.PDF
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AD-TE0712-02-200-2C10.PDF
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AD-TE0712-02-200-2C3.PDF
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AD-TE0712-02-200-2C9.PDF
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AD-TE0712-02-200-2I.PDF
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AD-TE0712-02-200-2IC1.PDF
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AD-TE0712-02-35-2I.PDF
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AD-TE0712-02-35-2I9.PDF
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AD-TE0712-02-42I36-A.PDF
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AD-TE0712-02-71I01-M.PDF
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AD-TE0712-02-71I06-M.PDF
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AD-TE0712-02-71I36-A.PDF
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AD-TE0712-02-72C03-M.PDF
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AD-TE0712-02-72C06-M.PDF
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AD-TE0712-02-72C36-A.PDF
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AD-TE0712-02-72C36-C.PDF
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AD-TE0712-02-72C36-L.PDF
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AD-TE0712-02-81I36-A.PDF
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AD-TE0712-02-81I36-L.PDF
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AD-TE0712-02-81I36-X.PDF
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AD-TE0712-02-82C11-P.PDF
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AD-TE0712-02-82C36-A.PDF
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AD-TE0712-02-82C36-AW.PDF
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AD-TE0712-02-82C36-L.PDF
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AD-TE0712-02-82C36-P.PDF
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AD-TE0712-02-82I36-A.PDF
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AD-TE0712-02.PDF
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3D PDF (2 Files) 3DB-TE0712-02.PDF
Size
3DT-TE0712-02.PDF
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Other Files (1 Files) Firmware - Initial Configuration for diverse PCB components, like CPLD, PLL and ...
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Files SC-PGM-TE712-02_SC712-01_20140703.zip
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Files[-] Close all Programming files of CPLD Firmware (1 Files) SC-PGM-TE0712-010203_SC712-02_20221020.zip
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Source Code of CPLD Firmware (0 Files) Other Files (2 Files)
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TE0712-02_Si5388RegisterMapping_20140627.zip
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STP-26924-TE0712-Heatsink.zip
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STP-TE0712-02.zip
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Trace Lengths (1 Files) TL-TE0712-02_signal_length_b2b.xls
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Other Files (1 Files) Pictures - PCB pictures
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Size
TE0712-02 bottom.jpg
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TE0712-02 top.jpg
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TE0712-02-100-1I_angle.jpg
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TE0712-02-100-1I_bottom.jpg
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REV03 - PCB Revision: Schematics, AD, STEP, HW Design Files and more ...
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Files[-] Close all Technical Reference Manual (0 Files) Schematics (18 Files) SCH-TE0712-03-42I36-A.PDF
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SCH-TE0712-03-71I01-M.PDF
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SCH-TE0712-03-71I06-M.PDF
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SCH-TE0712-03-71I36-A.PDF
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SCH-TE0712-03-72C03-M.PDF
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SCH-TE0712-03-72C06-M.PDF
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SCH-TE0712-03-72C36-A.PDF
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SCH-TE0712-03-72C36-C.PDF
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SCH-TE0712-03-72C36-L.PDF
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SCH-TE0712-03-81I36-A.PDF
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SCH-TE0712-03-81I36-L.PDF
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SCH-TE0712-03-81I36-X.PDF
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SCH-TE0712-03-82C11-P.PDF
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SCH-TE0712-03-82C36-A.PDF
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SCH-TE0712-03-82C36-AW.PDF
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SCH-TE0712-03-82C36-L.PDF
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SCH-TE0712-03-82C36-P.PDF
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SCH-TE0712-03-82I36-A.PDF
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Assembly Diagrams (18 Files) AD-TE0712-03-42I36-A.PDF
Size
AD-TE0712-03-71I01-M.PDF
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AD-TE0712-03-71I06-M.PDF
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AD-TE0712-03-71I36-A.PDF
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AD-TE0712-03-72C03-M.PDF
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AD-TE0712-03-72C06-M.PDF
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AD-TE0712-03-72C36-A.PDF
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AD-TE0712-03-72C36-C.PDF
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AD-TE0712-03-72C36-L.PDF
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AD-TE0712-03-81I36-A.PDF
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AD-TE0712-03-81I36-L.PDF
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AD-TE0712-03-81I36-X.PDF
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AD-TE0712-03-82C11-P.PDF
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AD-TE0712-03-82C36-A.PDF
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AD-TE0712-03-82C36-AW.PDF
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AD-TE0712-03-82C36-L.PDF
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AD-TE0712-03-82C36-P.PDF
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AD-TE0712-03-82I36-A.PDF
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3D PDF (2 Files) 3DB-TE0712-03-No Variations.PDF
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3DT-TE0712-03-No Variations.PDF
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Other Files (1 Files) Firmware - Initial Configuration for diverse PCB components, like CPLD, PLL and ...
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Source Code of CPLD Firmware (0 Files) Other Files (0 Files)
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test_board - MicroBlaze Basic-System
Short Description:
Excerpt of special Block-Design components/interfaces:
Component | Description |
---|---|
IP-Interfaces | DDR3, QSPI, Uart, I2C, Ethernet, ASIO (AXI-Stream to IO) |
Additional Software Application for SDK/HSI and Linux:
Application | Description |
---|---|
hello_world | Xilinx Hello World Example (.elf only) |
Additional content in the larger ZIP with prebuilt-folders:
File | File-Extension | Description |
---|---|---|
MCS-File | *.mcs | Flash Configuration File with Boot-Image (MicroBlaze or FPGA part only) |
Bit-File | *.bit | FPGA Configuration File |
Software-Application-File | *.elf | Software Application for Zynq or MicroBlaze Processor Systems |
Hardware-Platform-Specification-Files | *.hdf | Hardware Specification from the vivado project. Used in SDK/HSI |
MMI-File | *.mmi | File with BRAM-Location to generate MCS or BIT-File with *.elf content (MicroBlaze only) |
Diverse Reports | -- | Report files in different formats |
Size
TE0712-test_board_noprebuilt-vivado_2015.4-build_35_20160628103432.zip
Size
2016.1
f32c_arduino
Files TE0712-f32c_demo-vivado_2016.1-build_33_20160528151011.zip
Size
TE0712-f32c_demo_noprebuilt-vivado_2016.1-build_33_20160528151024.zip
Size
2016.2
test_board - TE0712 MicroBlaze Basic-System
TE0712 MicroBlaze Basic-System
-Downloadable files are located below the description-
Component | Description |
---|---|
Xilinx-IP | AXI Timer, AXI Interrupt Controller,MIG, AXI QSPI, AXI Uart Lite, AXI I2C, AXI Ethernet Lite, VIO |
TE-IP | ASIO (AXI-Stream to IO), labtools_fmeter |
Application | Description |
---|---|
hello_world | Xilinx Hello World Example (.elf only) |
te_spi_bootloader | SPI Bootloader (.elf only) |
Name | Folder | Description |
---|
File | File-Extension | Description |
---|---|---|
MCS-File | *.mcs | Flash Configuration File with Boot-Image (MicroBlaze or FPGA part only) |
BIT-File | *.bit | FPGA Configuration File |
Software-Application-File | *.elf | Software Application for Zynq or MicroBlaze Processor Systems |
Hardware-Platform-Specification-Files | *.hdf | Exported Vivado Hardware Specification for SDK/HSI |
MMI-File | *.mmi | File with BRAM-Location to generate MCS or BIT-File with *.elf content (MicroBlaze only) |
Diverse Reports | -- | Report files in different formats |
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Size
te0712-test_board_noprebuilt-vivado_2016.2-build_09_20170606105746.zip
Size
2017.2
test_board - TE0712 Basic Linux Example
TE0712 Basic Linux Example
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Size
Reference Design - Source Code and Configuration Files (1 Files) te0712-test_board-vivado_2017.2-build_07_20171215172447.zip
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Reference Design - Documentation (1 Files) te0712-test_board-vivado_2017.2-build_07_v16-20190214_0656.pdf
Size
Other Files (0 Files)
test_board - TE0712 Basic Linux Example
TE0712 Basic Linux Example
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Size
Reference Design - Source Code and Configuration Files (1 Files) te0712-test_board-vivado_2017.4-build_10_20180525155402.zip
Size
Reference Design - Documentation (1 Files) te0712-test_board-vivado_2017.4-build_10_v28-20190214_0657.pdf
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Other Files (0 Files)
test_board - TE0712 Basic Linux Example
TE0712 Basic Linux Example
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Reference Design - Source Code and Configuration Files (1 Files) te0712-test_board-vivado_2018.2-build_03_20180906071356.zip
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Reference Design - Documentation (1 Files) te0712-test_board-vivado_2018.2-build_03_v30-20190214_065547.pdf
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Other Files (0 Files)
test_board - TE0712 Basic Linux Example
TE0712 Basic Linux Example
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Size
Reference Design - Source Code and Configuration Files (1 Files) TE0712-test_board-vivado_2018.3-build_05_20190418082240.zip
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Reference Design - Documentation (0 Files) Other Files (0 Files)
test_board - TE0712 Basic Linux Example
TE0712 Basic Linux Example
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Size
Reference Design - Source Code and Configuration Files (1 Files) TE0712-test_board-vivado_2019.2-build_8_20200325074915.zip
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Reference Design - Documentation (1 Files) TE0712-test_board-vivado_2019.2-build_8_v37-06_28_2021.pdf
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Other Files (0 Files)
test_board - TE0712 Basic Linux Example
TE0712 Basic Linux Example
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Reference Design - Source Code and Configuration Files (1 Files) TE0712-test_board-vivado_2020.2-build_5_20210628072421.zip
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Reference Design - Documentation (1 Files) TE0712-test_board-vivado_2020.2-build_5_-v38-01_10_2022.pdf
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Other Files (0 Files)
test_board - TE0712 Basic Linux Example
TE0712 Basic Linux Example
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Reference Design - Source Code and Configuration Files (1 Files) TE0712-test_board-vivado_2021.2-build_15_20220816131212.zip
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Reference Design - Documentation (1 Files) TE0712-test_board-vivado_2021.2-build_15_v.43-05_08_2023.pdf
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Other Files (0 Files)
test_board - TE0712 Basic Linux Example
TE0712 Basic Linux Example
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Reference Design - Source Code and Configuration Files (1 Files) TE0712-test_board-vivado_2022.2-build_0_20230508174410.zip
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Reference Design - Documentation (1 Files) TE0712-test_board-vivado_2022.2-build_0_v.48-07_29_2024.pdf
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Other Files (0 Files)
test_board - TE0712 Basic Linux Example
TE0712 Basic Linux Example
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Reference Design - Source Code and Configuration Files (1 Files) TE0712-test_board-vivado_2023.2-build_4_20240731113109.zip
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Reference Design - Documentation (0 Files) Other Files (0 Files)
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Size
PCN-20210119a TE0713-02 DDR3 Change (Revised)-v11-05_18_2021.pdf
Size
PCN-20240229 TE0713-02 to TE0713-03 Hardware Revision Change.pdf
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Schematics (2 Files) SCH-TE0713-01-100-2C.PDF
Size
SCH-TE0713-01-200-2C.PDF
Size
Assembly Diagrams (2 Files) AD-TE0713-01-100-2C.PDF
Size
AD-TE0713-01-200-1C.PDF
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3D PDF (2 Files) 3DB-TE0713-01.PDF
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3DT-TE0713-01.PDF
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Source Code of CPLD Firmware (0 Files) Other Files (0 Files)
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Size
TE0713-01-100-2C bottom.jpg
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TE0713-01-100-2C top.jpg
Size
TE0713-01-200-2C angle.jpg
Size
TE0713-01-200-2C bottom.jpg
Size
TE0713-01-200-2C top.jpg
Size
REV02 - PCB Revision: Schematics, AD, STEP, HW Design Files and more ...
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-
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Size
Schematics (4 Files) SCH-TE0713-02-100-2C.PDF
Size
SCH-TE0713-02-200-2C.PDF
Size
SCH-TE0713-02-72C46-A.PDF
Size
SCH-TE0713-02-82C46-A.PDF
Size
Assembly Diagrams (4 Files) AD-TE0713-02-100-2C.PDF
Size
AD-TE0713-02-200-1C.PDF
Size
AD-TE0713-02-72C46-A.PDF
Size
AD-TE0713-02-82C46-A.PDF
Size
3D PDF (2 Files) 3DB-TE0713-02.PDF
Size
3DT-TE0713-02.PDF
Size
Other Files (1 Files) Firmware - Initial Configuration for diverse PCB components, like CPLD, PLL and ...
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Size
Source Code of CPLD Firmware (0 Files) Other Files (0 Files)
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Trace Lengths (0 Files) Other Files (0 Files)
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Size
TE0713-02-100-2C_bottom.jpg
Size
TE0713-02-100-2C_top.jpg
Size
TE0713-02-200-2C_angle.jpg
Size
TE0713-02-200-2C_bottom.jpg
Size
TE0713-02-200-2C_top.jpg
Size
Reference_Design - FPGA Design Examples for different Vivado Versions
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test_board - TE0713 MicroBlaze Basic-System
TE0713 MicroBlaze Basic-System
-Downloadable files are located below the description-
Component | Description |
---|---|
Xilinx-IP | AXI Timer, AXI Interrupt Controller,MIG, AXI QSPI, AXI Uart Lite, AXI I2C, AXI Ethernet Lite |
Application | Description |
---|---|
hello_world | Xilinx Hello World Example (.elf only) |
memory_tests | Xilinx Memory Example (.elf only) |
Name | Folder | Description |
---|
File | File-Extension | Description |
---|---|---|
BIT-File | *.bit | FPGA Configuration File |
Diverse Reports | --- | Report files in different formats |
Hardware-Platform-Specification-Files | *.hdf | Exported Vivado Hardware Specification for SDK/HSI |
LabTools Project-File | *.lpr | Vivado Labtools Project File |
MCS-File | *.mcs | Flash Configuration File with Boot-Image (MicroBlaze or FPGA part only) |
MMI-File | *.mmi | File with BRAM-Location to generate MCS or BIT-File with *.elf content (MicroBlaze only) |
Software-Application-File | *.elf | Software Application for Zynq or MicroBlaze Processor Systems |
- Please read the Legal Notices before downloading Trenz Electronic documents and files.
Size
te0713-test_board_noprebuilt-vivado_2016.4-build_07_20170428101825.zip
Size
2019.2
test_board - TE0713 Basic Linux Example
TE0713 Basic Linux Example
-Downloadable files are located below the description-
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Size
Reference Design - Source Code and Configuration Files (1 Files) TE0713-test_board-vivado_2019.2-build_13_20200709071613.zip
Size
Reference Design - Documentation (1 Files) TE0713-test_board-vivado_2019.2-build_13_v1.pdf
Size
Other Files (0 Files)
test_board - TE0713 Basic Linux Example
TE0713 Basic Linux Example
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Size
Reference Design - Source Code and Configuration Files (1 Files) TE0713-test_board-vivado_2020.2-build_9_20211210090545.zip
Size
Reference Design - Documentation (1 Files) TE0713-test_board-vivado_2020.2-build_9_-v3-01_03_2022.pdf
Size
Other Files (0 Files)
test_board - TE0713 Basic Linux Example
TE0713 Basic Linux Example
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Size
Reference Design - Source Code and Configuration Files (1 Files) TE0713-test_board-vivado_2021.2-build_11_20220216083114.zip
Size
Reference Design - Documentation (0 Files) Other Files (0 Files)
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-
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Size
PCN-20190521 TE0715-04 Level Translator Change-v8-20190524_1719.pdf
Size
PCN-20210120a TE0715-04 DDR3 Change (Revised)-v12-05_18_2021.pdf
Size
PCN-20220309 TE0715-04 to TE0715-05 Hardware Revision Change.pdf
Size
PCN-20240619 TE0715-05 SI5338 OTP Content Update.pdf
Size
Other Files (0 Files)
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Size
SCH-TE0715-02-15.PDF
Size
SCH-TE0715-02-30-1C.PDF
Size
SCH-TE0715-02-30.PDF
Size
Assembly Diagrams (1 Files) AD-TE0715-02.PDF
Size
3D PDF (0 Files) Other Files (0 Files)
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-
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Size
STP-26923-TE0715-Heatsink.zip
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STP-TE0715-02.zip
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Trace Lengths (0 Files) Other Files (0 Files)
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Size
TRM-TE0715-v38.pdf
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Schematics (8 Files) SCH-TE0715-03-15-1C.PDF
Size
SCH-TE0715-03-15-1I.PDF
Size
SCH-TE0715-03-15-1I3.PDF
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SCH-TE0715-03-15-2I.PDF
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SCH-TE0715-03-30-1C.PDF
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SCH-TE0715-03-30-1I.PDF
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SCH-TE0715-03-30-1I3.PDF
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SCH-TE0715-03-30-3E.PDF
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Assembly Diagrams (9 Files) AD-TE0715-03-15-1C.PDF
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AD-TE0715-03-15-1I.PDF
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AD-TE0715-03-15-1I3.PDF
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AD-TE0715-03-15-2I.PDF
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AD-TE0715-03-30-1C.PDF
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AD-TE0715-03-30-1I.PDF
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AD-TE0715-03-30-1I3.PDF
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AD-TE0715-03-30-3E.PDF
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AD-TE0715-03.PDF
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3D PDF (0 Files) Other Files (0 Files)
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Size
Source Code of CPLD Firmware (0 Files) Other Files (0 Files)
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STP-26923-TE0715-Heatsink.zip
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STP-TE0715-03-low profile.zip
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STP-TE0715-03.zip
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Trace Lengths (1 Files) TL-TE0715-03_signal_length_b2b.xls
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Other Files (0 Files)
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TE0715-03-15-2I_bottom.jpg
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TE0715-03-15-2I_top.jpg
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TE0715-03-30-1I_angle.jpg
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TE0715-03-30-1I_bottom.jpg
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TE0715-03-30-1I_top.jpg
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REV04 - PCB Revision: Schematics, AD, STEP, HW Design Files and more ...
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Schematics (24 Files) SCH-TE0715-04-12S-1C.PDF
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SCH-TE0715-04-15-1C.PDF
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SCH-TE0715-04-15-1I.PDF
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SCH-TE0715-04-15-1I3.PDF
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SCH-TE0715-04-15-2I.PDF
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SCH-TE0715-04-21C33-A.PDF
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SCH-TE0715-04-30-1C.PDF
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SCH-TE0715-04-30-1I.PDF
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SCH-TE0715-04-30-1I3.PDF
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SCH-TE0715-04-30-1IA.PDF
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SCH-TE0715-04-30-1IY.PDF
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SCH-TE0715-04-30-3E.PDF
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SCH-TE0715-04-51I33-A.PDF
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SCH-TE0715-04-51I33-AY.PDF
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SCH-TE0715-04-51I33-L.PDF
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SCH-TE0715-04-52I33-A.PDF
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SCH-TE0715-04-52I33-AY.PDF
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SCH-TE0715-04-71C33-A.PDF
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SCH-TE0715-04-71I33-LY.PDF
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SCH-TE0715-04-73E33-A.PDF
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Assembly Diagrams (24 Files) AD-TE0715-04-12S-1C.PDF
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AD-TE0715-04-15-1C.PDF
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AD-TE0715-04-15-1I.PDF
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AD-TE0715-04-15-1I3.PDF
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AD-TE0715-04-15-2I.PDF
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AD-TE0715-04-21C33-A.PDF
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AD-TE0715-04-30-1C.PDF
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AD-TE0715-04-30-1I.PDF
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AD-TE0715-04-30-1I3.PDF
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AD-TE0715-04-30-1IA.PDF
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AD-TE0715-04-30-1IY.PDF
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AD-TE0715-04-30-3E.PDF
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AD-TE0715-04-51I33-A.PDF
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AD-TE0715-04-51I33-AY.PDF
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AD-TE0715-04-51I33-L.PDF
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AD-TE0715-04-52I33-A.PDF
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AD-TE0715-04-52I33-AY.PDF
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AD-TE0715-04-71C33-A.PDF
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AD-TE0715-04-71C33-AY.PDF
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AD-TE0715-04-71I33-A.PDF
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AD-TE0715-04-71I33-L.PDF
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AD-TE0715-04-71I33-LY.PDF
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AD-TE0715-04-73E33-A.PDF
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3D PDF (2 Files) 3DB-TE0715-04.PDF
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3DT-TE0715-04.PDF
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Other Files (1 Files) Firmware - Initial Configuration for diverse PCB components, like CPLD, PLL and ...
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Source Code of CPLD Firmware (0 Files) Other Files (1 Files) HW_Design - PCB Design relevant files, like PCB-STEP-Model, Cooler-STEP-Model, Trace-length and ...
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STP-TE0715-04LP.zip
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Trace Lengths (1 Files) TL-TE0715-04_signal_length_b2b.xls
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Other Files (0 Files)
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TE0715-04-15-1I3_bottom.jpg
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TE0715-04-15-1I3_top.jpg
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TE0715-04-15-1I_angle.jpg
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REV05 - PCB Revision: Schematics, AD, STEP, HW Design Files and more ...
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SCH-TE0715-05-51I33-A.PDF
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SCH-TE0715-05-51I33-L.PDF
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SCH-TE0715-05-52I33-A.PDF
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SCH-TE0715-05-71C33-A.PDF
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SCH-TE0715-05-71I33-A.PDF
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SCH-TE0715-05-71I33-L.PDF
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SCH-TE0715-05-73E33-A.PDF
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Assembly Diagrams (8 Files) AD-TE0715-05-21C33-A.PDF
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AD-TE0715-05-51I33-A.PDF
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AD-TE0715-05-51I33-L.PDF
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AD-TE0715-05-52I33-A.PDF
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AD-TE0715-05-71C33-A.PDF
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AD-TE0715-05-71I33-A.PDF
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AD-TE0715-05-71I33-L.PDF
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AD-TE0715-05-73E33-A.PDF
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3D PDF (2 Files) 3DB-TE0715-05-TE0715-05-No Variations.PDF
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3DT-TE0715-05-TE0715-05-No Variations.PDF
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Other Files (1 Files) Firmware - Initial Configuration for diverse PCB components, like CPLD, PLL and ...
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Files SC-PGM-TE0715-030405_SC715-03_20220808-v.14-06_30_2023.pdf
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SC-PGM-TE0715-030405_SC715-03_20220808.zip
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Files[-] Close all Programming files of CPLD Firmware (1 Files) SC-PGM-TE0715-030405_SC715-04_20230629.zip
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Source Code of CPLD Firmware (0 Files) Other Files (0 Files)
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Trace Lengths (0 Files) Other Files (0 Files)
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hdmi - Zynq Basic-System with HDMI Video Stream
Short Description:
Excerpt of special Block-Design components/interfaces:
Component | Description |
---|---|
Zynq Processor | activated MIO-Interfaces: DDR3, QSPI, GPIO,2x Uart, QSPI,2x I2C,2x SD,1x Ethernet |
Additional Software Application for SDK/HSI and Linux:
Application | Description |
---|---|
zynq_fsbl | Zynq First Stage Bootloader (for hdmi modified and provided as library in /sw_lib/) |
hello_world | Xilinx Hello World Example |
Additional content in the larger ZIP with prebuilt-folders:
File | File-Extension | Description |
---|---|---|
Bin-File | *.bin | Flash Configuration File with Boot-Image for Zynq-FPGAs |
Bit-File | *.bit | FPGA Configuration File |
Software-Application-File | *.elf | Software Application for Zynq or MicroBlace Processor Systems |
Hardware-Platform-Specification-Files | *.hdf | Hardware Specification from the vivado project. Used in SDK/HSI |
BIF-File | *.bif | File with description to generate Bin-File |
OS-Image | *.ub | Image with Linux Kernel (On Petalinux optional with Devicetree and RAM-Disk) |
Diverse Reports | -- | Report files in different formats |
Size
te0715-hdmi_noprebuilt-vivado_2015.4-build_32_20160504095535.zip
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test_board - Zynq Basic-System
Short Description:
Excerpt of special Block-Design components/interfaces:
Component | Description |
---|---|
Zynq Processor | activated MIO-Interfaces: DDR3, QSPI, GPIO,2x Uart, QSPI,2x I2C,1x SD,1x Ethernet |
Additional Software Application for SDK/HSI and Linux:
Application | Description |
---|---|
zynq_fsbl | Zynq First Stage Bootloader |
hello_world | Xilinx Hello World Example |
u-boot | Petalinux-Uboot (image.ub in prebuilt-folder,ex.:/os/petalinux/default) |
Additional content in the larger ZIP with prebuilt-folders:
File | File-Extension | Description |
---|---|---|
Bin-File | *.bin | Flash Configuration File with Boot-Image for Zynq-FPGAs |
Bit-File | *.bit | FPGA Configuration File |
Software-Application-File | *.elf | Software Application for Zynq or MicroBlace Processor Systems |
Hardware-Platform-Specification-Files | *.hdf | Hardware Specification from the vivado project. Used in SDK/HSI |
BIF-File | *.bif | File with description to generate Bin-File |
OS-Image | *.ub | Image with Linux Kernel (On Petalinux optional with Devicetree and RAM-Disk) |
Diverse Reports | -- | Report files in different formats |
Size
te0715-test_board_noprebuilt-vivado_2015.4-build_32_20160504095525.zip
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2016.2
te0715_sdsoc - TE0715 SDSoC
TE0715 SDSoC
-Downloadable files are located below the description-
Short Description:
TE SDSoC User Guide is available on:SDSoC Projects.
The SDSoC project is available as separate ZIP (te0715_<xx>-<yy>-<zz>_sdsoc.zip) or can be created from reference design.
Currently supported Xilinx SDSoC Examples:
- Matrix Multiplication – Standalone/Linux
- Matrix Multiplication (area reduced) – Standalone/Linux
- Matrix Multiplication Data Size (area reduced) - Standalone/Linux
- Pipelined Matrix Multiplication (area reduced) - Linux
- Matrix Multiplication and Addition (area reduced) - Standalone/Linux
- Color Space Conversion - RGB/HSV) - Standalone/Linux
- Synthesizeable FIR Filter) - Standalone/Linux
- File IO Video Processing - Linux
Size
te0715-03-15-2i_sdsoc.zip
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te0715-03-30-1c_sdsoc.zip
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te0715-03-30-1i_sdsoc.zip
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te0715-03-30-3e_sdsoc.zip
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te0715-04-15-1c_sdsoc.zip
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te0715-04-15-1i_sdsoc.zip
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te0715-04-15-2i_sdsoc.zip
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te0715-04-30-1c_sdsoc.zip
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te0715-04-30-1i_sdsoc.zip
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te0715-04-30-3e_sdsoc.zip
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te0715_03-15-1c_sdsoc.zip
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SDSoC Reference Design to create SDSoC Platform (1 Files) te0715-te0715_sdsoc-vivado_2016.2-build_09_20170123152836.zip
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Other Files (0 Files)
TE0715 Test Board
-Downloadable files are located below the description-
Component | Description |
---|---|
PS-MIOs | activated: I2C0, I2C1, Uart0, Uart1, GPIO, SD0, USB0, ENET0, Q-SPI |
Application | Description |
---|---|
hello_world | Xilinx Hello World Example |
u-boot | Petalinux-Uboot (image.ub in prebuilt-folder,ex.:/os/petalinux/default) |
Name | Folder | Description |
---|---|---|
PetaLinux Project | <design_name>/os/petalinux | PetaLinux Project with Ethernet, USB |
File | File-Extension | Description |
---|---|---|
BIF-File | *.bif | File with description to generate Bin-File |
BIN-File | *.bin | Flash Configuration File with Boot-Image (Zynq-FPGAs) |
BIT-File | *.bit | FPGA Configuration File |
Diverse Reports | --- | Report files in different formats |
Hardware-Platform-Specification-Files | *.hdf | Exported Vivado Hardware Specification for SDK/HSI |
LabTools Project-File | *.lpr | Vivado Labtools Project File |
OS-Image | *.ub | Image with Linux Kernel (On Petalinux optional with Devicetree and RAM-Disk) |
Software-Application-File | *.elf | Software Application for Zynq or MicroBlaze Processor Systems |
- Please read the Legal Notices before downloading Trenz Electronic documents and files.
Size
te0715-test_board_noprebuilt-vivado_2016.2-build_07_20161116141701.zip
Size
2017.1
test_board - TE0715 Zynq Linux Example Design
TE0715 Zynq Linux Example Design
-Downloadable files are located below the description-
Currently implemented:
- ETH
- USB
- I2C
- RTC
- Copy image.ub (<design_name>/prebuilt/os/petalinux/<short dir or default>) and Boot.bin (<design_name>/prebuilt/boot_images/<short dir>/u-boot) on SD-Card.
- Set Boot Mode to SD-Boot.
- Insert SD-Card in SD-Slot.
- Power on carrier.
- Windows: Open Serial Console (e.g. putty):COM Port(see device manager), Speed(115200).
- Linux: Open Serial Console (e.g. minicom):COM Port(dmesg |grep tty) UART is *USB1, Speed(115200).
- MGT Reference CLK Counter:
- Open Vivado HW-Manager and add VIO signal to dashboard (*.ltx located on prebuilt folder).
- Set radix from VIO signals to unsigned integer.
- MGT CLK is configured to 125MHz by default and not available on XC7Z015 devices, FCLK is not configured.
Component | Description |
---|---|
PS-MIOs | QSPI, DDR, I2C0,I2C1, UART0, UART1, GPIO, SD0, USB0, ETH0, TTC |
Xilinx-IP | VIO |
TE-IP | Labtools_Fmeter |
Application | Description |
---|---|
zynq_fsbl | Default Xilinx FSBL |
u-boot | Petalinux-Uboot (image.ub in <design_name>/prebuilt/os/petalinux/<short dir or default>) |
Name | Folder | Description |
---|---|---|
PetaLinux Project | <design_name>/os/petalinux | PetaLinux Project with I2C,ETH0,SD,USB,RTC, Init Script(run init.sh from SD on startup). |
File | File-Extension | Description |
---|---|---|
BIF-File | *.bif | File with description to generate Bin-File |
BIN-File | *.bin | Flash Configuration File with Boot-Image (Zynq-FPGAs) |
BIT-File | *.bit | FPGA Configuration File |
DebugProbes-File | *.ltx | Definition File for Vivado/Vivado Labtools Debugging Interface |
Diverse Reports | --- | Report files in different formats |
Hardware-Platform-Specification-Files | *.hdf | Exported Vivado Hardware Specification for SDK/HSI |
LabTools Project-File | *.lpr | Vivado Labtools Project File |
OS-Image | *.ub | Image with Linux Kernel (On Petalinux optional with Devicetree and RAM-Disk) |
Software-Application-File | *.elf | Software Application for Zynq or MicroBlaze Processor Systems |
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Size
Reference Design - Source Code and Configuration Files (1 Files) te0715-test_board-vivado_2017.1-build_03_20170703153922.zip
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Other Files (0 Files)
test_board - TE0715 Basic Linux Example
TE0715 Basic Linux Example
-Downloadable files are located below the description-
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Reference Design - Source Code and Configuration Files (1 Files) te0715-test_board-vivado_2017.2-build_05_20171110134232.zip
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Reference Design - Documentation (1 Files) te0715-test_board-vivado_2017.2-build_05-v22.pdf
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Other Files (0 Files)
test_board - TE0715 Basic Linux Example
TE0715 Basic Linux Example
-Downloadable files are located below the description-
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Reference Design - Source Code and Configuration Files (1 Files) TE0715-test_board-vivado_2017.4-build_07_20180426171530.zip
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Reference Design - Documentation (1 Files) TE0715-test_board-vivado_2017.4-build_07-v30.pdf
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Other Files (0 Files)
test_board - TE0715 Basic Linux Example
TE0715 Basic Linux Example
-Downloadable files are located below the description-
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Size
Reference Design - Source Code and Configuration Files (1 Files) TE0715-test_board-vivado_2018.2-build_03_20181001131411.zip
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Reference Design - Documentation (1 Files) TE0715-test_board-vivado_2018.2-build_03-v31.pdf
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Other Files (0 Files)
test_board - TE0715 Basic Linux Example
TE0715 Basic Linux Example
-Downloadable files are located below the description-
- Please read the Legal Notices before downloading Trenz Electronics documents and files.
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Reference Design - Source Code and Configuration Files (1 Files) TE0715-test_board-vivado_2018.3-build_05_20190509094447.zip
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Reference Design - Documentation (1 Files) TE0715-test_board-vivado_2018.3-build_05_-v32.pdf
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Other Files (0 Files)
test_board - TE0715 Basic Linux Example
TE0715 Basic Linux Example
-Downloadable files are located below the description-
- Please read the Legal Notices before downloading Trenz Electronics documents and files.
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Reference Design - Source Code and Configuration Files (1 Files) TE0715-test_board-vivado_2019.2-build_12_20200610070857.zip
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Reference Design - Documentation (1 Files) TE0715 Test Board-vivado_2019.2-build_12_v33-04_28_2021.pdf
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Other Files (0 Files)
test_board - TE0715 Basic Linux Example
TE0715 Basic Linux Example
-Downloadable files are located below the description-
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Reference Design - Source Code and Configuration Files (1 Files) TE0715-test_board-vivado_2020.2-build_9_20211216124925.zip
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Reference Design - Documentation (1 Files) TE0715-test_board-vivado_2020.2-build_9_v.39-02_02_2022.pdf
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Other Files (0 Files)
test_board - TE0715 Basic Linux Example
TE0715 Basic Linux Example
-Downloadable files are located below the description-
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Reference Design - Source Code and Configuration Files (1 Files) TE0715-test_board-vivado_2021.2-build_20_20230506205024.zip
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Reference Design - Documentation (1 Files) TE0715-test_board-vivado_2021.2-build_20_v.41-07_06_2023.pdf
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Other Files (0 Files)
test_board - TE0715 Basic Linux Example
TE0715 Basic Linux Example
-Downloadable files are located below the description-
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Reference Design - Source Code and Configuration Files (1 Files) TE0715-test_board-vivado_2022.2-build_2_20230705115102.zip
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Reference Design - Documentation (0 Files) Other Files (0 Files)
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Design Note (0 Files) Other Files (0 Files)
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PCN-20150408 TE0720 CPLD Revision upgrade 03 - 04.pdf
Size
PCN-20160114 TE0720-02 to TE0720-03, CPLD upgrade to REV05-v1-20160122_0830.pdf
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PCN-20171205 TE0720-03-1CF eMMC Change.pdf
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PCN-20190717 TE0720-03-1CFA-S Carrier Hardware Revision Change-v1-20190717_0944.pdf
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PCN-20200115 TE0720-03-2IFC8 eMMC Change-v4-11_09_2020.pdf
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PCN-20210126a TE0720-03 DDR3, Flash, EMMC Change and Product Update (Revised)-v38-05_18_2021.pdf
Size
PCN-20210127 TE0720 CPLD Firmware Revision Upgrade from REV05 to REV06-v11-05_17_2021.pdf
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PCN-20210610 TE0720-03 eMMC Change-v12-07_12_2021.pdf
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PCN-20220228 TE0720-03 to TE0720-04 Hardware Revision Change.pdf
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PCN-20240301 TE0720-04-61C33MAS Kit Baseboard Update.pdf
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PCN-Product Change Notifications-v2-20140926_1037.pdf
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Other Files (0 Files)
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Assembly Diagrams (1 Files) AD-TE0720-01-2IF.PDF
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STP-26922-TE0720-Heatsink.zip
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STP-TE0720-03.zip
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Trace Lengths (1 Files) TL-TE0720-01.xls
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Other Files (0 Files)
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SCH-TE0720-02-1CR.PDF
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SCH-TE0720-02-1QF.PDF
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SCH-TE0720-02-1QFGO.PDF
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SCH-TE0720-02-2AQF.PDF
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SCH-TE0720-02-2CF.PDF
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SCH-TE0720-02-2CR.PDF
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SCH-TE0720-02-2EF.PDF
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SCH-TE0720-02-2IF.PDF
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SCH-TE0720-02-2IFC2.PDF
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SCH-TE0720-02-2IFC3.PDF
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SCH-TE0720-02-2IFC4.PDF
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SCH-TE0720-02-L1IF.PDF
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SCH-TE0720-02.PDF
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Assembly Diagrams (9 Files) AD-TE0720-02-1CF.PDF
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AD-TE0720-02-1CR.PDF
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AD-TE0720-02-1QF.PDF
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AD-TE0720-02-1QFGO.PDF
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AD-TE0720-02-2IF.PDF
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AD-TE0720-02-2IFC2.PDF
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AD-TE0720-02-2IFC3.PDF
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AD-TE0720-02-2IFC4.PDF
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AD-TE0720-02-L1IF.PDF
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SC-PGM-TE720-02_SC-03_20150115.zip
Size
SC-PGM-TE720-02_SC-04_20150408.zip
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Source Code of CPLD Firmware (0 Files) Other Files (0 Files)
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Size
STP-26922-TE0720-Heatsink.zip
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Trace Lengths (2 Files) TL-PO-TE0720-02-tracelengths.zip Signal line lengths for Trenz Electronic TE0720 B2B connectors
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TL-TE0720-02.xls
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Other Files (3 Files)
- document content: connectors (JB1, JB2, JB3)
- document type: schematic diagram
- document format: Protel for Windows, Schematic Library Editor Binary File
- format version: 5.1
- source: Trenz Electronic
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TE0720 GigaZee.LIB-Eagle.lbr.pdf
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TE0720 GigaZee.LIB-Eagle.lbr.zip Trenz Electronic TE0720 (GigaZee): module and connectors footprint:
- document type: EAGLE SYSTEM
- EAGLE version: 6.5.0
- source: community contribution
Community contributions are provided "as is", without any express or implied warranty. Trenz Electronic encourages anyone to share and improve its EDA (electronic design automation) part library collection.
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TE0720-02-1QF bottom.jpg
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TE0720-02-1QF top.jpg
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TE0720-02-2IFC3 angle.jpg
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TE0720-02-2IFC3 angle2.jpg
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TE0720-02-2IFC3 top.jpg
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TE0720-02-L1IF angle.jpg
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TE0720-02-L1IF angle2.jpg
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TE0720-02-L1IF bottom.jpg
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TE0720-02-L1IF top.jpg
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REV03 - PCB Revision: Schematics, AD, STEP, HW Design Files and more ...
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Schematics (61 Files) SCH-TE0720-03-14S-1C.PDF
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SCH-TE0720-03-14S-1CY.PDF
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SCH-TE0720-03-1CF.PDF
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SCH-TE0720-03-1CFA.PDF
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SCH-TE0720-03-1CFAY.PDF
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SCH-TE0720-03-1QFA.PDF
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SCH-TE0720-03-2IFC5.PDF
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SCH-TE0720-03-61C530A.PDF
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SCH-TE0720-03-61Q42NA.PDF
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SCH-TE0720-03-61Q43MA.PDF
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SCH-TE0720-03-61Q86KL.PDF
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SCH-TE0720-03-61Q86PL.PDF
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SCH-TE0720-03-64I63FA.PDF
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SCH-TE0720-03-64I63MA.PDF
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SCH-TE0720-03-L1IF.PDF
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SCH-TE0720-03-L1IFN.PDF
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SCH-TE0720-03.PDF
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Assembly Diagrams (61 Files) AD-TE0720-03-14S-1C.PDF
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AD-TE0720-03-14S-1CY.PDF
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AD-TE0720-03-1CF.PDF
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AD-TE0720-03-1CFA.PDF
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AD-TE0720-03-1CFAY.PDF
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AD-TE0720-03-1CR.PDF
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AD-TE0720-03-1QF.PDF
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AD-TE0720-03-1QFA.PDF
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AD-TE0720-03-1QFAY.PDF
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AD-TE0720-03-2IF.PDF
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AD-TE0720-03-2IFA.PDF
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AD-TE0720-03-2IFAY.PDF
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AD-TE0720-03-2IFC2.PDF
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AD-TE0720-03-2IFC3.PDF
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AD-TE0720-03-2IFC4.PDF
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AD-TE0720-03-2IFC5.PDF
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AD-TE0720-03-62I12GA.PDF
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AD-TE0720-03-62I33MA.PDF
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AD-TE0720-03-62I33NA.PDF
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AD-TE0720-03-64I63FA.PDF
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AD-TE0720-03-64I63MA.PDF
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AD-TE0720-03-L1IF.PDF
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AD-TE0720-03-L1IFN.PDF
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AD-TE0720-03.PDF
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3D PDF (2 Files) 3DB-TE0720-03.PDF
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3DT-TE0720-03.PDF
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Other Files (1 Files) Firmware - Initial Configuration for diverse PCB components, like CPLD, PLL and ...
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Files SC-PGM-TE0720-03_SC0720-05_20170317.zip
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SC-PGM-TE0720-03_XO2E-06_20210202.zip
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TE0720 CPLD_REV05-v130-01_29_2021.pdf
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Files[-] Close all Programming files of CPLD Firmware (1 Files) SC-PGM-TE0720-0304_XO2E-07_20220628.zip
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Source Code of CPLD Firmware (0 Files) Other Files (0 Files)
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Size
STP-26922-TE0720-Heatsink.zip
Size
STP-TE0720-03.zip
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Trace Lengths (1 Files) TL-TE0720-03.xls
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Other Files (1 Files) Pictures - PCB pictures
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Size
TE0720-03-31C33MA bottom.jpg
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TE0720-03-31C33MA top.jpg
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TE0720-03-61C33MA angle.jpg
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TE0720-03-61C33MA bottom.jpg
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TE0720-03-61Q33MA angle.jpg
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TE0720-03-62I33MA angle.jpg
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TE0720-03-62I33MA bottom.jpg
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TE0720-03-62I33ML angle.jpg
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TE0720-03-62I33ML bottom.jpg
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TE0720-03-62I33ML top.jpg
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REV04 - PCB Revision: Schematics, AD, STEP, HW Design Files and more ...
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Size
SCH-TE0720-04-31C33MAY.PDF
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SCH-TE0720-04-61C33MA.PDF
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SCH-TE0720-04-61C33MAY.PDF
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SCH-TE0720-04-61C530A.PDF
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SCH-TE0720-04-61C530AY.PDF
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SCH-TE0720-04-61Q42NA.PDF
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SCH-TE0720-04-61Q43GA.PDF
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SCH-TE0720-04-61Q43MA.PDF
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SCH-TE0720-04-61Q86KL.PDF
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SCH-TE0720-04-61Q86PL.PDF
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SCH-TE0720-04-62I120M.PDF
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SCH-TE0720-04-62I37MA.PDF
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SCH-TE0720-04-64I63MA.PDF
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SCH-TE0720-04-No Variations.PDF
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Assembly Diagrams (19 Files) AD-TE0720-04-31C33MA.PDF
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AD-TE0720-04-61C33MA.PDF
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AD-TE0720-04-61C530A.PDF
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AD-TE0720-04-61Q33MA.PDF
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AD-TE0720-04-61Q42GA.PDF
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AD-TE0720-04-61Q42NA.PDF
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AD-TE0720-04-61Q43GA.PDF
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AD-TE0720-04-61Q43MA.PDF
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AD-TE0720-04-61Q86KL.PDF
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AD-TE0720-04-61Q86PL.PDF
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AD-TE0720-04-62I120M.PDF
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AD-TE0720-04-62I12GA.PDF
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AD-TE0720-04-62I330M.PDF
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AD-TE0720-04-62I33GA.PDF
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AD-TE0720-04-62I33MA.PDF
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AD-TE0720-04-62I33ML.PDF
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AD-TE0720-04-62I33NA.PDF
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AD-TE0720-04-64I63MA.PDF
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3D PDF (2 Files) 3DB-TE0720-04-No Variations.PDF
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3DT-TE0720-04-No Variations.PDF
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Other Files (1 Files) Firmware - Initial Configuration for diverse PCB components, like CPLD, PLL and ...
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Source Code of CPLD Firmware (0 Files) Other Files (0 Files)
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Trace Lengths (0 Files) Other Files (0 Files)
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hdmi - Zynq Basic-System with HDMI Video Stream
Short Description:
Excerpt of special Block-Design components/interfaces:
Component | Description |
---|---|
Zynq Processor | activated MIO-Interfaces: DDR3, QSPI, GPIO,2x Uart, QSPI,2x I2C,1x SD,1x Ethernet |
TE-IP | TE0720 System-Controller |
TE-IP | Video IO to HDMI |
TE-IP | AXI-Stream FB Converter |
Additional Software Application for SDK/HSI and Linux:
Application | Description |
---|---|
zynq_fsbl | Zynq First Stage Bootloader (for hdmi modified and provided as library in /sw_lib/) |
hello_world | Xilinx Hello World Example |
Additional content in the larger ZIP with prebuilt-folders:
File | File-Extension | Description |
---|---|---|
Bin-File | *.bin | Flash Configuration File with Boot-Image for Zynq-FPGAs |
Bit-File | *.bit | FPGA Configuration File |
Software-Application-File | *.elf | Software Application for Zynq or MicroBlace Processor Systems |
Hardware-Platform-Specification-Files | *.hdf | Hardware Specification from the vivado project. Used in SDK/HSI |
BIF-File | *.bif | File with description to generate Bin-File |
Diverse Reports | -- | Report files in different formats |
Size
TE0720-hdmi_noprebuilt-vivado_2015.4-build_34_20160531091248.zip
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test_board - Zynq Basic-System
Short Description:
Excerpt of special Block-Design components/interfaces:
Component | Description |
---|---|
Zynq Processor | activated MIO-Interfaces: DDR3, QSPI, GPIO,2x Uart, QSPI,2x I2C, 2x SPI,2x SD, USB, Ethernet |
TE-IP | TE0720 System-Controller |
Additional Software Application for SDK/HSI and Linux:
Application | Description |
---|---|
zynq_fsbl | Zynq First Stage Bootloader |
hello_world | Xilinx Hello World Example |
Additional content in the larger ZIP with prebuilt-folders:
File | File-Extension | Description |
---|---|---|
Bin-File | *.bin | Flash Configuration File with Boot-Image (Zynq-FPGAs) |
Bit-File | *.bit | FPGA Configuration File |
Software-Application-File | *.elf | Software Application for Zynq or MicroBlaze Processor Systems |
Hardware-Platform-Specification-Files | *.hdf | Hardware Specification from the vivado project. Used in SDK/HSI |
BIF-File | *.bif | File with description to generate Bin-File |
Diverse Reports | -- | Report files in different formats |
Size
TE0720-test_board_noprebuilt-vivado_2015.4-build_34_20160531091130.zip
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2016.2
carrier_te0701_sc - TE0701 System Controller Reference Design
TE0701 System Controller Reference Design
-The downloadable files can be found after description-
Attention: System Controller IP (SC0701) is not completely compatible to TE0701 CPLD Firmware Revision 5.
Attention: I2C1 is not connected to TE0720 System Controller IP, all I2C components connected to this bus, like RTC, are not available with this reference design.
Component | Description |
---|---|
PS-MIOs | activated MIO-Interfaces: DDR3, QSPI, GPIO,2x Uart, QSPI,2x I2C, 2x SPI,2x SD, USB, Ethernet |
Xilinx-IP | VIO |
TE-IP | TE0701 System Controller(SC0701), STARTUPE2 Primitive |
Application | Description |
---|---|
zynq_fsbl | Zynq First Stage Bootloader (Modified) |
hello_world | TE0720 Xilinx Hello World Example |
u-boot | Petalinux-Uboot (image.ub in prebuilt-folder,ex.:/os/petalinux/default) |
Name | Folder | Description |
---|---|---|
Source Name | <design_name><folder> | Source Description |
PetaLinux Project | <design_name>/os/petalinux | PetaLinux Project with Ethernet,USB,RTC |
File | File-Extension | Description |
---|---|---|
Bin-File | *.bin | Flash Configuration File with Boot-Image (Zynq-FPGAs) |
BIT-File | *.bit | FPGA Configuration File |
Software-Application-File | *.elf | Software Application for Zynq or MicroBlaze Processor Systems |
Hardware-Platform-Specification-Files | *.hdf | Exported Vivado Hardware Specification for SDK/HSI |
BIF-File | *.bif | File with description to generate Bin-File |
OS-Image | *.ub | Image with Linux Kernel (On Petalinux optional with Devicetree and RAM-Disk) |
Diverse Reports | -- | Report files in different formats |
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Size
te0720-TE0701_SC_noprebuilt-vivado_2016.2-build_09_20170210084437.zip
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carrier_te0706_eth - TE0720 Ethernet Design for TE0706 Carrier Board
TE0720 Ethernet Design for TE0706 Carrier Board
-Downloadable files are located below the description-
Component | Description |
---|---|
PS-MIOs | activated:SPI0, SPI1, I2C0, UAR0, UART1, GPIO, SD0, SD1, USB0, ENET0,ENET1, QSPI |
Xilinx-IP | GMII to RGMII |
TE-IP | TE0720 System-Controller |
Application | Description |
---|---|
zynq_fsbl | Zynq First Stage Bootloader (Modified) |
hello_world | Xilinx Hello World Example |
u-boot | Petalinux-Uboot (image.ub in prebuilt-folder,ex.:/os/petalinux/default) |
Name | Folder | Description |
---|---|---|
PetaLinux Project | <design_name>/os/petalinux | PetaLinux Project with Ethernet,USB,RTC |
File | File-Extension | Description |
---|---|---|
Bin-File | *.bin | Flash Configuration File with Boot-Image (Zynq-FPGAs) |
BIT-File | *.bit | FPGA Configuration File |
Software-Application-File | *.elf | Software Application for Zynq or MicroBlaze Processor Systems |
Hardware-Platform-Specification-Files | *.hdf | Exported Vivado Hardware Specification for SDK/HSI |
BIF-File | *.bif | File with description to generate Bin-File |
OS-Image | *.ub | Image with Linux Kernel (On Petalinux optional with Devicetree and RAM-Disk) |
Diverse Reports | -- | Report files in different formats |
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Size
te0720-TE0706_ETH_noprebuilt-vivado_2016.2-build_08_20161206155126.zip
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te0720_sdsoc - TE0720 SDSoC
TE0720 SDSoC
-Downloadable files are located below the description-
Short Description:
TE SDSoC User Guide is available on:SDSoC Projects.
The SDSoC project is available as separate ZIP (te0720_2if_sdsoc.zip, te0720_2ef_sdsoc.zip, te0720_l1if_sdsoc.zip, te0720_1cf_sdsoc.zip) or can be created from reference design.
Currently supported Xilinx SDSoC Examples:
- Matrix Multiplication – Standalone/Linux
- Matrix Multiplication Data Size - Standalone/Linux
- Matrix Multiplication and Addition - Standalone/Linux
- Matrix Multiplication (area reduced) – Standalone/Linux
- Matrix Multiplication Data Size (area reduced) - Standalone/Linux
- Pipelined Matrix Multiplication (area reduced) - Linux
- Matrix Multiplication and Addition (area reduced) - Standalone/Linux
- Color Space Conversion - RGB/HSV) - Standalone/Linux
- Synthesizeable FIR Filter) - Standalone/Linux
- File IO Video Processing - Linux
Attention: I2C1 is not connected to TE0720 System Controller IP, all I2C components connected to this bus, like RTC, are not available with this reference design.
Size
te0720_2ef_sdsoc.zip
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te0720_2if_sdsoc.zip
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te0720_l1if_sdsoc.zip
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SDSoC Reference Design to create SDSoC Platform (1 Files) te0720-te0720_sdsoc-vivado_2016.2-build_07_20161017161741.zip
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Other Files (0 Files)
TE0720 Zynq Basic-System
-Downloadable files are located below the description-
Component | Description |
---|---|
PS-MIOs | activated:SPI0, SPI1, I2C0, UAR0, UART1, GPIO, SD0, SD1, USB0, ENET0, QSPI |
TE-IP | TE0720 System-Controller |
Application | Description |
---|---|
zynq_fsbl | Zynq First Stage Bootloader (Modified) |
hello_world | Xilinx Hello World Example |
u-boot | Petalinux-Uboot (image.ub in prebuilt-folder,ex.:/os/petalinux/default) |
Name | Folder | Description |
---|---|---|
PetaLinux Project | <design_name>/os/petalinux | PetaLinux Project with Ethernet,USB,RTC |
File | File-Extension | Description |
---|---|---|
Bin-File | *.bin | Flash Configuration File with Boot-Image (Zynq-FPGAs) |
BIT-File | *.bit | FPGA Configuration File |
Software-Application-File | *.elf | Software Application for Zynq or MicroBlaze Processor Systems |
Hardware-Platform-Specification-Files | *.hdf | Exported Vivado Hardware Specification for SDK/HSI |
BIF-File | *.bif | File with description to generate Bin-File |
OS-Image | *.ub | Image with Linux Kernel (On Petalinux optional with Devicetree and RAM-Disk) |
Diverse Reports | -- | Report files in different formats |
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Size
te0720-test_board_noprebuilt-vivado_2016.2-build_07_20161018124637.zip
Size
2016.4
test_board - TE0720 Zynq Basic-System
TE0720 Zynq Basic-System
-Downloadable files are located below the description-
Note: Boot.bin für Zynq 7000S was generated with Bootgen from SDK 2017.1, sources are from Vivado/SDK/PetaLinux 2016.4.
Currently implemented:
- USB
- ETH
- Copy image.ub (<design_name>/prebuilt/os/petalinux/<short dir or default>) and Boot.bin (<design_name>/prebuilt/boot_images/<short dir>/u-boot) on SD-Card.
- Set Boot Mode to SD-Boot.
- Insert SD-Card in SD-Slot.
- Power on carrier.
- Windows: Open Serial Console (e.g. putty):COM Port(see device manager), Speed(115200).
- Linux: Open Serial Console (e.g. minicom):COM Port(dmesg |grep tty) UART is *USB1, Speed(115200).
Component | Description |
---|---|
PS-MIOs | SPI0, SPI1, QSPI, I2C0, I2C1, UART0, UART1, GPIO, SD0, SD1, USB0, ETH0, DDR3 |
TE-IP | TE0720 System Controller IO |
Application | Description |
---|---|
zynq_fsbl | TE modified Zynq FSBL, see te_fsbl_hooks.c (template in subfolder sw_lib) |
Hello TE0720 | Hello TE0720 in endless loop |
u-boot | Petalinux-Uboot (image.ub in <design_name>/prebuilt/os/petalinux/<short dir or default>) |
Name | Folder | Description |
---|---|---|
FSBL Template | <design_name>/sw_lib/ | Modified FSBL Template for SDK/HSI |
PetaLinux Project | <design_name>/os/petalinux | PetaLinux Project with I2C,ETH0,SD,USB |
File | File-Extension | Description |
---|---|---|
BIF-File | *.bif | File with description to generate Bin-File |
BIN-File | *.bin | Flash Configuration File with Boot-Image (Zynq-FPGAs) |
BIT-File | *.bit | FPGA Configuration File |
DebugProbes-File | *.ltx | Definition File for Vivado/Vivado Labtools Debugging Interface |
Diverse Reports | --- | Report files in different formats |
Hardware-Platform-Specification-Files | *.hdf | Exported Vivado Hardware Specification for SDK/HSI |
LabTools Project-File | *.lpr | Vivado Labtools Project File |
OS-Image | *.ub | Image with Linux Kernel (On Petalinux optional with Devicetree and RAM-Disk) |
Software-Application-File | *.elf | Software Application for Zynq or MicroBlaze Processor Systems |
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Size
Reference Design - Source Code and Configuration Files (1 Files) te0720-test_board-vivado_2016.4-build_08_20170529092713.zip
Size
Other Files (0 Files)
TE0701_zsys_SDSoC_EDDP_FOC - TE0720 EDDP for TE0701 carrier board
TE0720 EDDP for TE0701 carrier board
-Downloadable files are located below the description-
Automated generation of SDSoC platforms for family of TE0720 modules.
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Size
Reference Design - Documentation (0 Files) Other Files (0 Files)
TE0720 EDDP for TE0706 carrier board
-Downloadable files are located below the description-
Automated generation of SDSoC platforms for family of TE0720 modules.
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Size
Reference Design - Documentation (0 Files) Other Files (0 Files)
TE0720 SDSoC
-Downloadable files are located below the description-
Short Description:
- TE SDSoC User Guide coming soon on:SDSoC Projects
- TE SDSoC Reference Design description coming soon on:TE0720 SDSoC Design
Currently implemented SDSoC Examples:
- Array partition – Standalone/Linux
- Burst rw – Standalone/Linux
- Custom data type – Standalone/Linux
- Dependence inter – Standalone/Linux
- Dma sg – Standalone/Linux
- Dma simple – Standalone/Linux
- Full array 2d – Standalone/Linux
- Lmem 2rw – Standalone/Linux
- Loop fusion – Standalone/Linux
- Loop perfect – Standalone/Linux
- Loop reorder – Standalone/Linux
- Row array 2D – Standalone/Linux
- Shift register – Standalone/Linux
- Systolic array – Standalone/Linux
- Wide memory rw – Standalone/Linux
- Window array 2d – Standalone/Linux
- Direct connect – Standalone/Linux
- Data access random – Standalone/Linux
- Sys port – Standalone/Linux
- Hello vadd – Standalone/Linux
- File IO Video Processing – Linux
- File IO Dense Optical Flow – Linux
- File IO Stereo Block Matching – Linux
Size
Other Files (6 Files)
Size
TE0720_1qf_SDSoC_PFM_SDx_2017.1-build_05_20171009095523.zip
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TE0720_2ef_SDSoC_PFM_SDx_2017.1-build_05_20171009095523.zip
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TE0720_2if_SDSoC_PFM_SDx_2017.1-build_05_20171009095523.zip
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TE0720_7s_SDSoC_PFM_SDx_2017.1-build_05_20171009095523.zip
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TE0720_l1if_SDSoC_PFM_SDx_2017.1-build_05_20171009095523.zip
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TE0720 Zynq Linux Example Design
-Downloadable files are located below the description-
Currently implemented:
- USB
- ETH
- I2C
- RTC
- Copy image.ub (<design_name>/prebuilt/os/petalinux/<short dir or default>) and Boot.bin (<design_name>/prebuilt/boot_images/<short dir>/u-boot) on SD-Card.
- Set Boot Mode to SD-Boot.
- Insert SD-Card in SD-Slot.
- Power on carrier.
- Windows: Open Serial Console (e.g. putty):COM Port(see device manager), Speed(115200).
- Linux: Open Serial Console (e.g. minicom):COM Port(dmesg |grep tty) UART is *USB1, Speed(115200).
- ETH Phy LED
- Open Vivado HW-Manager and add VIO signal to dashboard (*.ltx located on prebuilt folder)
Component | Description |
---|---|
PS-MIOs | QSPI, DDR3, SPI0, SPI1, QSPI, I2C0, I2C1, UART0, UART1, GPIO, SD0, SD1, USB0, ETH0 |
Xilinx-IP | VIO |
TE-IP | TE0720 System Controller IO |
Application | Description |
---|---|
zynq_fsbl | TE modified Zynq FSBL, see te_fsbl_hooks.c (template in subfolder sw_lib) |
Hello TE0720 | Hello TE0720 in endless loop |
u-boot | Petalinux-Uboot (image.ub in <design_name>/prebuilt/os/petalinux/<short dir or default>) |
Name | Folder | Description |
---|---|---|
FSBL Template | <design_name>/sw_lib/ | Modified FSBL Template for SDK/HSI |
PetaLinux Project | <design_name>/os/petalinux | PetaLinux Project with I2C,ETH0,SD,USB, RTC, Init Script(run init.sh from SD on startup). |
File | File-Extension | Description |
---|---|---|
BIF-File | *.bif | File with description to generate Bin-File |
BIN-File | *.bin | Flash Configuration File with Boot-Image (Zynq-FPGAs) |
BIT-File | *.bit | FPGA Configuration File |
DebugProbes-File | *.ltx | Definition File for Vivado/Vivado Labtools Debugging Interface |
Diverse Reports | --- | Report files in different formats |
Hardware-Platform-Specification-Files | *.hdf | Exported Vivado Hardware Specification for SDK/HSI |
LabTools Project-File | *.lpr | Vivado Labtools Project File |
OS-Image | *.ub | Image with Linux Kernel (On Petalinux optional with Devicetree and RAM-Disk) |
Software-Application-File | *.elf | Software Application for Zynq or MicroBlaze Processor Systems |
- Please read the Legal Notices before downloading Trenz Electronic documents and files.
Size
Reference Design - Source Code and Configuration Files (1 Files) te0720-test_board-vivado_2017.1-build_05_20171107203416.zip
Size
Other Files (0 Files)
HDMI701 - TE0701 HDMI Example with TE0720
TE0701 HDMI Example with TE0720
-Downloadable files are located below the description-
- Please read the Legal Notices before downloading Trenz Electronics documents and files.
Size
Reference Design - Source Code and Configuration Files (1 Files) te0720-HDMI701-vivado_2017.2-build_05_20171204081435.zip
Size
Reference Design - Documentation (0 Files) Other Files (0 Files)
TE0720 Basic Linux Example
-Downloadable files are located below the description-
- Please read the Legal Notices before downloading Trenz Electronics documents and files.
Size
Reference Design - Source Code and Configuration Files (1 Files) te0720-test_board-vivado_2017.2-build_05_20171127153006.zip
Size
Reference Design - Documentation (1 Files) te0720-test_board-vivado_2017.2-build_05_v14-20190214_0648.pdf
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Other Files (0 Files)
test_board - TE0720 Basic Linux Example
TE0720 Basic Linux Example
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Reference Design - Source Code and Configuration Files (1 Files) te0720-test_board-vivado_2017.4-build_07_20180426144351.zip
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Reference Design - Documentation (1 Files) te0720-test_board-vivado_2017.4-build_07_v22-20190214_0648.pdf
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Other Files (0 Files)
SDSoC - TE0720 SDSoC Example
TE0720 SDSoC
-Downloadable files are located below the description-
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Size
SDSoC_PFM_TE0720-03-1CFA_20181105181423.zip
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SDSoC_PFM_TE0720-03-1CF_20181105180201.zip
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SDSoC_PFM_TE0720-03-1QFA_20181105185131.zip
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SDSoC_PFM_TE0720-03-1QF_20181105174930.zip
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SDSoC_PFM_TE0720-03-2EF_20181105182640.zip
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SDSoC_PFM_TE0720-03-2IFA_20181105190350.zip
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SDSoC_PFM_TE0720-03-2IFC3_20181105172446.zip
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SDSoC_PFM_TE0720-03-2IFC8_20181105173708.zip
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SDSoC_PFM_TE0720-03-2IF_20181105171203.zip
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SDSoC Reference Design to create SDSoC Platform (1 Files) TE0720-TE0720_zsys_SDSoC-vivado_2018.2-build_03_20181106093337.zip
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Other Files (0 Files)
TE0720 Basic Linux Example
-Downloadable files are located below the description-
- Please read the Legal Notices before downloading Trenz Electronics documents and files.
Size
Reference Design - Source Code and Configuration Files (1 Files) te0720-test_board-vivado_2018.2-build_03_20180823185142.zip
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Reference Design - Documentation (1 Files) te0720-test_board-vivado_2018.2-build_03_v25-20190214_064719.pdf
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Other Files (0 Files)
test_board - TE0720 Basic Linux Example
TE0720 Basic Linux Example
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Size
Reference Design - Source Code and Configuration Files (1 Files) TE0720-test_board-vivado_2018.3-build_01_20190304100745.zip
Size
Reference Design - Documentation (1 Files) TE0720-test_board-vivado_2018.3-build_01-v34.pdf
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Other Files (0 Files)
ETH0706 - TE0720 with TE0706 and 2 ETH
TE0720 with TE0706 and 2 ETH
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Reference Design - Source Code and Configuration Files (1 Files) TE0720-ETH706-vivado_2019.2-build_15_20210420080413.zip
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Reference Design - Documentation (0 Files) Other Files (0 Files)
TE0701 HDMI Example with TE0720
-Downloadable files are located below the description-
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Reference Design - Source Code and Configuration Files (1 Files) TE0720-HDMI701-vivado_2019.2-build_8_20200325075631.zip
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Reference Design - Documentation (0 Files) Other Files (2 Files)
Size
te0720-ubuntu.zip
Size
TE0720 Basic Linux Example
-Downloadable files are located below the description-
- Please read the Legal Notices before downloading Trenz Electronics documents and files.
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Reference Design - Source Code and Configuration Files (1 Files) TE0720-test_board-vivado_2019.2-build_8_20200325075301.zip
Size
Reference Design - Documentation (1 Files) TE0720 Test Board-vivado_2019.2-build_8-v.39-02_17_2021.pdf
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Other Files (0 Files)
test_board - TE0720 Basic Linux Example
TE0720 Basic Linux Example
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Reference Design - Source Code and Configuration Files (1 Files) TE0720-test_board-vivado_2020.2-build_9_20211215123235.zip
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Reference Design - Documentation (1 Files) TE0720-test_board-vivado_2020.2-build_9_v.49-01_17_2022.pdf
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Other Files (0 Files)
test_board - TE0720 Basic Linux Example
TE0720 Basic Linux Example
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Reference Design - Source Code and Configuration Files (1 Files) TE0720-test_board-vivado_2021.2-build_11_20220202131818.zip
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Reference Design - Documentation (0 Files) Other Files (1 Files) 2022.2
test_board - TE0720 Basic Linux Example
TE0720 Basic Linux Example
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Reference Design - Source Code and Configuration Files (1 Files) TE0720-test_board-vivado_2022.2-build_2_20230719115741.zip
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Reference Design - Documentation (1 Files) TE0720-test_board-vivado_2022.2-build_2_v.57-01_16_2024.pdf
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Other Files (0 Files)
test_board - TE0720 Basic Linux Example
TE0720 Basic Linux Example
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Reference Design - Source Code and Configuration Files (1 Files) TE0720-test_board-vivado_2023.2-build_4_20240124111006.zip
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Reference Design - Documentation (0 Files) Other Files (0 Files)
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PCN-20211018 TE0741-03 to TE0741-04 Hardware Revision Change.pdf
Size
PCN-20230616 TE0741-04 to TE0741-05 Hardware Revision Change.pdf
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Other Files (0 Files)
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-
If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
Size
Schematics (2 Files) SCH-TE0741-01-325-2CB1.PDF
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SCH-TE0741-01-325-2CF.PDF
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Assembly Diagrams (2 Files) AD-TE0741-01-325-2CB1.PDF
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AD-TE0741-01.PDF
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3D PDF (0 Files) Other Files (0 Files)
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If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
- Please read the Legal Notices before downloading Trenz Electronics documents and files.
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-
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STP-26921-TE0741-Heatsink.zip
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Trace Lengths (0 Files) Other Files (1 Files)
- document type: EAGLE SYSTEM
- source: community contribution
- includes also TE0723 library
Community contributions are provided "as is", without any express or implied warranty. Trenz Electronic encourages anyone to share and improve its EDA (electronic design automation) part library collection.
Size
- Please read the Legal Notices before downloading Trenz Electronics documents and files.
-
If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
- If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
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If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
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Schematics (8 Files) SCH-TE0741-02-070-2CF.PDF
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SCH-TE0741-02-070-2IF.PDF
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SCH-TE0741-02-160-2CF.PDF
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SCH-TE0741-02-160-2IF.PDF
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SCH-TE0741-02-325-2CB1.PDF
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SCH-TE0741-02-325-2CF.PDF
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SCH-TE0741-02-325-2IF.PDF
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SCH-TE0741-02-410-2CF.PDF
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Assembly Diagrams (6 Files) AD-TE0741-02-070-2CF.PDF
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AD-TE0741-02-160-2CF.PDF
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AD-TE0741-02-325-2CB1.PDF
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AD-TE0741-02-325-2CF.PDF
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AD-TE0741-02-410-2CF.PDF
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AD-TE0741-02.PDF
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3D PDF (0 Files) Other Files (0 Files)
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Source Code of CPLD Firmware (0 Files) Other Files (0 Files)
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-
If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
Size
STP-26921-TE0741-Heatsink.zip
Size
STP-TE0741-02.zip
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Trace Lengths (1 Files) TL-TE0741-02.XLS
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Other Files (1 Files)
- document type: EAGLE SYSTEM
- source: community contribution
- includes also TE0723 library
Community contributions are provided "as is", without any express or implied warranty. Trenz Electronic encourages anyone to share and improve its EDA (electronic design automation) part library collection.
Size
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If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
Size
TE0741-02-160-2CF bottom.jpg
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TE0741-02-160-2CF top.jpg
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TE0741-02-410-2CF angle.jpg
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TE0741-02-410-2CF bottom.jpg
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TE0741-02-410-2CF top.jpg
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REV03 - PCB Revision: Schematics, AD, STEP, HW Design Files and more ...
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Schematics (11 Files) SCH-TE0741-03-070-2CF.PDF
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SCH-TE0741-03-070-2IF.PDF
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SCH-TE0741-03-160-2C1.PDF
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SCH-TE0741-03-160-2CF.PDF
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SCH-TE0741-03-160-2IF.PDF
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SCH-TE0741-03-325-2CB1.PDF
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SCH-TE0741-03-325-2CF.PDF
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SCH-TE0741-03-325-2IF.PDF
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SCH-TE0741-03-410-2CF.PDF
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SCH-TE0741-03-410-2IF.PDF
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SCH-TE0741-03-B3E-1-AF.PDF
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Assembly Diagrams (11 Files) AD-TE0741-03-070-2CF.PDF
Size
AD-TE0741-03-070-2IF.PDF
Size
AD-TE0741-03-160-2C1.PDF
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AD-TE0741-03-160-2CF.PDF
Size
AD-TE0741-03-160-2IF.PDF
Size
AD-TE0741-03-325-2CB1.PDF
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AD-TE0741-03-325-2CF.PDF
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AD-TE0741-03-325-2IF.PDF
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AD-TE0741-03-410-2CF.PDF
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AD-TE0741-03-410-2IF.PDF
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AD-TE0741-03-B3E-1-AF.PDF
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3D PDF (2 Files) 3DB-TE0741-03.PDF
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3DT-TE0741-03.PDF
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Other Files (0 Files)
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Source Code of CPLD Firmware (0 Files) Other Files (0 Files)
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- Trenz Electronic use STEP-Models from different sources. Depending from model and soldering process the real dimension (especial maximum height) can be vary from the STEP-Models.
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If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
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Trace Lengths (1 Files) TL-TE0741-03-325-2CF.zip
Size
Other Files (1 Files)
- document type: EAGLE SYSTEM
- source: community contribution
- includes also TE0723 library
Community contributions are provided "as is", without any express or implied warranty. Trenz Electronic encourages anyone to share and improve its EDA (electronic design automation) part library collection.
Size
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If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
Size
TE0741-03-070-2CF bottom.jpg
Size
TE0741-03-070-2CF top.jpg
Size
TE0741-03-070-2IF angle.jpg
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TE0741-03-070-2IF bottom.jpg
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TE0741-03-070-2IF top.jpg
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TE0741-03-160-2C1 angle.jpg
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TE0741-03-160-2C1 bottom.jpg
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TE0741-03-160-2C1 top.jpg
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TE0741-03-160-2CF angle.jpg
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TE0741-03-160-2CF bottom.jpg
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TE0741-03-160-2CF top.jpg
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TE0741-03-325-2IF angle.jpg
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TE0741-03-325-2IF bottom.jpg
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TE0741-03-325-2IF top.jpg
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TE0741-03-410-2CF angle.jpg
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TE0741-03-410-2CF bottom.jpg
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TE0741-03-410-2CF top.jpg
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REV04 - PCB Revision: Schematics, AD, STEP, HW Design Files and more ...
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Schematics (10 Files) SCH-TE0741-04-A2C-1-A.PDF
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SCH-TE0741-04-A2I-1-A.PDF
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SCH-TE0741-04-B2C-1-A.PDF
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SCH-TE0741-04-B2C-1-AF.PDF
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SCH-TE0741-04-B2I-1-A.PDF
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SCH-TE0741-04-B3E-1-AF.PDF
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SCH-TE0741-04-D2C-1-A.PDF
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SCH-TE0741-04-D2I-1-A.PDF
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SCH-TE0741-04-G2C-1-A.PDF
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SCH-TE0741-04-G2I-1-A.PDF
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Assembly Diagrams (10 Files) AD-TE0741-04-A2C-1-A.PDF
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AD-TE0741-04-A2I-1-A.PDF
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AD-TE0741-04-B2C-1-A.PDF
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AD-TE0741-04-B2C-1-AF.PDF
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AD-TE0741-04-B2I-1-A.PDF
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AD-TE0741-04-B3E-1-AF.PDF
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AD-TE0741-04-D2C-1-A.PDF
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AD-TE0741-04-D2I-1-A.PDF
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AD-TE0741-04-G2C-1-A.PDF
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AD-TE0741-04-G2I-1-A.PDF
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3D PDF (2 Files) 3DB-TE0741-04-No Variations.PDF
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3DT-TE0741-04-No Variations.PDF
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Other Files (1 Files) Firmware - Initial Configuration for diverse PCB components, like CPLD, PLL and ...
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Files SC-PGM-TE0741-0203_SC0741-02_20180829.zip
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Files[-] Close all Programming files of CPLD Firmware (1 Files) SC-PGM-TE0741-005_SC0741-003_20231213.zip
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Source Code of CPLD Firmware (0 Files) Other Files (0 Files)
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Trace Lengths (0 Files) Other Files (1 Files)
- document type: EAGLE SYSTEM
- source: community contribution
- includes also TE0723 library
Community contributions are provided "as is", without any express or implied warranty. Trenz Electronic encourages anyone to share and improve its EDA (electronic design automation) part library collection.
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SCH-TE0741-05-A2I-1-A.PDF
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SCH-TE0741-05-B2C-1-A.PDF
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SCH-TE0741-05-B2C-1-AF.PDF
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SCH-TE0741-05-B2I-1-A.PDF
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SCH-TE0741-05-D2C-1-A.PDF
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SCH-TE0741-05-D2I-1-A.PDF
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SCH-TE0741-05-D2I-1-L.PDF
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SCH-TE0741-05-G2C-1-A.PDF
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SCH-TE0741-05-G2I-1-A.PDF
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Assembly Diagrams (10 Files) AD-TE0741-05-A2C-1-A.PDF
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AD-TE0741-05-A2I-1-A.PDF
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AD-TE0741-05-B2C-1-A.PDF
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AD-TE0741-05-B2C-1-AF.PDF
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AD-TE0741-05-B2I-1-A.PDF
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AD-TE0741-05-D2C-1-A.PDF
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AD-TE0741-05-D2I-1-A.PDF
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AD-TE0741-05-D2I-1-L.PDF
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AD-TE0741-05-G2C-1-A.PDF
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AD-TE0741-05-G2I-1-A.PDF
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3D PDF (2 Files) 3DB-TE0741-05-No Variations.PDF
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3DT-TE0741-05-No Variations.PDF
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Other Files (1 Files) Firmware - Initial Configuration for diverse PCB components, like CPLD, PLL and ...
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Source Code of CPLD Firmware (0 Files) Other Files (0 Files)
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Trace Lengths (0 Files) Other Files (1 Files) Pictures - PCB pictures
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XS3SPROG
Files readme.txt
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top.ucf
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top.vhd
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blinky
Files blinky.ucf
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blinky.vhd
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iotest.vhd
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readme.txt
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blinky_dual
Files blinky.ucf
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blinky.vhd
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readme.txt
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Files TE0741-02.ucf
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TE0741-xc3sprog.zip
JTAG to SPI bitfiles for XC3SPROG JTAG SPI Programming tool
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2015.4
labtools - Vivado Labtools ready to use project
Short Description:
Additional content in the larger ZIP with prebuilt-folders:
File | File-Extension | Description |
---|---|---|
MCS-File | *.mcs | Flash Configuration File with Boot-Image (MicroBlaze or FPGA part only) |
Bit-File | *.bit | FPGA Configuration File |
Diverse Reports | -- | Report files in different formats |
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TE0741-simple_io_noprebuilt-vivado_2015.4-build_32_20160504103328.zip
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2016.1
f32c_arduino
Files TE0741-f32c_demo-vivado_2016.1-build_33_20160529154631.zip
Size
TE0741-f32c_demo_noprebuilt-vivado_2016.1-build_33_20160529154654.zip
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2016.2
f32c_demo - TE0741 F32C Demo Design
TE0741 F32C Demo Design
-Downloadable files are located below the description-
Component | Description |
---|---|
Xilinx-IP | ILA, VIO, CLK-Wizard |
TE-IP | F32C, Vector_LED, UART_MON |
Application | Description |
---|
Name | Folder | Description |
---|
File | File-Extension | Description |
---|---|---|
BIT-File | *.bit | FPGA Configuration File |
DebugProbes-File | *.ltx | Definition File for Vivado/Vivado Labtools Debugging Interface |
Diverse Reports | --- | Report files in different formats |
LabTools Project-File | *.lpr | Vivado Labtools Project File |
MCS-File | *.mcs | Flash Configuration File with Boot-Image (MicroBlaze or FPGA part only) |
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te0741-f32c_demo_noprebuilt-vivado_2016.2-build_07_20161031113015.zip
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2016.4
ibert - TE0741 IBERT
TE0741 IBERT
-Downloadable files are located below the description-
Attention: Do not use PCB without head sink.
Component | Description |
---|---|
Xilinx-IP | IBERT |
Application | Description |
---|
Name | Folder | Description |
---|
File | File-Extension | Description |
---|---|---|
BIT-File | *.bit | FPGA Configuration File |
DebugProbes-File | *.ltx | Definition File for Vivado/Vivado Labtools Debugging Interface |
Diverse Reports | --- | Report files in different formats |
Hardware-Platform-Specification-Files | *.hdf | Exported Vivado Hardware Specification for SDK/HSI |
LabTools Project-File | *.lpr | Vivado Labtools Project File |
MCS-File | *.mcs | Flash Configuration File with Boot-Image (MicroBlaze or FPGA part only) |
MMI-File | *.mmi | File with BRAM-Location to generate MCS or BIT-File with *.elf content (MicroBlaze only) |
Software-Application-File | *.elf | Software Application for Zynq or MicroBlaze Processor Systems |
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Reference Design - Source Code and Configuration Files (1 Files) te0741-IBERT-vivado_2016.4-build_07_20170413161254.zip
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Other Files (0 Files)
IBERT - TE0741 IBERT with SI5338 reconfiguration
TE0741 IBERT with SI5338 reconfiguration
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Reference Design - Source Code and Configuration Files (1 Files) TE0741-IBERT-vivado_2017.4-build_07_20180418083647.zip
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Reference Design - Documentation (0 Files) Other Files (0 Files)
TE0741 SI5338 reconfiguration example
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Reference Design - Source Code and Configuration Files (1 Files) TE0741-test_board-vivado_2017.4-build_07_20180416142156.zip
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Reference Design - Documentation (1 Files) TE0741-test_board-vivado_2017.4-build_07_v7-03_16_2022.pdf
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Other Files (0 Files)
test_board - TE0741 SI5338 reconfiguration example
TE0741 SI5338 reconfiguration example
-Downloadable files are located below the description-
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Reference Design - Source Code and Configuration Files (1 Files) TE0741-test_board-vivado_2021.2-build_14_20220609134340.zip
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Reference Design - Documentation (1 Files) TE0741-test_board-vivado_2021.2-build_14_v.9-12_18_2023.pdf
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Other Files (0 Files)
test_board - TE0741 SI5338 reconfiguration example
TE0741 SI5338 reconfiguration example
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Reference Design - Source Code and Configuration Files (1 Files) TE0741-test_board-vivado_2023.2-build_3_20231218145348.zip
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Reference Design - Documentation (0 Files) Other Files (0 Files)
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Design Note (1 Files) DN-TE0820-03 with Video Codec (EV)-v12-09_10_2020.pdf
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Other Files (0 Files)
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PCN-20180816 TE0820-02 to TE0820-03 Hardware Revision Change.pdf
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PCN-20190110a TE0820-03-_ SPI Flash and eMMC Change.pdf
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PCN-20200616 TE0820-03 to TE0820-04 Hardware Revision Change.pdf
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PCN-20210615 TE0820-04 eMMC Change and Product Update.pdf
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PCN-20220725 TE0820-04 to TE0820-05 Hardware Revision Change.pdf
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PCN-20231007 TE0820-05 DDR4 SDRAM and DCDC Change.pdf
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Other Files (0 Files)
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TE0820-01 (ES) bottom.jpg
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TE0820-01 (ES) top.jpg
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REV02 - PCB Revision: Schematics, AD, STEP, HW Design Files and more ...
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Schematics (21 Files) SCH-TE0820-02-02CG-1E.PDF
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SCH-TE0820-02-02CG-1EA.PDF
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SCH-TE0820-02-02EG-1E.PDF
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SCH-TE0820-02-02EG-1E3.PDF
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SCH-TE0820-02-02EG-1EA.PDF
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SCH-TE0820-02-02EG-1EE.PDF
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SCH-TE0820-02-02EG-1EL.PDF
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SCH-TE0820-02-03CG-1E.PDF
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SCH-TE0820-02-03CG-1EA.PDF
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SCH-TE0820-02-03CG-1IA.PDF
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SCH-TE0820-02-03EG-1E.PDF
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SCH-TE0820-02-03EG-1E3.PDF
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SCH-TE0820-02-03EG-1EA.PDF
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SCH-TE0820-02-03EG-1EL.PDF
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SCH-TE0820-02-03EG-1I.PDF
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SCH-TE0820-02-03EG-1Q.PDF
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SCH-TE0820-02-03EG-1QA.PDF
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SCH-TE0820-02-04CG-1E.PDF
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SCH-TE0820-02-04CG-1EA.PDF
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SCH-TE0820-02-04EV-1E.PDF
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SCH-TE0820-02-04EV-1EA.PDF
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Assembly Diagrams (21 Files) AD-TE0820-02-02CG-1E.PDF
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AD-TE0820-02-02CG-1EA.PDF
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AD-TE0820-02-02EG-1E.PDF
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AD-TE0820-02-02EG-1E3.PDF
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AD-TE0820-02-02EG-1EA.PDF
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AD-TE0820-02-02EG-1EE.PDF
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AD-TE0820-02-02EG-1EL.PDF
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AD-TE0820-02-03CG-1E.PDF
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AD-TE0820-02-03CG-1EA.PDF
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AD-TE0820-02-03CG-1IA.PDF
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AD-TE0820-02-03EG-1E.PDF
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AD-TE0820-02-03EG-1E3.PDF
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AD-TE0820-02-03EG-1EA.PDF
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AD-TE0820-02-03EG-1EL.PDF
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AD-TE0820-02-03EG-1I.PDF
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AD-TE0820-02-03EG-1Q.PDF
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AD-TE0820-02-03EG-1QA.PDF
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AD-TE0820-02-04CG-1E.PDF
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AD-TE0820-02-04CG-1EA.PDF
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AD-TE0820-02-04EV-1E.PDF
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AD-TE0820-02-04EV-1EA.PDF
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3D PDF (2 Files) 3DB-TE0820-02.PDF
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3DT-TE0820-02.PDF
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Other Files (0 Files)
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Source Code of CPLD Firmware (0 Files) Other Files (0 Files)
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Trace Lengths (1 Files) TL-TE0820-02.xls
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Schematics (32 Files) SCH-TE0820-03-02CG-1EA.PDF
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SCH-TE0820-03-02CG-1ED.PDF
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SCH-TE0820-03-02EG-1EA.PDF
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SCH-TE0820-03-02EG-1ED.PDF
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SCH-TE0820-03-02EG-1EL.PDF
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SCH-TE0820-03-03CG-1EA.PDF
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SCH-TE0820-03-03CG-1ED.PDF
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SCH-TE0820-03-03CG-1IA.PDF
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SCH-TE0820-03-03EG-1EA.PDF
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SCH-TE0820-03-03EG-1EB.PDF
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SCH-TE0820-03-03EG-1ED.PDF
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SCH-TE0820-03-03EG-1EL.PDF
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SCH-TE0820-03-04CG-1EA.PDF
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SCH-TE0820-03-04CG-1ED.PDF
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SCH-TE0820-03-04EV-1EA.PDF
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SCH-TE0820-03-2AE21FA.PDF
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SCH-TE0820-03-2AI21FA.PDF
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SCH-TE0820-03-2BE21FA.PDF
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SCH-TE0820-03-2BE21FL.PDF
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SCH-TE0820-03-2BI21FA.PDF
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SCH-TE0820-03-2BI21FL.PDF
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SCH-TE0820-03-3AE21FA.PDF
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SCH-TE0820-03-3AI21FA.PDF
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SCH-TE0820-03-3BE21FA.PDF
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SCH-TE0820-03-3BE21FL.PDF
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SCH-TE0820-03-4AE21FA.PDF
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SCH-TE0820-03-4AI21FI.PDF
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SCH-TE0820-03-4DE21FA.PDF
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SCH-TE0820-03-4DE21FL.PDF
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SCH-TE0820-03-4DI21FA.PDF
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SCH-TE0820-03-5DI21FA.PDF
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SCH-TE0820-03-5DR21FA.PDF
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Assembly Diagrams (32 Files) AD-TE0820-03-02CG-1EA.PDF
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AD-TE0820-03-02CG-1ED.PDF
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AD-TE0820-03-02EG-1EA.PDF
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AD-TE0820-03-02EG-1ED.PDF
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AD-TE0820-03-02EG-1EL.PDF
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AD-TE0820-03-03CG-1EA.PDF
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AD-TE0820-03-03CG-1ED.PDF
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AD-TE0820-03-03CG-1IA.PDF
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AD-TE0820-03-03EG-1EA.PDF
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AD-TE0820-03-03EG-1EB.PDF
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AD-TE0820-03-03EG-1ED.PDF
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AD-TE0820-03-03EG-1EL.PDF
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AD-TE0820-03-04CG-1EA.PDF
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AD-TE0820-03-04CG-1ED.PDF
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AD-TE0820-03-04EV-1EA.PDF
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AD-TE0820-03-2AE21FA.PDF
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AD-TE0820-03-2AI21FA.PDF
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AD-TE0820-03-2BE21FA.PDF
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AD-TE0820-03-2BE21FL.PDF
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AD-TE0820-03-2BI21FA.PDF
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AD-TE0820-03-2BI21FL.PDF
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AD-TE0820-03-3AE21FA.PDF
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AD-TE0820-03-3AI21FA.PDF
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AD-TE0820-03-3BE21FA.PDF
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AD-TE0820-03-3BE21FL.PDF
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AD-TE0820-03-4AE21FA.PDF
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AD-TE0820-03-4AI21FI.PDF
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AD-TE0820-03-4DE21FA.PDF
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AD-TE0820-03-4DE21FL.PDF
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AD-TE0820-03-4DI21FA.PDF
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AD-TE0820-03-5DI21FA.PDF
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AD-TE0820-03-5DR21FA.PDF
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3D PDF (2 Files) 3DB-TE0820-03.PDF
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3DT-TE0820-03.PDF
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Other Files (2 Files)
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SBSE____.UP6
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Source Code of CPLD Firmware (0 Files) Other Files (0 Files)
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Trace Lengths (0 Files) Other Files (0 Files)
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TE0820-03-03CG-1EA_bottom.jpg
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TE0820-03-03CG-1EA_top.jpg
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TE0820-03-04EV-1EA_angle.jpg
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TE0820-03-04EV-1EA_bottom.jpg
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TE0820-03-04EV-1EA_top.jpg
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TE0820-03-2AE21FA_angle.jpg
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TE0820-03-2AE21FA_bottom.jpg
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TE0820-03-2AE21FA_top.jpg
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TE0820-03-2AI21FA_angel.jpg
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TE0820-03-2AI21FA_bottom.jpg
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TE0820-03-3AE21FA_bottom.jpg
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TE0820-03-3AE21FA_top.jpg
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REV04 - PCB Revision: Schematics, AD, STEP, HW Design Files and more ...
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Schematics (42 Files) SCH-TE0820-04-2AE21FA.PDF
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SCH-TE0820-04-2AE21MA.PDF
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SCH-TE0820-04-2AI21FA.PDF
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SCH-TE0820-04-2AI21MA.PDF
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SCH-TE0820-04-2AI21MC.PDF
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SCH-TE0820-04-2BE21FA.PDF
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SCH-TE0820-04-2BE21FAJ.PDF
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SCH-TE0820-04-2BE21FL.PDF
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SCH-TE0820-04-2BE21ML.PDF
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SCH-TE0820-04-4AI21MI.PDF
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SCH-TE0820-04-4BI21KL.PDF
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Assembly Diagrams (41 Files) AD-TE0820-04-2AE21FA.PDF
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Files SC-PGM-TE0820-03_SC820-04_20180705.zip
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Files[-] Close all Programming files of CPLD Firmware (1 Files) SC-PGM-TE0820-04_SC820-05_20221005.zip
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REV05 - PCB Revision: Schematics, AD, STEP, HW Design Files and more ...
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Assembly Diagrams (59 Files) AD-TE0820-05-2AE21MA.PDF
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3D PDF (0 Files) Other Files (1 Files) Firmware - Initial Configuration for diverse PCB components, like CPLD, PLL and ...
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TE0820-05-3BE21MLZ bottom.jpg
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Reference_Design - FPGA Design Examples for different Vivado Versions
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test_board - TE0820 Basic System
TE0820 Basic System
-Downloadable files are located below the description-
Component | Description |
---|---|
PS-MIOs | GPIO, QSPI, GEM3, USB0, SD0, SD1, I2C, UART0 |
Xilinx-IP | VIO |
TE-IP | LabTools FMeter |
Application | Description |
---|---|
zynqmp_fsbl | Modified FSBL for Si5338 Configuration and ETH/USB Reset (template in sub-folder /sw_lib/sw_apps/zynqmp_fsbl) |
hello_world | Xilinx Hello World example |
u-boot | Petalinux-Uboot (image.ub in prebuilt-folder,ex.:/os/petalinux/default) |
Name | Folder | Description |
---|---|---|
Si5338 | /misc/SI5338 | Si5338ClockBuilder Project |
PetaLinux Project | <design_name>/os/petalinux | PetaLinux Project with USB,ETH,I2C,SD |
File | File-Extension | Description |
---|---|---|
BIF-File | *.bif | File with description to generate Bin-File |
BIN-File | *.bin | Flash Configuration File with Boot-Image (Zynq-FPGAs) |
BIT-File | *.bit | FPGA Configuration File |
DebugProbes-File | *.ltx | Definition File for Vivado/Vivado Labtools Debugging Interface |
Diverse Reports | --- | Report files in different formats |
Hardware-Platform-Specification-Files | *.hdf | Exported Vivado Hardware Specification for SDK/HSI |
LabTools Project-File | *.lpr | Vivado Labtools Project File |
OS-Image | *.ub | Image with Linux Kernel (On Petalinux optional with Devicetree and RAM-Disk) |
Software-Application-File | *.elf | Software Application for Zynq or MicroBlaze Processor Systems |
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Reference Design - Source Code and Configuration Files (1 Files) te0820-test_board-vivado_2016.4-build_06_20170412162557.zip
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TE0820_SDSoC - TE0820 SDSoC
TE0820 SDSoC
-Downloadable files are located below the description-
Short Description:
- TE SDSoC User Guide coming soon on:SDSoC Projects
- TE SDSoC Reference Design description coming soon on:TE0820 SDSoC Design
Currently implemented SDSoC Examples:
- Array partition – Standalone/Linux
- Burst rw – Standalone/Linux
- Custom data type – Standalone/Linux
- Dependence inter – Standalone/Linux
- Dma sg – Standalone/Linux
- Dma simple – Standalone/Linux
- Full array 2d – Standalone/Linux
- Lmem 2rw – Standalone/Linux
- Loop fusion – Standalone/Linux
- Loop perfect – Standalone/Linux
- Loop reorder – Standalone/Linux
- Row array 2D – Standalone/Linux
- Shift register – Standalone/Linux
- Systolic array – Standalone/Linux
- Wide memory rw – Standalone/Linux
- Window array 2d – Standalone/Linux
- Direct connect – Standalone/Linux
- Data access random – Standalone/Linux
- Sys port – Standalone/Linux
- Hello vadd – Standalone/Linux
- File IO Video Processing – Linux
- File IO Dense Optical Flow – Linux
- File IO Stereo Block Matching – Linux
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Other Files (5 Files)
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te0820_2eg_1e_SDSoC_PFM_SDx_2017.1-build_05_20171123122541.zip
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te0820_3cg_1e_SDSoC_PFM_SDx_2017.1-build_05_20171123122541.zip
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te0820_es1_SDSoC_PFM_SDx_2017.1-build_05_20171123122541.zip
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TE0820 Basic-System
-Downloadable files are located below the description-
Currently implemented:
- ETH
- USB 2.0
- Boot Modes
- Selectable Boot Mode depends on CPLD Firmware, default QSPI and JTAG is selectable. 2 Firmware variants are available on download, for description see TE0820 CPLD Firmware.
- USB2.0
- Currently USB3.0 must be activated for USB2.0 USB3.0 settings are not included into Board Part Files: Enable USB 3.0 and set MGT REF-CLK to 100MHz.
- For 2CG,2EG and 3CG Devices only:
- Xilinx 2017.1 software do not complete support CG and ZU2 devices. SDK PMU firmware generation and JTAG connected failed. Use 2017.2 for configuration.
- Copy image.ub (<design_name>/prebuilt/os/petalinux/<short dir or default>) on SD-Card.
- Set Boot Mode to JTAG-Boot.
- Power on carrier.
- Program Flash with Boot.bin (<design_name>/prebuilt/boot_images/<short dir>/u-boot).
- Set Boot Mode to QSPI-Boot.
- Reset module or power off/on carrier.
- Serial Console:
- Windows: Open Serial Console (e.g. putty):COM Port(see device manager), Speed(115200).
- Linux: Open Serial Console (e.g. minicom):COM Port(dmesg |grep tty) UART is *USB1, Speed(115200).
- VIO Signals (SI5338 CLK0, PHY LED, FIRMWARE Version):
- Open Vivado Hardware Manager with auto connect.
- Use probe specification from prebuilt folder (*.ltx).
- Add VIO signals to dashboard.
- Set radix to unsigned integer.
Component | Description |
---|---|
PS-MIOs | QSPI, GEM3, USB0, SD0(eMMC), SD1(SD), I2C0, UART0, DDR4 |
Xilinx-IP | VIO |
TE-IP | LabTools FMeter |
Application | Description |
---|---|
zynqmp_fsbl | TE modified Zynq FSBL for SI5338 Configuration (template in subfolder sw_lib) |
zynqmp_pmufw | Xilinx default PMU |
hello_world | Xilinx Hello World Example |
u-boot | Petalinux-Uboot (image.ub in <design_name>/prebuilt/os/petalinux/<short dir or default>) |
Name | Folder | Description |
---|---|---|
SI5338 Project | <design_name>/misc/si5338/ | Clock Builder Desktop Project, with all CLKs enabled. |
FSBL Template | <design_name>/sw_lib/ | Modified FSBL Template for SDK/HSI |
PetaLinux Project | <design_name>/os/petalinux | PetaLinux Project with I2C,ETH0,SD,USB |
File | File-Extension | Description |
---|---|---|
BIF-File | *.bif | File with description to generate Bin-File |
BIN-File | *.bin | Flash Configuration File with Boot-Image (Zynq-FPGAs) |
BIT-File | *.bit | FPGA Configuration File |
DebugProbes-File | *.ltx | Definition File for Vivado/Vivado Labtools Debugging Interface |
Diverse Reports | --- | Report files in different formats |
Hardware-Platform-Specification-Files | *.hdf | Exported Vivado Hardware Specification for SDK/HSI |
LabTools Project-File | *.lpr | Vivado Labtools Project File |
OS-Image | *.ub | Image with Linux Kernel (On Petalinux optional with Devicetree and RAM-Disk) |
Software-Application-File | *.elf | Software Application for Zynq or MicroBlaze Processor Systems |
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Reference Design - Source Code and Configuration Files (1 Files) te0820-test_board-vivado_2017.1-build_04_20170821162153.zip
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test_board - TE0820 Basic Linux Example
TE0820 Basic Linux Example
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Reference Design - Source Code and Configuration Files (1 Files) TE0820-test_board-vivado_2017.2-build_05_20171121160552.zip
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Reference Design - Documentation (1 Files) TE0820-test_board-vivado_2017.2-build_05_v24.pdf
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test_board - TE0820 Basic Linux Example
TE0820 Basic Linux Example
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Reference Design - Source Code and Configuration Files (1 Files) TE0820-test_board-vivado_2017.4-build_10_20180619160713.zip
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Reference Design - Documentation (1 Files) TE0820-test_board-vivado_2017.4-build_10_v34.pdf
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SDSoC - TE0820 SDSoC Example
TE0820 SDSoC
-Downloadable files are located below the description-
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SDSoC_PFM_TE0820-02-2CG-1E_20181031175824.zip
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SDSoC_PFM_TE0820-02-2EG-1E3_20181031173830.zip
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SDSoC_PFM_TE0820-02-2EG-1EA_20181031191613.zip
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SDSoC_PFM_TE0820-02-2EG-1EL_20181031193500.zip
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SDSoC_PFM_TE0820-02-2EG-1E_20181031171819.zip
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SDSoC_PFM_TE0820-02-3CG-1EA_20181031205256.zip
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SDSoC_PFM_TE0820-02-3CG-1E_20181031185709.zip
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SDSoC_PFM_TE0820-02-3EG-1E3_20181031183751.zip
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SDSoC_PFM_TE0820-02-3EG-1EL_20181031203317.zip
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SDSoC_PFM_TE0820-02-3EG-1E_20181031181756.zip
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SDSoC_PFM_TE0820-02-4CG-1EA_20181031211356.zip
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SDSoC_PFM_TE0820-03-2CG-1EA_20181031215602.zip
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SDSoC_PFM_TE0820-03-2EG-1EA_20181031221543.zip
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SDSoC_PFM_TE0820-03-2EG-1EL_20181031223437.zip
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SDSoC_PFM_TE0820-03-4EV-1EA_20181031213542.zip
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SDSoC Reference Design to create SDSoC Platform (1 Files) TE0820-TE0820_zusys_SDSoC-vivado_2018.2-build_03_20181101090815.zip
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TE0820 Basic Linux Example
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Reference Design - Source Code and Configuration Files (1 Files) TE0820-test_board-vivado_2018.2-build_03_20181031164452.zip
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Reference Design - Documentation (1 Files) TE0820-test_board-vivado_2018.2-build_03-v42.pdf
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test_board - TE0820 Basic Linux Example
TE0820 Basic Linux Example
-Downloadable files are located below the description-
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Reference Design - Source Code and Configuration Files (1 Files) TE0820-test_board-vivado_2018.3-build_09_20191029071028.zip
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Reference Design - Documentation (1 Files) TE0820-test_board-vivado_2018.3-build_09-v56.pdf
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HDMI701 - TE0701 HDMI Example with TE0820
TE0701 HDMI Example with TE0820
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Reference Design - Source Code and Configuration Files (1 Files) TE0820-HDMI701-vivado_2019.2-build_8_20200330084931.zip
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Reference Design - Documentation (0 Files) Other Files (2 Files)
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te0820-ubuntu.zip
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TE0820 Design for TEF1002 Carrier
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Reference Design - Source Code and Configuration Files (1 Files) TE0820-TD_TEF1002-vivado_2019.2-build_8_20200325084033.zip
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Reference Design - Documentation (0 Files) Other Files (0 Files)
TE0820 Basic Linux Example
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Reference Design - Source Code and Configuration Files (1 Files) TE0820-test_board-vivado_2019.2-build_10_20200408073444.zip
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Reference Design - Documentation (1 Files) TE0820-test_board_noprebuilt-vivado_2019.2-build_10_v.62-06_01_2021.pdf
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test_board - TE0820 Basic Linux Example
TE0820 Basic Linux Example
-Downloadable files are located below the description-
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Reference Design - Source Code and Configuration Files (1 Files) TE0820-test_board-vivado_2020.2-build_5_20210601084124.zip
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Reference Design - Documentation (1 Files) TE0820-test_board-vivado_2020.2-build_5_v.65-01_14_2022.pdf
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test_board - TE0820 Basic Linux Example
TE0820 Basic Linux Example
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TE0820-test_board_noprebuilt-vivado_2021.2_withoutvivadopatch-build_11_20220128090819.zip
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Reference Design - Source Code and Configuration Files (2 Files) TE0820-test_board-vivado_2021.2-build_20_20230324121549.zip
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TE0820-test_board-vivado_2021.2_withoutvivadopatch-build_11_20220128090819.zip
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Reference Design - Documentation (0 Files) Other Files (1 Files) 2022.2
test_board - TE0820 Basic Linux Example
TE0820 Basic Linux Example
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Reference Design - Source Code and Configuration Files (1 Files) TE0820-test_board-vivado_2022.2-build_2_20230622121437.zip
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Reference Design - Documentation (1 Files) TE0820-test_board-vivado_2022.2-build_2_v.77-02_22_2024.pdf
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Other Files (0 Files)
test_board - TE0820 Basic Linux Example
TE0820 Basic Linux Example
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Reference Design - Source Code and Configuration Files (1 Files) TE0820-test_board-vivado_2023.2-build_4_20240305102020.zip
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Reference Design - Documentation (0 Files) Other Files (0 Files)
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PCN-20210616 TE0821-01 eMMC Change and Product Update.pdf
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PCN-20240207 TE0821-01 Pull-up resistor removal for signal MR.pdf
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PCN-20240621 TE0821-01 to TE0821-02 Hardware Revision Change.pdf
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Schematics (32 Files) SCH-TE0821-01-02CG-1EC.PDF
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SCH-TE0821-01-03EG-1EL.PDF
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SCH-TE0821-01-2AE21FA.PDF
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SCH-TE0821-01-2AE21MA.PDF
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SCH-TE0821-01-2AE31FA.PDF
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SCH-TE0821-01-2AE31KA.PDF
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SCH-TE0821-01-2AE31MA.PDF
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SCH-TE0821-01-2AE31PA.PDF
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SCH-TE0821-01-2AE31PAZ.PDF
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SCH-TE0821-01-2BE31FA.PDF
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SCH-TE0821-01-2BE31MA.PDF
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SCH-TE0821-01-3AE21MAZ.PDF
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SCH-TE0821-01-3AE31KA.PDF
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SCH-TE0821-01-3AE31PA.PDF
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SCH-TE0821-01-3BE21FA.PDF
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SCH-TE0821-01-3BE21FC.PDF
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SCH-TE0821-01-3BE21FL.PDF
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SCH-TE0821-01-3BE21MA.PDF
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SCH-TE0821-01-3BE21MAZ.PDF
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SCH-TE0821-01-3BE21MC.PDF
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SCH-TE0821-01-3BE21MD.PDF
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SCH-TE0821-01-3BE21ML.PDF
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SCH-TE0821-01-3BE91ND.PDF
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SCH-TE0821-01-3BI21FA.PDF
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SCH-TE0821-01-3BI21FL.PDF
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SCH-TE0821-01-3BI21MA.PDF
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SCH-TE0821-01-3BI21MC.PDF
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SCH-TE0821-01-3BI21MD.PDF
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SCH-TE0821-01-3BI21ML.PDF
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SCH-TE0821-01-3BI91ND.PDF
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SCH-TE0821-01-4DE31FL.PDF
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SCH-TE0821-01-4DE31ML.PDF
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Assembly Diagrams (32 Files) AD-TE0821-01-02CG-1EC.PDF
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AD-TE0821-01-03EG-1EL.PDF
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AD-TE0821-01-2AE21FA.PDF
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AD-TE0821-01-2AE21MA.PDF
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AD-TE0821-01-2AE31FA.PDF
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AD-TE0821-01-2AE31KA.PDF
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AD-TE0821-01-2AE31MA.PDF
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AD-TE0821-01-2AE31PA.PDF
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AD-TE0821-01-2AE31PAZ.PDF
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AD-TE0821-01-2BE31FA.PDF
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AD-TE0821-01-2BE31MA.PDF
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AD-TE0821-01-3AE21MAZ.PDF
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AD-TE0821-01-3AE31KA.PDF
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AD-TE0821-01-3AE31PA.PDF
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AD-TE0821-01-3BE21FA.PDF
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AD-TE0821-01-3BE21FC.PDF
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AD-TE0821-01-3BE21FL.PDF
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AD-TE0821-01-3BE21MA.PDF
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AD-TE0821-01-3BE21MAZ.PDF
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AD-TE0821-01-3BE21MC.PDF
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AD-TE0821-01-3BE21MD.PDF
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AD-TE0821-01-3BE21ML.PDF
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AD-TE0821-01-3BE91ND.PDF
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AD-TE0821-01-3BI21FA.PDF
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AD-TE0821-01-3BI21FL.PDF
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AD-TE0821-01-3BI21MA.PDF
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AD-TE0821-01-3BI21MC.PDF
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AD-TE0821-01-3BI21MD.PDF
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AD-TE0821-01-3BI21ML.PDF
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AD-TE0821-01-3BI91ND.PDF
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AD-TE0821-01-4DE31FL.PDF
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AD-TE0821-01-4DE31ML.PDF
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3D PDF (2 Files) 3DB-TE0821-01-No Variations.PDF
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3DT-TE0821-01-No Variations.PDF
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Other Files (1 Files) Firmware - Initial Configuration for diverse PCB components, like CPLD, PLL and ...
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Source Code of CPLD Firmware (0 Files) Other Files (0 Files)
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STP-TE0821-01-No Variations.zip
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Trace Lengths (0 Files) Other Files (0 Files)
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TE0821-01-2AE31KA_bottom.jpg
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TE0821-01-2AE31KA_top.jpg
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TE0821-01-3BE21FA_angle.jpg
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TE0821-01-3BE21FA_bottom.jpg
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TE0821-01-3BE21FA_top.jpg
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TE0821-01-3BE21FL_angle.jpg
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TE0821-01-3BE21FL_bottom.jpg
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TE0821-01-3BE21FL_top.jpg
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Reference_Design - FPGA Design Examples for different Vivado Versions
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test_board - TE0821 Basic Linux Example
TE0821 Basic Linux Example
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Reference Design - Source Code and Configuration Files (1 Files) TE0821-test_board-vivado_2019.2-build_15_20201006103533.zip
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Reference Design - Documentation (1 Files) TE0821-test_board-vivado_2019.2-build_15_-v.2.pdf
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Other Files (0 Files)
test_board - TE0821 Basic Linux Example
TE0821 Basic Linux Example
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Reference Design - Source Code and Configuration Files (1 Files) TE0821-test_board-vivado_2020.2-build_8_20211013085513.zip
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Reference Design - Documentation (1 Files) TE0821-test_board-vivado_2020.2-build_8_v.6-10_19_2022.pdf
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Other Files (0 Files)
CR00200_demo - TE0821 Cruvi Demo Example
TE0821 Cruvi Demo Example
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Reference Design - Source Code and Configuration Files (1 Files) TE0821-CR00200_demo-vivado_2021.2-build_20_20221206113615.zip
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Reference Design - Documentation (0 Files) Other Files (0 Files)
TE0821 Cruvi Demo Example
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Reference Design - Source Code and Configuration Files (1 Files) TE0821-CR00202_demo-vivado_2021.2-build_20_20221206113642.zip
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Reference Design - Documentation (0 Files) Other Files (0 Files)
TE0821 Basic Linux Example
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Reference Design - Source Code and Configuration Files (1 Files) TE0821-test_board-vivado_2021.2-build_20_20221107115647.zip
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Reference Design - Documentation (1 Files) TE0821-test_board-vivado_2021.2-build_20_v.9-09_15_2023.pdf
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Other Files (0 Files)
test_board - TE0821 Basic Linux Example
TE0821 Basic Linux Example
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Reference Design - Source Code and Configuration Files (1 Files) TE0821-test_board-vivado_2022.2-build_8_20230919135517.zip
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Reference Design - Documentation (0 Files) Other Files (0 Files)
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PCN-20210618 TE0823-01 eMMC Change and Product Update.pdf
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Other Files (0 Files)
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Schematics (6 Files) SCH-TE0823-01-3PIU1FA.PDF
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SCH-TE0823-01-3PIU1FL.PDF
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SCH-TE0823-01-3PIU1MA.PDF
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SCH-TE0823-01-3PIU1ML.PDF
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SCH-TE0823-01-No Variations.PDF
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SCH-TE0823-01-S002.PDF
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Assembly Diagrams (6 Files) AD-TE0823-01-3PIU1FA.PDF
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AD-TE0823-01-3PIU1FL.PDF
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AD-TE0823-01-3PIU1MA.PDF
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AD-TE0823-01-3PIU1ML.PDF
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AD-TE0823-01-No Variations.PDF
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AD-TE0823-01-S002.PDF
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3D PDF (2 Files) 3DB-TE0823-01-No Variations.PDF
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3DT-TE0823-01-No Variations.PDF
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Other Files (0 Files)
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Source Code of CPLD Firmware (0 Files) Other Files (0 Files)
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Trace Lengths (0 Files) Other Files (0 Files)
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TE0823-01-3PIU1FA_bottom.jpg
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TE0823-01-3PIU1FA_top.jpg
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TE0823-01_angle.jpg
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TE0823-01_bottom.jpg
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TE0823-01_top.jpg
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Reference_Design - FPGA Design Examples for different Vivado Versions
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test_board - TE0823 Basic Linux Example
TE0823 Basic Linux Example
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Reference Design - Source Code and Configuration Files (1 Files) TE0823-test_board-vivado_2019.2-build_8_20200316163150.zip
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Reference Design - Documentation (1 Files) TE0823-test_board-vivado_2019.2-build_8_-v.4.pdf
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Other Files (0 Files)
test_board - TE0823 Basic Linux Example
TE0823 Basic Linux Example
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Reference Design - Source Code and Configuration Files (1 Files) TE0823-test_board-vivado_2020.2-build_7_20210824103936.zip
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Reference Design - Documentation (0 Files) Other Files (1 Files) 2021.2
test_board - TE0823 Basic Linux Example
TE0823 Basic Linux Example
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Reference Design - Source Code and Configuration Files (1 Files) TE0823-test_board-vivado_2021.2-build_20_20221108082219.zip
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Reference Design - Documentation (1 Files) TE0823-test_board-vivado_2021.2-build_20_v.13-09_15_2023.pdf
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Other Files (0 Files)
test_board - TE0823 Basic Linux Example
TE0823 Basic Linux Example
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Reference Design - Source Code and Configuration Files (1 Files) TE0823-test_board-vivado_2022.2-build_8_20230920091958.zip
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Reference Design - Documentation (0 Files) Other Files (0 Files)
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PCN-20190111 TE0841-02-_ SPI Flash Change-v15-20190715_1348.pdf
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PCN-20240617 TE0841-02 Voltage rail _PL_GT_1V05_ increase from 1.05 V to 1.2 V.pdf
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Other Files (0 Files)
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Schematics (5 Files) SCH-TE0841-01-035-1C.PDF
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SCH-TE0841-01-035-1I.PDF
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SCH-TE0841-01-035-2I.PDF
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SCH-TE0841-01-040-1C.PDF
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SCH-TE0841-01-040-1I.PDF
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Assembly Diagrams (5 Files) AD-TE0841-01-035-1C.PDF
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AD-TE0841-01-035-1I.PDF
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AD-TE0841-01-035-2I.PDF
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AD-TE0841-01-040-1C.PDF
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AD-TE0841-01-040-1I.PDF
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3D PDF (2 Files) 3DB-TE0841-01.PDF
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3DT-TE0841-01.PDF
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Other Files (0 Files)
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SC-PGM-TE0841-01_SC841-01_20161102.zip
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Source Code of CPLD Firmware (0 Files) Other Files (0 Files)
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Trace Lengths (1 Files) TL-TE0841-01.xls
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Other Files (0 Files)
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TE0841-01-035-2I top.jpg
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REV02 - PCB Revision: Schematics, AD, STEP, HW Design Files and more ...
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Schematics (13 Files) SCH-TE0841-02-035-1C.PDF
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SCH-TE0841-02-035-1I.PDF
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SCH-TE0841-02-035-2I.PDF
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SCH-TE0841-02-040-1C.PDF
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SCH-TE0841-02-040-1I.PDF
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SCH-TE0841-02-040-1IL.PDF
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SCH-TE0841-02-31C21-A.PDF
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SCH-TE0841-02-31I21-A.PDF
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SCH-TE0841-02-31I21-T.PDF
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SCH-TE0841-02-32I21-A.PDF
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SCH-TE0841-02-41C21-A.PDF
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SCH-TE0841-02-41I21-A.PDF
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SCH-TE0841-02-41I21-L.PDF
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Assembly Diagrams (13 Files) AD-TE0841-02-035-1C.PDF
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AD-TE0841-02-035-1I.PDF
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AD-TE0841-02-035-2I.PDF
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AD-TE0841-02-040-1C.PDF
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AD-TE0841-02-040-1I.PDF
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AD-TE0841-02-040-1IL.PDF
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AD-TE0841-02-31C21-A.PDF
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AD-TE0841-02-31I21-A.PDF
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AD-TE0841-02-31I21-T.PDF
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AD-TE0841-02-32I21-A.PDF
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AD-TE0841-02-41C21-A.PDF
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AD-TE0841-02-41I21-A.PDF
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AD-TE0841-02-41I21-L.PDF
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3D PDF (2 Files) 3DB-TE0841-02.PDF
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3DT-TE0841-02.PDF
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Other Files (0 Files)
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Source Code of CPLD Firmware (0 Files) Other Files (0 Files)
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TE0841-02-035-1C_bottom.jpg
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TE0841-02-035-1C_top.jpg
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TE0841-02-035-1I_angle.jpg
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TE0841-02-035-1I_bottom.jpg
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TE0841-02-035-1I_top.jpg
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TE0841-02-035-2I_angle.jpg
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TE0841-02-035-2I_bottom.jpg
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TE0841-02-035-2I_top.jpg
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TE0841-02-040-1C_angle.jpg
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TE0841-02-040-1C_bottom.jpg
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TE0841-02-040-1C_top.jpg
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TE0841-02-040-1I_angle.jpg
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TE0841-02-040-1I_bottom.jpg
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TE0841-02-040-1I_top.jpg
Size
Reference_Design - FPGA Design Examples for different Vivado Versions
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f32c_arduino
Files TE0841-f32c_demo-vivado_2016.1-build_33_20160528150905.zip
Size
TE0841-f32c_demo_noprebuilt-vivado_2016.1-build_33_20160528150919.zip
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2016.2
test_board - TE0841 MicroBlaze Design with both DDR4
TE0841 MicroBlaze Design with both DDR4
-Downloadable files are located below the description-
Component | Description |
---|---|
Xilinx-IP | MicroBlaze, MB-Debug, Uartlite, 2x DDR4 SDRAM MIG, I2C, QSPI, Timer |
TE-IP | TE0841 System-Controller |
Application | Description |
---|---|
SREC SPI Bootloader | Bootloader for U-boot SREC. TE-Modified as library available. Used as Firmware for MicroBlaze. |
u-boot | Petalinux-Uboot (image.ub in prebuilt-folder,ex.:/os/petalinux/default) |
Name | Folder | Description |
---|---|---|
MB Firmware | <firmware>/microblaze_0/ | MicroBlaze SREC SPI Bootloader Elf-File as firmware |
PetaLinux Project | <design_name>/os/petalinux | PetaLinux Project with I2C, Flash, 2xDDR4 |
File | File-Extension | Description |
---|---|---|
BIT-File | *.bit | FPGA Configuration File |
DebugProbes-File | *.ltx | Definition File for Vivado/Vivado Labtools Debugging Interface |
Diverse Reports | --- | Report files in different formats |
Hardware-Platform-Specification-Files | *.hdf | Exported Vivado Hardware Specification for SDK/HSI |
LabTools Project-File | *.lpr | Vivado Labtools Project File |
MCS-File | *.mcs | Flash Configuration File with Boot-Image (MicroBlaze or FPGA part only) |
MMI-File | *.mmi | File with BRAM-Location to generate MCS or BIT-File with *.elf content (MicroBlaze only) |
OS-Image | *.ub | Image with Linux Kernel (On Petalinux optional with Devicetree and RAM-Disk) |
Software-Application-File | *.elf | Software Application for Zynq or MicroBlaze Processor Systems |
SREC-File | *.srec | Converted Software Application for MicroBlaze Processor Systems |
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te0841-test_board_noprebuilt-vivado_2016.2-build_07_20161017100807.zip
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test_memory - TE0841 DDR4 Memory Test
TE0841 DDR4 Memory Test
-Downloadable files are located below the description-
Component | Description |
---|---|
Xilinx-IP | MicroBlaze, MB-Debug, Uartlite, 2x DDR4 SDRAM MIG, VIO |
TE-IP | TE0841 System-Controller |
Application | Description |
---|---|
memory_tests | Xilinx Memory Test |
Name | Folder | Description |
---|
File | File-Extension | Description |
---|---|---|
BIT-File | *.bit | FPGA Configuration File |
DebugProbes-File | *.ltx | Definition File for Vivado/Vivado Labtools Debugging Interface |
Diverse Reports | --- | Report files in different formats |
Hardware-Platform-Specification-Files | *.hdf | Exported Vivado Hardware Specification for SDK/HSI |
LabTools Project-File | *.lpr | Vivado Labtools Project File |
MCS-File | *.mcs | Flash Configuration File with Boot-Image (MicroBlaze or FPGA part only) |
MMI-File | *.mmi | File with BRAM-Location to generate MCS or BIT-File with *.elf content (MicroBlaze only) |
Software-Application-File | *.elf | Software Application for Zynq or MicroBlaze Processor Systems |
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Size
te0841-test_memory_noprebuilt-vivado_2016.2-build_07_20161017100846.zip
Size
2016.4
ibert - TE0841 IBERT
TE0841 IBERT
-Downloadable files are located below the description-
Attention: Do not use PCB without heat sink.
Launch:
- Power on module/carrier and connect JTAG
- (optional) Windows: Open Serial Console (e.g. putty):COM Port(see device manager), Speed(4800).
- (optional) Linux: Open Serial Console (e.g. minicom):COM Port(dmesg |grep tty) UART is *USB1, Speed(4800).
- (optional) SI5338 initialisation and IBERT Sys-CLK enable is displayed on console after FPGA configuration .
- Use Vivado/Vivado LabTools to configure FPGA with ibert.bit (<design_name>/prebuilt/hardware/<short dir>).
- Press Refresh on HW-Manager (IBERT GUI will appears after refresh, because ibert will be initialised only afterSI5338 configuration)
- Hint: Automatische MGT Detektion funktioniert nur, wenn die Kanäle verfügbar sind(MGT Lanes müssen mit anderem IBERT Interface verbunden sein).
Component | Description |
---|---|
Xilinx-IP | IBERT, MCU |
TE-IP | SC0841, PRIM_STARTUP_U |
Application | Description |
---|---|
SCU | System Controller Firmware for SI5338 initialisation (all outputs 125MHz). |
Name | Folder | Description |
---|---|---|
SI5338 | misc/si5338 | Si5338 Clock Builder project |
MCU Firmware | firmware/microblaze_mcs_0 | SCU Elf file for MCU |
File | File-Extension | Description |
---|---|---|
BIT-File | *.bit | FPGA Configuration File |
DebugProbes-File | *.ltx | Definition File for Vivado/Vivado Labtools Debugging Interface |
Diverse Reports | --- | Report files in different formats |
Hardware-Platform-Specification-Files | *.hdf | Exported Vivado Hardware Specification for SDK/HSI |
LabTools Project-File | *.lpr | Vivado Labtools Project File |
MCS-File | *.mcs | Flash Configuration File with Boot-Image (MicroBlaze or FPGA part only) |
MMI-File | *.mmi | File with BRAM-Location to generate MCS or BIT-File with *.elf content (MicroBlaze only) |
Software-Application-File | *.elf | Software Application for Zynq or MicroBlaze Processor Systems |
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Reference Design - Source Code and Configuration Files (1 Files) te0841-ibert-vivado_2016.4-build_06_20170412162341.zip
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Other Files (0 Files)
TE0841 DDR4 Memory Test
-Downloadable files are located below the description-
Component | Description |
---|---|
Xilinx-IP | MicroBlaze, MB-Debug, Uartlite,AXI Timer, AXI QSPI, 2x DDR4 SDRAM MIG |
TE-IP | TE0841 System-Controller |
Application | Description |
---|---|
memory_tests | Xilinx Memory Test |
Name | Folder | Description |
---|
File | File-Extension | Description |
---|---|---|
BIT-File | *.bit | FPGA Configuration File |
DebugProbes-File | *.ltx | Definition File for Vivado/Vivado Labtools Debugging Interface |
Diverse Reports | --- | Report files in different formats |
Hardware-Platform-Specification-Files | *.hdf | Exported Vivado Hardware Specification for SDK/HSI |
LabTools Project-File | *.lpr | Vivado Labtools Project File |
MCS-File | *.mcs | Flash Configuration File with Boot-Image (MicroBlaze or FPGA part only) |
MMI-File | *.mmi | File with BRAM-Location to generate MCS or BIT-File with *.elf content (MicroBlaze only) |
Software-Application-File | *.elf | Software Application for Zynq or MicroBlaze Processor Systems |
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Reference Design - Source Code and Configuration Files (1 Files) te0841-test_memory-vivado_2016.4-build_06_20170406123115.zip
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IBERT - TE0841 IBERT with SI5338 reconfiguration
TE0841 IBERT with SI5338 reconfiguration
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Reference Design - Source Code and Configuration Files (1 Files) TE0841-IBERT-vivado_2017.4-build_11_20180622140615.zip
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TE0841 SI5338 reconfiguration example
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test_board - TE0841 SI5338 reconfiguration example with linux
TE0841 SI5338 reconfiguration example
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Reference Design - Source Code and Configuration Files (1 Files) TE0841-test_board-vivado_2019.2-build_11_20200513071943.zip
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test_board - TE0841 SI5338 reconfiguration example with linux
TE0841 SI5338 reconfiguration example
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Reference Design - Source Code and Configuration Files (1 Files) TE0841-test_board-vivado_2021.2-build_14_20220506142737.zip
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3DT-TEG2000-01-No Variations.PDF
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Reference_Design - FPGA Design Examples
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test_board - TEG2000 Blink Example
TEG2000 Blink Example
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Schematics (5 Files) SCH-TEM0007-01-CAA11-A.PDF
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SCH-TEM0007-01-CBD11-A.PDF
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SCH-TEM0007-01-CHD11-A.PDF
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SCH-TEM0007-01-CHE11-A.PDF
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Assembly Diagrams (5 Files) AD-TEM0007-01-CAA11-A.PDF
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AD-TEM0007-01-CAD11-A.PDF
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AD-TEM0007-01-CBD11-A.PDF
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Reference_Design - FPGA Design Examples for Libero SoC Design Suite
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test_board - TEM0007 Basic Design
TEM0007 Basic Design
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Schematics (2 Files) SCH-AMB0010-01-A.PDF
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SCH-AMB0010-01-B.PDF
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AM0010 - Xilinx UltraScale+ Zynq modules
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Schematics (7 Files) SCH-AM0010-01-2AE21MA.PDF
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SCH-AM0010-01-4BE21MA.PDF
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SCH-AM0010-01-No Variations.PDF
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Assembly Diagrams (7 Files) AD-AM0010-01-2AE21MA.PDF
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AD-AM0010-01-3BE21MA.PDF
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AD-AM0010-01-3BI21MA.PDF
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AD-AM0010-01-4AE21MA.PDF
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AD-AM0010-01-4BE21MA.PDF
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AD-AM0010-01-4DE21MA.PDF
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3DT-AM0010-01-No Variations.PDF
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REV02 - PCB Revision: Schematics, AD, STEP, HW Design Files and more ...
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Schematics (9 Files) SCH-AM0010-02-2AE21MA.PDF
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SCH-AM0010-02-3BE21MA.PDF
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SCH-AM0010-02-3BI21MA.PDF
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SCH-AM0010-02-4AE21MA.PDF
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SCH-AM0010-02-4BE21MA.PDF
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SCH-AM0010-02-4DE21MA.PDF
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SCH-AM0010-02-5DE21MA.PDF
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SCH-AM0010-02-5DI21MA.PDF
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SCH-AM0010-02-No Variations.PDF
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Assembly Diagrams (9 Files) AD-AM0010-02-2AE21MA.PDF
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AD-AM0010-02-3BE21MA.PDF
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AD-AM0010-02-3BI21MA.PDF
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AD-AM0010-02-4AE21MA.PDF
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AD-AM0010-02-4BE21MA.PDF
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AD-AM0010-02-4DE21MA.PDF
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AD-AM0010-02-5DI21MA.PDF
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AD-AM0010-02-No Variations.PDF
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3DT-AM0010-02-No Variations.PDF
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AM0010-02 angle.jpg
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Reference_Design - FPGA Design Examples for different Vivado Versions
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test_board - AM0010 Simple Board Design
AM0010 Simple Board Design
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Reference Design - Source Code and Configuration Files (1 Files) AM0010-test_board-vivado_2020.2-build_9_20211119071538.zip
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Reference Design - Documentation (1 Files) AM0010-test_board-vivado_2020.2-build_9_v.10-08_25_2023.pdf
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test_board - AM0010 Simple Board Design
AM0010 Simple Board Design
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Reference Design - Source Code and Configuration Files (1 Files) AM0010-test_board-vivado_2022.2-build_7_20230825125934.zip
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Reference Design - Documentation (1 Files) AM0010-test_board-vivado_2022.2-build_7_v.11-01_24_2024.pdf
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test_board - AM0010 Simple Board Design
AM0010 Simple Board Design
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Reference Design - Source Code and Configuration Files (1 Files) AM0010-test_board-vivado_2023.2-build_4_20240124124216.zip
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Assembly Diagrams (1 Files) AD-TEB0724-01.PDF
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TE0724 - Xilinx Zynq FPGA modules
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PCN-20200806 TE0724-03 to TE0724-04 Hardware Revision Change.pdf
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PCN-20240802 TE0724-04 PMIC DA9062 (U4) Firmware Update.pdf
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Schematics (2 Files) SCH-TE0724-02-10-1I.PDF
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SCH-TE0724-02-20-1I.PDF
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Assembly Diagrams (2 Files) AD-TE0724-02-10-1I.PDF
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AD-TE0724-02-20-1I.PDF
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TE0724-02-20-1I_bottom.jpg
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REV03 - PCB Revision: Schematics, AD, STEP, HW Design Files and more ...
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Schematics (2 Files) SCH-TE0724-03-10-1I.PDF
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SCH-TE0724-03-20-1I.PDF
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Assembly Diagrams (2 Files) AD-TE0724-03-10-1I.PDF
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AD-TE0724-03-20-1I.PDF
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3D PDF (2 Files) 3DB-TE0724-03.PDF
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3DT-TE0724-03.PDF
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Other Files (1 Files) Firmware - Initial Configuration for diverse PCB components, like CPLD, PLL and ...
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REV04 - PCB Revision: Schematics, AD, STEP, HW Design Files and more ...
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Schematics (6 Files) SCH-TE0724-04-41I32-A.PDF
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SCH-TE0724-04-41I33-A.PDF
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SCH-TE0724-04-41I33-AZ.PDF
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SCH-TE0724-04-61I32-A.PDF
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SCH-TE0724-04-61I32-AZ.PDF
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SCH-TE0724-04-61I33-A.PDF
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Assembly Diagrams (6 Files) AD-TE0724-04-41I32-A.PDF
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AD-TE0724-04-41I33-A.PDF
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AD-TE0724-04-41I33-AZ.PDF
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AD-TE0724-04-61I32-A.PDF
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AD-TE0724-04-61I32-AZ.PDF
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AD-TE0724-04-61I33-A.PDF
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3D PDF (2 Files) 3DB-TE0724-04-No Variations.PDF
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3DT-TE0724-04-No Variations.PDF
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Other Files (1 Files) Firmware - Initial Configuration for diverse PCB components, like CPLD, PLL and ...
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TE0724-04-41I32-A bottom.jpg
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TE0724-04-41I32-A top.jpg
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TE0724-04-41I33-A angle.jpg
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TE0724-04-41I33-A bottom.jpg
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TE0724-04-41I33-A top.jpg
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TE0724-04-61I32-A angle.jpg
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TE0724-04-61I32-A bottom.jpg
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TE0724-04-61I33-A angle.jpg
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TE0724-04-61I33-A bottom.jpg
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Reference_Design - FPGA Design Examples for different Vivado Versions
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test_board - TE0724 Basic Linux Example
TE0724 Basic Linux Example
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Reference Design - Source Code and Configuration Files (1 Files) TE0724-test_board-vivado_2018.2-build_04_20191212064001.zip
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test_board - TE0724 Basic Linux Example
TE0724 Basic Linux Example
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test_board - TE0724 Basic Linux Example
TE0724 Basic Linux Example
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Reference Design - Source Code and Configuration Files (1 Files) TE0724-test_board-vivado_2021.2-build_20_20221119073924.zip
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test_board - TE0724 Basic Linux Example
TE0724 Basic Linux Example
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Reference Design - Source Code and Configuration Files (1 Files) TE0724-test_board-vivado_2022.2-build_4_20230811130817.zip
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Assembly Diagrams (1 Files) AD-TEB0729-01.PDF
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3DT-TEB0729-01.PDF
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TEB0729_angle2.jpg
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REV02 - PCB Revision: Schematics, AD, STEP, HW Design Files and more ...
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Schematics (2 Files) SCH-TEB0729-02A.PDF
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SCH-TEB0729-02B.PDF
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Assembly Diagrams (3 Files) AD-TEB0729-02.PDF
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AD-TEB0729-02A.PDF
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AD-TEB0729-02B.PDF
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SCH-TEB0729-03B.PDF
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Assembly Diagrams (2 Files) AD-TEB0729-03A.PDF
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AD-TEB0729-03B.PDF
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TEB0745 - Carrierboard for TE0745, ...
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Assembly Diagrams (1 Files) AD-TEB0745-01.PDF
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REV02 - PCB Revision: Schematics, AD, STEP, HW Design Files and more ...
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Schematics (1 Files) SCH-TEB0745-02.PDF
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Assembly Diagrams (1 Files) AD-TEB0745-02.PDF
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3D PDF (3 Files) 3DB-TEB0745-02.PDF
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PDF3D-TEB0745-02.PDF
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TEBF0808 - Carrier on Mini-ITX form factor for UltraSOM+ Module like TE0808, TE0807, TE0803, ...
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PCN-20240611 TEBF0808-04A to TEBF0808-05 Hardware Revision Change.pdf
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Assembly Diagrams (1 Files) AD-TEBF0808-02.PDF
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3DT-TEBF0808-02.PDF
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SC-PGM-TEBF0808-02_SCx-05_20170609.zip
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SC-PGM-TEBF0808-02_SCx-06_20171017.zip
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Source Code of CPLD Firmware (2 Files) SC-PRJ-TEBF0808-02_SCx-05_20170609.zip
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SC-PRJ-TEBF0808-02_SCx-06_20171017.zip
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Assembly Diagrams (1 Files) AD-TEBF0808-03.PDF
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3DT-TEBF0808-03.PDF
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Files SC-PGM-TEBF0808-0304_SCx-04_20161216.zip
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SC-PGM-TEBF0808-0304_SCx-05_20170609.zip
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SC-PGM-TEBF0808-0304_SCx-06_20171017.zip
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SC-PRJ-TEBF0808-0304_SCx-05_20170609.zip
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SC-PRJ-TEBF0808-0304_SCx-06_20171017.zip
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Files[-] Close all Programming files of CPLD Firmware (1 Files) SC-PGM-TEBF0808-0304_SCx-07_20190506.zip
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Source Code of CPLD Firmware (1 Files) SC-PRJ-TEBF0808-0304_SCx-07_20190506.zip
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Trace Lengths (1 Files) TL-TEBF0808-03.xls
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Schematics (2 Files) SCH-TEBF0808-04.PDF
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SCH-TEBF0808-04A.PDF
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Assembly Diagrams (2 Files) AD-TEBF0808-04.PDF
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AD-TEBF0808-04A.PDF
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3D PDF (5 Files) 3DB-TEBF0808-04 - Kopie.PDF
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3DB-TEBF0808-04A.PDF
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3DT-TEBF0808-04A.PDF
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PDF3D-TEBF0808-04.PDF
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PDF3D-TEBF0808-04A.PDF
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Files SC-PGM-TEBF0808-0304_SCx-04_20161216.zip
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SC-PGM-TEBF0808-0304_SCx-05_20170609.zip
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SC-PGM-TEBF0808-0304_SCx-06_20171017.zip
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SC-PRJ-TEBF0808-0304_SCx-05_20170609.zip
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SC-PRJ-TEBF0808-0304_SCx-06_20171017.zip
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Files[-] Close all Programming files of CPLD Firmware (1 Files) SC-PGM-TEBF0808-0304_SCx-07_20190506.zip
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Source Code of CPLD Firmware (1 Files) SC-PRJ-TEBF0808-0304_SCx-07_20190506.zip
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Trace Lengths (1 Files) TL-TEBF0808-04.xls
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Altium Project and Libraries (1 Files) AP-TEBF0808-04.zip
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TEBF0808-04A_bottom.jpg
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TEBF0808-04A_top.jpg
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TEBF0818 - Carrier on Mini-ITX form factor for UltraSOM+ Module like TE0818, TE0817, TE0813, ...
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Source Code of CPLD Firmware (0 Files) Other Files (0 Files)
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TEBF08018-01 bottom.jpg
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TEBF08018-01 top.jpg
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REV02 - PCB Revision: Schematics, AD, STEP, HW Design Files and more ...
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Assembly Diagrams (1 Files) AD-TEBF0818-02.PDF
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3D PDF (1 Files) PDF3D-TEBF0818-02.PDF
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Other Files (2 Files)
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PAN-LPBF0818-02.PDF
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Source Code of CPLD Firmware (1 Files) SC-PRJ-TEBF0818_CPLD_REV02_20230615.zip
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3DB-TEBF0818-02.PDF
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3DT-PNBF0818-02.PDF
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3DT-TEBF0818-02.PDF
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TEBT0808 - Test Fixture for UltraSOM+ Module like TE0808, TE0807, TE0803, ...
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PCN-20240123 TEBT0808-02 to TEBT0808-03 Hardware Revision Change.pdf
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Schematics (1 Files) SCH-TEBT0808-01.PDF
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Assembly Diagrams (1 Files) AD-TEBT0808-01.PDF
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3D PDF (2 Files) 3DB-TEBT0808-01.PDF
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3DT-TEBT0808-01.PDF
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Trace Lengths (0 Files) Altium Project and Libraries (1 Files) AP-TEBT0808-01.zip
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TEBT0808-01_top.jpg
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REV02 - PCB Revision: Schematics, AD, STEP, HW Design Files and more ...
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Assembly Diagrams (1 Files) AD-TEBT0808-02.PDF
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3D PDF (1 Files) PDF3D-TEBT0808-02.PDF
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Other Files (0 Files)
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Trace Lengths (0 Files) Altium Project and Libraries (1 Files) AP-TEBT0808-02.zip
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3DT-TEBT0808-02.PDF
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TE0729 - Xilinx Zynq FPGA modules
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PCN-20210611 TE0729-02 eMMC Change.pdf
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PCN-20231110 TE0729-02 to TE0729-03 Hardware Revision Change.pdf
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Schematics (10 Files) SCH-TE0729-02-2IF.PDF
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SCH-TE0729-02-2IFC1.PDF
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SCH-TE0729-02-2IFY.PDF
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SCH-TE0729-02-2IR.PDF
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SCH-TE0729-02-2IRA.PDF
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SCH-TE0729-02-62I63FA.PDF
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SCH-TE0729-02-62I63MA.PDF
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SCH-TE0729-02-62I63MAY.PDF
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SCH-TE0729-02-62I65FM.PDF
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SCH-TE0729-02-62I65MM.PDF
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Assembly Diagrams (10 Files) AD-TE0729-02-2IF.PDF
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AD-TE0729-02-2IFC1.PDF
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AD-TE0729-02-2IFY.PDF
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AD-TE0729-02-2IR.PDF
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AD-TE0729-02-2IRA.PDF
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AD-TE0729-02-62I63FA.PDF
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AD-TE0729-02-62I63MA.PDF
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AD-TE0729-02-62I63MAY.PDF
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AD-TE0729-02-62I65FM.PDF
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AD-TE0729-02-62I65MM.PDF
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3D PDF (2 Files) 3DB-TE0729-02.PDF
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3DT-TE0729-02.PDF
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Files SC-PGM-TE0729-02_03_SC0729-03_20171025.zip
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SC-PGM-TE0729-02_SC0729-02_20170823.zip
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Files[-] Close all Programming files of CPLD Firmware (1 Files) SC-PGM-TE0729-02_03_SC0729-04_20200922.zip
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Source Code of CPLD Firmware (0 Files) Other Files (0 Files)
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STP-TE0729-02.zip
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Trace Lengths (1 Files) TL-TE0729-02.xls
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TE0729-02-2IF bottom.jpg
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TE0729-02-2IF top.jpg
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TE0729-02-2IF-K angle.jpg
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TE0729-02-2IF-K bottom.jpg
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TE0729-02-2IF-K bottom2.jpg
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TE0729-02-2IF-K top.jpg
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TE0729-02-62I63MA angle.jpg
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TE0729-02-62I63MA bottom.jpg
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Reference_Design - FPGA Design Examples for different Vivado Versions
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test_board - Zynq Basic-System
Short Description:
Excerpt of special Block-Design components/interfaces:
Component | Description |
---|---|
Zynq Processor | activated MIO-Interfaces: DDR3, QSPI, GPIO, Uart, 2x I2C, SD, Ethernet |
IP Ethernet Lite | 2x Zynq GPIO to Ethernet |
Additional Software Application for SDK/HSI and Linux:
Application | Description |
---|---|
zynq_fsbl | Zynq First Stage Bootloader |
hello_world | Xilinx Hello World Example |
Additional content in the larger ZIP with prebuilt-folders:
File | File-Extension | Description |
---|---|---|
Bin-File | *.bin | Flash Configuration File with Boot-Image (Zynq-FPGAs) |
Bit-File | *.bit | FPGA Configuration File |
Software-Application-File | *.elf | Software Application for Zynq or MicroBlaze Processor Systems |
Hardware-Platform-Specification-Files | *.hdf | Hardware Specification from the vivado project. Used in SDK/HSI |
BIF-File | *.bif | File with description to generate Bin-File |
Diverse Reports | -- | Report files in different formats |
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te0729-test_board_noprebuilt-vivado_2015.4-build_33_20160520102925.zip
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2016.1
test_board - Zynq Basic-System
Short Description:
Excerpt of special Block-Design components/interfaces:
Component | Description |
---|---|
Zynq Processor | activated MIO-Interfaces: DDR3, QSPI, GPIO, Uart, 2x I2C, SD, Ethernet |
IP Ethernet Lite | 2x Zynq GPIO to Ethernet |
Additional Software Application for SDK/HSI and Linux:
Application | Description |
---|---|
zynq_fsbl | Zynq First Stage Bootloader |
hello_world | Xilinx Hello World Example |
u-boot | Petalinux-Uboot (image.ub in prebuilt-folder,ex.:/os/petalinux/default) |
Additional content in the larger ZIP with prebuilt-folders:
File | File-Extension | Description |
---|---|---|
Bin-File | *.bin | Flash Configuration File with Boot-Image (Zynq-FPGAs) |
Bit-File | *.bit | FPGA Configuration File |
Software-Application-File | *.elf | Software Application for Zynq or MicroBlaze Processor Systems |
Hardware-Platform-Specification-Files | *.hdf | Hardware Specification from the vivado project. Used in SDK/HSI |
BIF-File | *.bif | File with description to generate Bin-File |
OS-Image | *.ub | Image with Linux Kernel (On Petalinux optional with Devicetree and RAM-Disk) |
Diverse Reports | -- | Report files in different formats |
Size
te0729-test_board_noprebuilt-vivado_2016.1-build_05_20160615091214.zip
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2016.2
te0729_sdsoc - TE0729 SDSoC
TE0729 SDSoC
-Downloadable files are located below the description-
Short Description:
TE SDSoC User Guide is available on:SDSoC Projects.
The SDSoC project is available as separate ZIP (te0729_sdsoc.zip) or can be created from reference design.
Currently supported Xilinx SDSoC Examples:
- Matrix Multiplication – Standalone/Linux
- Matrix Multiplication Data Size - Standalone/Linux
- Matrix Multiplication and Addition - Standalone/Linux
- Matrix Multiplication (area reduced) – Standalone/Linux
- Matrix Multiplication Data Size (area reduced) - Standalone/Linux
- Pipelined Matrix Multiplication (area reduced) - Linux
- Matrix Multiplication and Addition (area reduced) - Standalone/Linux
- Color Space Conversion - RGB/HSV) - Standalone/Linux
- Synthesizeable FIR Filter) - Standalone/Linux
- File IO Video Processing - Linux
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SDSoC Reference Design to create SDSoC Platform (1 Files) te0729-te0729_sdsoc-vivado_2016.2-build_09_20170111165041.zip
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Other Files (0 Files)
TE0729 Test Board
-Downloadable files are located below the description-
Component | Description |
---|---|
PS-MIOs | activated:I2C0, I2C1, UAR0, GPIO, SD0, USB0, ENET0, DDR3 |
Xilinx-IP | AXI EthernetLite |
Application | Description |
---|---|
hello_world | Xilinx default Hello World |
u-boot | Petalinux-Uboot (image.ub on prebuilt-folder,ex.:/os/petalinux/default) |
Name | Folder | Description |
---|---|---|
PetaLinux Project | <design_name>/os/petalinux | PetaLinux Project with 2x AXI Ethernet and I2C |
File | File-Extension | Description |
---|---|---|
BIF-File | *.bif | File with description to generate Bin-File |
BIN-File | *.bin | Flash Configuration File with Boot-Image (Zynq-FPGAs) |
BIT-File | *.bit | FPGA Configuration File |
Diverse Reports | --- | Report files in different formats |
Hardware-Platform-Specification-Files | *.hdf | Exported Vivado Hardware Specification for SDK/HSI |
LabTools Project-File | *.lpr | Vivado Labtools Project File |
OS-Image | *.ub | Image with Linux Kernel (On Petalinux optional with Devicetree and RAM-Disk) |
Software-Application-File | *.elf | Software Application for Zynq or MicroBlaze Processor Systems |
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te0729-test_board_noprebuilt-vivado_2016.2-build_07_20161018114227.zip
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2017.1
test_board - TE0729 Basic-System
TE0729 Basic-System
-Downloadable files are located below the description-
Currently implemented:
- ETH0
- ETH1,2(no UDHCPC)
- USB
- RTC
- Firmware Update is needed for all Modules shipped before 2017-08-22.
- CPLD Documentation on TE0729 CPLD Firmware
- CPLD Firmware Download on TE0729 CPLD Firmware
- (optional) Add ETH1 and ETH2 IP on init.sh (<design_name>/misc/sd_script) parameter.
- Copy image.ub (<design_name>/prebuilt/os/petalinux/<short dir or default>),Boot.bin (<design_name>/prebuilt/boot_images/<short dir>/u-boot) and init.sh (<design_name>/misc/sd_script) on SD-Card.
- Set Boot Mode to SD-Boot.
- Insert SD-Card in SD-Slot.
- Connect USB to JTAG / UART.
- Power on carrier.
- Linux:
- Windows: Open Serial Console (e.g. putty):COM Port(see device manager), Speed(115200).
- Linux: Open Serial Console (e.g. minicom):COM Port(dmesg |grep tty) UART is *USB1, Speed(115200).
- Vivado HW Manager VIO Interface (Watchdog example):
- Open Vivado Hardware Manager with auto connect.
- Use probe specification (*.ltx) from prebuilt folder.
- Add VIO signals to dashboard.
- Set radix for "fm_*" signals to unsigned integer.
- "fm_*" shows some clk frequencies (unit Hz). Note: inaccurate Reference CLK is used for frequency measurement.
- "WDI_EN" and "WDI_HIT_*_EN_CLK" enables FPGA watchdog control.
- Force WD to system reboot:
- Check on Hardware window VIO status is ok. (right click on vio symbol and click "commit output values to VIO core" for update).
- Enable one of the "WDI_HIT_*_EN_CLK" signals
- Enable "WDI_EN"
- To force system to reboot, disable WDI_HIT clocks.
Component | Description |
---|---|
PS-MIOs | QSPI, I2C0, I2C1, UART0, UART1, GPIO, USB0, ETH0, DDR3 |
Xilinx-IP | VIO, 2x AXI ETH Lite |
TE-IP | STARTUPE2, Frequency Counter |
Application | Description |
---|---|
zynq_fsbl | Xilinx default FSBL |
hello_world | Xilinx Hello World Example |
u-boot | Petalinux-Uboot (image.ub in <design_name>/prebuilt/os/petalinux/<short dir or default>) |
Name | Folder | Description |
---|---|---|
Init Script | <design_name>/misc/sd_script/ | Init Script for ETH1 and ETH2 |
PetaLinux Project | <design_name>/os/petalinux | PetaLinux Project with I2C,ETH0,ETH1,ETH2,SD,USB,RTC |
File | File-Extension | Description |
---|---|---|
BIF-File | *.bif | File with description to generate Bin-File |
BIN-File | *.bin | Flash Configuration File with Boot-Image (Zynq-FPGAs) |
BIT-File | *.bit | FPGA Configuration File |
DebugProbes-File | *.ltx | Definition File for Vivado/Vivado Labtools Debugging Interface |
Diverse Reports | --- | Report files in different formats |
Hardware-Platform-Specification-Files | *.hdf | Exported Vivado Hardware Specification for SDK/HSI |
LabTools Project-File | *.lpr | Vivado Labtools Project File |
OS-Image | *.ub | Image with Linux Kernel (On Petalinux optional with Devicetree and RAM-Disk) |
Software-Application-File | *.elf | Software Application for Zynq or MicroBlaze Processor Systems |
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Reference Design - Source Code and Configuration Files (1 Files) te0729-test_board-vivado_2017.1-build_04_20170824084032.zip
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Other Files (0 Files)
test_board - TE0729 Basic Linux Example
TE0729 Basic Linux Example
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Reference Design - Source Code and Configuration Files (1 Files) TE0729-test_board-vivado_2018.2-build_02_20180716161110.zip
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Reference Design - Documentation (0 Files) Other Files (0 Files)
test_board - TE0729 Basic Linux Example
TE0729 Basic Linux Example
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Reference Design - Source Code and Configuration Files (1 Files) TE0729-test_board-vivado_2019.2-build_15_20201001141230.zip
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Reference Design - Documentation (1 Files) TE0729-test_board_noprebuilt-vivado_2019.2-build_15_-v.6-06_27_2024.pdf
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Other Files (0 Files)
test_board - TE0729 Basic Linux Example
TE0729 Basic Linux Example
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Reference Design - Source Code and Configuration Files (1 Files) TE0729-test_board-vivado_2023.2-build_4_20240627160410.zip
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Reference Design - Documentation (0 Files) Other Files (0 Files)
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PCN-20190715 TE0745-02-_ SPI Flash Change-v6-20190716_1752.pdf
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PCN-20210219 TE0745-02 DDR3 Change and Product Update-v16-03_12_2021.pdf
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PCN-20230327 TE0745-02 to TE0745-03 Hardware Revision Change.pdf
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SCH-TE0745-01-35-1C.PDF
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SCH-TE0745-01-45-1C.PDF
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SCH-TE0745-01-45-2I.PDF
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Assembly Diagrams (4 Files) AD-TE0745-01-30-1I.PDF
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AD-TE0745-01-35-1C.PDF
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AD-TE0745-01-45-1C.PDF
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AD-TE0745-01-45-2I.PDF
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3D PDF (2 Files) 3DB-TE0745-01.PDF
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3DT-TE0745-01.PDF
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Source Code of CPLD Firmware (0 Files) Other Files (0 Files)
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STP-TE0745-01.zip
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Trace Lengths (1 Files) TL-TE0745-01.xls
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TE0745 bottom.jpg
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TE0745 top.jpg
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REV02 - PCB Revision: Schematics, AD, STEP, HW Design Files and more ...
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Schematics (35 Files) SCH-TE0745-02-30-1I.PDF
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SCH-TE0745-02-30-1IA.PDF
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SCH-TE0745-02-30-2IA.PDF
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SCH-TE0745-02-35-1C.PDF
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SCH-TE0745-02-35-1CA.PDF
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SCH-TE0745-02-45-1C.PDF
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SCH-TE0745-02-45-1CA.PDF
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SCH-TE0745-02-45-2I.PDF
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SCH-TE0745-02-45-2IA.PDF
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SCH-TE0745-02-45-3E.PDF
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SCH-TE0745-02-45-3EA.PDF
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SCH-TE0745-02-71I11-A.PDF
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SCH-TE0745-02-71I31-A.PDF
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SCH-TE0745-02-71I31-AZ.PDF
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SCH-TE0745-02-72I11-A.PDF
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SCH-TE0745-02-72I31-A.PDF
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SCH-TE0745-02-73E31-A.PDF
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SCH-TE0745-02-81C11-A.PDF
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SCH-TE0745-02-81C31-A.PDF
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SCH-TE0745-02-81C31-AZ.PDF
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SCH-TE0745-02-82I31-A.PDF
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SCH-TE0745-02-91C11-A.PDF
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SCH-TE0745-02-91C31-A.PDF
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SCH-TE0745-02-91C31-AZ.PDF
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SCH-TE0745-02-92I11-A.PDF
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SCH-TE0745-02-92I11-B.PDF
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SCH-TE0745-02-92I11-F.PDF
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SCH-TE0745-02-92I31-A.PDF
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SCH-TE0745-02-92I31-AZ.PDF
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SCH-TE0745-02-92I31-B.PDF
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SCH-TE0745-02-92I31-F.PDF
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SCH-TE0745-02-93E11-A.PDF
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SCH-TE0745-02-93E31-A.PDF
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SCH-TE0745-02-93E31-AZ.PDF
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SCH-TE0745-02-No Variations.PDF
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Assembly Diagrams (34 Files) AD-TE0745-02-30-1I.PDF
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AD-TE0745-02-30-1IA.PDF
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AD-TE0745-02-30-2IA.PDF
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AD-TE0745-02-35-1C.PDF
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AD-TE0745-02-35-1CA.PDF
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AD-TE0745-02-45-1C.PDF
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AD-TE0745-02-45-1CA.PDF
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AD-TE0745-02-45-2I.PDF
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AD-TE0745-02-45-2IA.PDF
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AD-TE0745-02-45-3E.PDF
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AD-TE0745-02-45-3EA.PDF
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AD-TE0745-02-71I11-A.PDF
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AD-TE0745-02-71I31-A.PDF
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AD-TE0745-02-71I31-AZ.PDF
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AD-TE0745-02-72I11-A.PDF
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AD-TE0745-02-72I31-A.PDF
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AD-TE0745-02-73E31-A.PDF
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AD-TE0745-02-81C11-A.PDF
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AD-TE0745-02-81C31-A.PDF
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AD-TE0745-02-81C31-AZ.PDF
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AD-TE0745-02-82I31-A.PDF
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AD-TE0745-02-91C11-A.PDF
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AD-TE0745-02-91C31-A.PDF
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AD-TE0745-02-91C31-AZ.PDF
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AD-TE0745-02-92I11-A.PDF
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AD-TE0745-02-92I11-B.PDF
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AD-TE0745-02-92I11-F.PDF
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AD-TE0745-02-92I31-A.PDF
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AD-TE0745-02-92I31-AZ.PDF
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AD-TE0745-02-92I31-B.PDF
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AD-TE0745-02-92I31-F.PDF
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AD-TE0745-02-93E11-A.PDF
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AD-TE0745-02-93E31-A.PDF
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AD-TE0745-02-93E31-AZ.PDF
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3D PDF (2 Files) 3DB-TE0745-02.PDF
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3DT-TE0745-02.PDF
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Other Files (1 Files) Firmware - Initial Configuration for diverse PCB components, like CPLD, PLL and ...
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Files SC-PGM-TE745-0102_SC0745-01_20160530.zip
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Files[-] Close all Programming files of CPLD Firmware (1 Files) SC-PGM-TE0745-02_SC0745-02_20230207.zip
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Source Code of CPLD Firmware (0 Files) Other Files (1 Files) HW_Design - PCB Design relevant files, like PCB-STEP-Model, Cooler-STEP-Model, Trace-length and ...
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STP-TE0745-02.zip
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Trace Lengths (1 Files) TL-TE0745-02.xls
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TE0745-02-30-1IA-K angle1.jpg
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TE0745-02-30-1IA-K bottom.jpg
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TE0745-02-30-1IA-K top.jpg
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TE0745-02-30-1I_top.JPG
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TE0745-02-30-2IA anlge.jpg
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TE0745-02-35-1C angle.jpg
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TE0745-02-45-2I angle.jpg
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TE0745-02-45-3EA angle.jpg
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TE0745-02-92I11-F angle.jpg
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TE0745-02-92I11-F bottom.jpg
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REV03 - PCB Revision: Schematics, AD, STEP, HW Design Files and more ...
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SCH-TE0745-03-72I31-A.PDF
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SCH-TE0745-03-73E31-A.PDF
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SCH-TE0745-03-81C31-A.PDF
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SCH-TE0745-03-82I31-A.PDF
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SCH-TE0745-03-91C31-A.PDF
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SCH-TE0745-03-92I31-A.PDF
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SCH-TE0745-03-93E31-A.PDF
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Assembly Diagrams (8 Files) AD-TE0745-03-71I31-A.PDF
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AD-TE0745-03-72I31-A.PDF
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AD-TE0745-03-73E31-A.PDF
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AD-TE0745-03-81C31-A.PDF
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AD-TE0745-03-82I31-A.PDF
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AD-TE0745-03-91C31-A.PDF
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AD-TE0745-03-92I31-A.PDF
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AD-TE0745-03-93E31-A.PDF
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3D PDF (2 Files) 3DB-TE0745-03.PDF
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3DT-TE0745-03.PDF
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Other Files (1 Files) Firmware - Initial Configuration for diverse PCB components, like CPLD, PLL and ...
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Source Code of CPLD Firmware (0 Files) Other Files (0 Files)
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Trace Lengths (0 Files) Other Files (0 Files)
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TE0745-03-71I31-A bottom.jpg
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TE0745-03-71I31-A top.jpg
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Reference_Design - FPGA Design Examples for different Vivado Versions
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IBERT
Files te0745-IBERT-vivado_2016.1-build_05_20160613092608.zip
Size
te0745-IBERT_6G25-vivado_2016.1-build_05_20160613092651.zip
Size
2016.2
IBERT
Files te0745_01-IBERT_3G125-vivado_2016.2-build_01_20160622171253.zip
Size
te0745_01-IBERT_6G25-vivado_2016.2-build_01_20160622171258.zip
Size
te0745_sdsoc - TE0745 SDSoC
TE0745 SDSoC
-Downloadable files are located below the description-
Short Description:
TE SDSoC User Guide is available on:SDSoC Projects.
The SDSoC project is available as separate ZIP (te0745_45_sdsoc.zip, te0745_30_sdsoc.zip) or can be created from reference design.
Currently supported Xilinx SDSoC Examples:
- Matrix Multiplication – Standalone/Linux
- Matrix Multiplication Data Size - Standalone/Linux
- Matrix Multiplication and Addition - Standalone/Linux
- Matrix Multiplication (area reduced) – Standalone/Linux
- Matrix Multiplication Data Size (area reduced) - Standalone/Linux
- Pipelined Matrix Multiplication (area reduced) - Linux
- Matrix Multiplication and Addition (area reduced) - Standalone/Linux
- Color Space Conversion - RGB/HSV) - Standalone/Linux
- Synthesizeable FIR Filter) - Standalone/Linux
- File IO Video Processing - Linux
Size
te0745_45_sdsoc.zip
Size
SDSoC Reference Design to create SDSoC Platform (1 Files) te0745-te0745_sdsoc-vivado_2016.2-build_09_20170113084344.zip
Size
Other Files (0 Files)
TE045 Test Board
-Downloadable files are located below the description-
Component | Description |
---|---|
PS-MIOs | activated: I2C0, UART0, GPIO, SD0, USB0, ENET0, QSPI |
Application | Description |
---|---|
Zynq FSBL | Zynq FSBL (TE:modified) |
hello_world | Xilinx Hello World Example |
Name | Folder | Description |
---|
File | File-Extension | Description |
---|---|---|
BIF-File | *.bif | File with description to generate Bin-File |
BIN-File | *.bin | Flash Configuration File with Boot-Image (Zynq-FPGAs) |
BIT-File | *.bit | FPGA Configuration File |
Diverse Reports | --- | Report files in different formats |
Hardware-Platform-Specification-Files | *.hdf | Exported Vivado Hardware Specification for SDK/HSI |
LabTools Project-File | *.lpr | Vivado Labtools Project File |
Software-Application-File | *.elf | Software Application for Zynq or MicroBlaze Processor Systems |
- Please read the Legal Notices before downloading Trenz Electronic documents and files.
Size
te0745-test_board_noprebuilt-vivado_2016.2-build_07_20161019104101.zip
Size
2016.4
ibert - TE0745 IBERT
TE0745 IBERT
-Downloadable files are located below the description-
Launch:
- Copy Boot.bin (<design_name>/prebuilt/boot_images/<short dir>/ibert) on SD-Card.
- Set Boot Mode to SD-Boot.
- Insert SD-Card in SD-Slot.
- Power on carrier.
- Windows: Open Serial Console (e.g. putty):COM Port(see device manager), Speed(115200).
- Linux: Open Serial Console (e.g. minicom):COM Port(dmesg |grep tty) UART is *USB1, Speed(115200).
- Open Hardware Manager on Vivado/LabTools an run auto connect. IBERT interface appears.
Component | Description |
---|---|
PS-MIOs | I2C0, UART0, GPIO, SD0, ETH0, USB0, QSPI |
Application | Description |
---|---|
zynq_fsbl | TE modified Zynq FSBL for SI5338 Configuration (template in subfolder sw_lib) |
ibert | Console output in endless loop |
Name | Folder | Description |
---|---|---|
SI5338 Project | <design_name>/misc/si5338/ | Clock Builder Desktop Project, with all CLKs enabled. |
FSBL Template | <design_name>/sw_lib/ | Modified FSBL Template for SDK/HSI |
IBERT App. | <design_name>/sw_lib/ | Hello Application Template for SDK/HSI |
File | File-Extension | Description |
---|---|---|
BIF-File | *.bif | File with description to generate Bin-File |
BIN-File | *.bin | Flash Configuration File with Boot-Image (Zynq-FPGAs) |
BIT-File | *.bit | FPGA Configuration File |
Diverse Reports | --- | Report files in different formats |
Hardware-Platform-Specification-Files | *.hdf | Exported Vivado Hardware Specification for SDK/HSI |
LabTools Project-File | *.lpr | Vivado Labtools Project File |
OS-Image | *.ub | Image with Linux Kernel (On Petalinux optional with Devicetree and RAM-Disk) |
Software-Application-File | *.elf | Software Application for Zynq or MicroBlaze Processor Systems |
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Size
Reference Design - Source Code and Configuration Files (1 Files) te0745-ibert-vivado_2016.4-build_07_20170424082202.zip
Size
Other Files (0 Files)
TE0745 Test Board
-Downloadable files are located below the description-
Launch:
- Copy image.ub (<design_name>/prebuilt/os/petalinux/<short dir or default>) and Boot.bin (<design_name>/prebuilt/boot_images/<short dir>/u-boot) on SD-Card.
- Set Boot Mode to SD-Boot.
- Insert SD-Card in SD-Slot.
- Power on carrier.
- Windows: Open Serial Console (e.g. putty):COM Port(see device manager), Speed(115200).
- Linux: Open Serial Console (e.g. minicom):COM Port(dmesg |grep tty) UART is *USB1, Speed(115200).
Component | Description |
---|---|
PS-MIOs | I2C0, UART0, GPIO, SD0, ETH0, USB0, QSPI |
Application | Description |
---|---|
zynq_fsbl | TE modified Zynq FSBL for SI5338 Configuration (template in subfolder sw_lib) |
hello_world | Xilinx Hello World Example |
u-boot | Petalinux-Uboot (image.ub in <design_name>/prebuilt/os/petalinux/<short dir or default>) |
Name | Folder | Description |
---|---|---|
SI5338 Project | <design_name>/misc/si5338/ | Clock Builder Desktop Project, with all CLKs enabled. |
FSBL Template | <design_name>/sw_lib/ | Modified FSBL Template for SDK/HSI |
PetaLinux Project | <design_name>/os/petalinux | PetaLinux Project with I2C,ETH0,SD,USB |
File | File-Extension | Description |
---|---|---|
BIF-File | *.bif | File with description to generate Bin-File |
BIN-File | *.bin | Flash Configuration File with Boot-Image (Zynq-FPGAs) |
BIT-File | *.bit | FPGA Configuration File |
Diverse Reports | --- | Report files in different formats |
Hardware-Platform-Specification-Files | *.hdf | Exported Vivado Hardware Specification for SDK/HSI |
LabTools Project-File | *.lpr | Vivado Labtools Project File |
OS-Image | *.ub | Image with Linux Kernel (On Petalinux optional with Devicetree and RAM-Disk) |
Software-Application-File | *.elf | Software Application for Zynq or MicroBlaze Processor Systems |
- Please read the Legal Notices before downloading Trenz Electronic documents and files.
Size
Reference Design - Source Code and Configuration Files (1 Files) te0745-test_board-vivado_2016.4-build_07_20170424081702.zip
Size
Other Files (0 Files)
test_board - TE0745 Basic Linux Example
TE0745 Basic Linux Example
-Downloadable files are located below the description-
- Please read the Legal Notices before downloading Trenz Electronics documents and files.
Size
Reference Design - Source Code and Configuration Files (1 Files) TE0745-test_board-vivado_2017.2-build_05_20171023171855.zip
Size
Reference Design - Documentation (0 Files) Other Files (0 Files)
IBERT - TE0745 IBERT Example
TE0745 Basic Linux Example
-Downloadable files are located below the description-
- Please read the Legal Notices before downloading Trenz Electronics documents and files.
Size
Reference Design - Source Code and Configuration Files (1 Files) TE0745-IBERT-vivado_2018.2-build_04_20190918103450.zip
Size
Reference Design - Documentation (0 Files) Other Files (0 Files)
TE0745 Basic Linux Example
-Downloadable files are located below the description-
- Please read the Legal Notices before downloading Trenz Electronics documents and files.
Size
Reference Design - Source Code and Configuration Files (1 Files) TE0745-test_board-vivado_2018.2-build_04_20190918103531.zip
Size
Reference Design - Documentation (0 Files) Other Files (0 Files)
test_board - TE0745 Basic Linux Example
TE0745 Basic Linux Example
-Downloadable files are located below the description-
- Please read the Legal Notices before downloading Trenz Electronics documents and files.
Size
Reference Design - Source Code and Configuration Files (1 Files) TE0745-test_board-vivado_2019.2-build_8_20200330083452.zip
Size
Reference Design - Documentation (0 Files) Other Files (1 Files) 2021.2
test_board - TE0745 Basic Linux Example
TE0745 Basic Linux Example
-Downloadable files are located below the description-
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Size
Reference Design - Source Code and Configuration Files (1 Files) TE0745-test_board-vivado_2021.2-build_20_20230425125003.zip
Size
Reference Design - Documentation (1 Files) TE0745-test_board-vivado_2021.2-build_20_v.15-01_25_2024.pdf
Size
Other Files (0 Files)
test_board - TE0745 Basic Linux Example
TE0745 Basic Linux Example
-Downloadable files are located below the description-
- Please read the Legal Notices before downloading Trenz Electronics documents and files.
Size
Reference Design - Source Code and Configuration Files (1 Files) TE0745-test_board-vivado_2023.2-build_4_20240220094718.zip
Size
Reference Design - Documentation (0 Files) Other Files (0 Files)
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-
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Size
AVN-20220429 Problems with PCIe on TEBF0808 with TE080x.pdf
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Design Note (0 Files) Other Files (0 Files)
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Size
PCN-20180817 TE0803-01 to TE0803-02 Hardware Revision Change.pdf
Size
PCN-20190107 TE0803-02-_-_ to TE0803-03-_-_ Hardware Revision Change-v29-20190605_1235.pdf
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PCN-20201007 TE0803-03 to TE0803-04 Hardware Revision Change-v5-02_15_2021.pdf
Size
PCN-20220223 TE0803-04 Capacitor C92 change.pdf
Size
Other Files (0 Files)
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-
If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
Size
Schematics (28 Files) SCH-TE0803-01-02CG-1E.PDF
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SCH-TE0803-01-02CG-1EA.PDF
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SCH-TE0803-01-02EG-1E.PDF
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SCH-TE0803-01-02EG-1EA.PDF
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SCH-TE0803-01-02EG-1EB.PDF
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SCH-TE0803-01-03CG-1E.PDF
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SCH-TE0803-01-03CG-1EA.PDF
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SCH-TE0803-01-03CG-1ER.PDF
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SCH-TE0803-01-03EG-1E.PDF
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SCH-TE0803-01-03EG-1E3.PDF
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SCH-TE0803-01-03EG-1EA.PDF
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SCH-TE0803-01-03EG-1EB.PDF
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SCH-TE0803-01-04CG-1E.PDF
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SCH-TE0803-01-04CG-1EA.PDF
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SCH-TE0803-01-04CG-1EB.PDF
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SCH-TE0803-01-04EG-1E.PDF
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SCH-TE0803-01-04EG-1EA.PDF
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SCH-TE0803-01-04EG-1EB.PDF
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SCH-TE0803-01-04EG-1IA.PDF
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SCH-TE0803-01-04EG-1IB.PDF
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SCH-TE0803-01-04EV-1E.PDF
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SCH-TE0803-01-04EV-1E3.PDF
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SCH-TE0803-01-04EV-1EA.PDF
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SCH-TE0803-01-05EV-1E.PDF
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SCH-TE0803-01-05EV-1EA.PDF
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SCH-TE0803-01-05EV-1IA.PDF
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SCH-TE0803-01-05EV-1IC.PDF
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SCH-TE0803-01-ES1.PDF
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Assembly Diagrams (28 Files) AD-TE0803-01-02CG-1E.PDF
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AD-TE0803-01-02CG-1EA.PDF
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AD-TE0803-01-02EG-1E.PDF
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AD-TE0803-01-02EG-1EA.PDF
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AD-TE0803-01-02EG-1EB.PDF
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AD-TE0803-01-03CG-1E.PDF
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AD-TE0803-01-03CG-1EA.PDF
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AD-TE0803-01-03CG-1ER.PDF
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AD-TE0803-01-03EG-1E.PDF
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AD-TE0803-01-03EG-1E3.PDF
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AD-TE0803-01-03EG-1EA.PDF
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AD-TE0803-01-03EG-1EB.PDF
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AD-TE0803-01-04CG-1E.PDF
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AD-TE0803-01-04CG-1EA.PDF
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AD-TE0803-01-04CG-1EB.PDF
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AD-TE0803-01-04EG-1E.PDF
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AD-TE0803-01-04EG-1EA.PDF
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AD-TE0803-01-04EG-1EB.PDF
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AD-TE0803-01-04EG-1IA.PDF
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AD-TE0803-01-04EG-1IB.PDF
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AD-TE0803-01-04EV-1E.PDF
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AD-TE0803-01-04EV-1E3.PDF
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AD-TE0803-01-04EV-1EA.PDF
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AD-TE0803-01-05EV-1E.PDF
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AD-TE0803-01-05EV-1EA.PDF
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AD-TE0803-01-05EV-1IA.PDF
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AD-TE0803-01-05EV-1IC.PDF
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AD-TE0803-01-ES1.PDF
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3D PDF (2 Files) 3DB-TE0803-01.PDF
Size
3DT-TE0803-01.PDF
Size
Other Files (1 Files) HW_Design - PCB Design relevant files, like PCB-STEP-Model, Cooler-STEP-Model, Trace-length and ...
- Please read the Legal Notices before downloading Trenz Electronics documents and files.
- Trenz Electronic use STEP-Models from different sources. Depending from model and soldering process the real dimension (especial maximum height) can be vary from the STEP-Models.
-
If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
Size
Trace Lengths (1 Files) TL-TE0803-01.xls
Size
Other Files (0 Files)
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-
If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
Size
TE0803-01 bottom.jpg
Size
TE0803-01 top.jpg
Size
REV02 - PCB Revision: Schematics, AD, STEP, HW Design Files and more ...
- If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
- Please read the Legal Notices before downloading Trenz Electronics documents and files.
-
If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
Size
Schematics (25 Files) SCH-TE0803-02-02CG-1EA.PDF
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SCH-TE0803-02-02CG-1I.PDF
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SCH-TE0803-02-02EG-1EA.PDF
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SCH-TE0803-02-02EG-1EB.PDF
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SCH-TE0803-02-03CG-1EA.PDF
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SCH-TE0803-02-03CG-1ER.PDF
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SCH-TE0803-02-03EG-1E3.PDF
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SCH-TE0803-02-03EG-1EA.PDF
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SCH-TE0803-02-03EG-1EB.PDF
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SCH-TE0803-02-03EG-1IB.PDF
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SCH-TE0803-02-04CG-1EA.PDF
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SCH-TE0803-02-04CG-1EB.PDF
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SCH-TE0803-02-04EG-1E3.PDF
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SCH-TE0803-02-04EG-1EA.PDF
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SCH-TE0803-02-04EG-1EB.PDF
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SCH-TE0803-02-04EG-1IA.PDF
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SCH-TE0803-02-04EG-1IB.PDF
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SCH-TE0803-02-04EG-1IC.PDF
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SCH-TE0803-02-04EG-1ID.PDF
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SCH-TE0803-02-04EV-1E3.PDF
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SCH-TE0803-02-04EV-1EA.PDF
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SCH-TE0803-02-04EV-1I.PDF
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SCH-TE0803-02-05EV-1EA.PDF
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SCH-TE0803-02-05EV-1IA.PDF
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SCH-TE0803-02-05EV-1IC.PDF
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Assembly Diagrams (25 Files) AD-TE0803-02-02CG-1EA.PDF
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AD-TE0803-02-02CG-1I.PDF
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AD-TE0803-02-02EG-1EA.PDF
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AD-TE0803-02-02EG-1EB.PDF
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AD-TE0803-02-03CG-1EA.PDF
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AD-TE0803-02-03CG-1ER.PDF
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AD-TE0803-02-03EG-1E3.PDF
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AD-TE0803-02-03EG-1EA.PDF
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AD-TE0803-02-03EG-1EB.PDF
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AD-TE0803-02-03EG-1IB.PDF
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AD-TE0803-02-04CG-1EA.PDF
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AD-TE0803-02-04CG-1EB.PDF
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AD-TE0803-02-04EG-1E3.PDF
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AD-TE0803-02-04EG-1EA.PDF
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AD-TE0803-02-04EG-1EB.PDF
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AD-TE0803-02-04EG-1IA.PDF
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AD-TE0803-02-04EG-1IB.PDF
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AD-TE0803-02-04EG-1IC.PDF
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AD-TE0803-02-04EG-1ID.PDF
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AD-TE0803-02-04EV-1E3.PDF
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AD-TE0803-02-04EV-1EA.PDF
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AD-TE0803-02-04EV-1I.PDF
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AD-TE0803-02-05EV-1EA.PDF
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AD-TE0803-02-05EV-1IA.PDF
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AD-TE0803-02-05EV-1IC.PDF
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3D PDF (2 Files) 3DB-TE0803-02.PDF
Size
3DT-TE0803-02.PDF
Size
Other Files (0 Files)
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- Trenz Electronic use STEP-Models from different sources. Depending from model and soldering process the real dimension (especial maximum height) can be vary from the STEP-Models.
-
If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
Size
Trace Lengths (0 Files) Other Files (0 Files)
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-
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Size
TE0803-02_bottom.jpg
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TE0803-02_top.jpg
Size
REV03 - PCB Revision: Schematics, AD, STEP, HW Design Files and more ...
- If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
- Please read the Legal Notices before downloading Trenz Electronics documents and files.
-
If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
Size
Schematics (31 Files) SCH-TE0803-03-2AE11-A.PDF
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SCH-TE0803-03-2BE11-A.PDF
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SCH-TE0803-03-2BE13-A.PDF
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SCH-TE0803-03-3AE10-R.PDF
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SCH-TE0803-03-3AE11-A.PDF
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SCH-TE0803-03-3BE11-A.PDF
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SCH-TE0803-03-3BE21-A.PDF
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SCH-TE0803-03-3BE31-A.PDF
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SCH-TE0803-03-3BI21-A.PDF
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SCH-TE0803-03-3RI21-A.PDF
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SCH-TE0803-03-4AE11-A.PDF
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SCH-TE0803-03-4AE11-AI.PDF
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SCH-TE0803-03-4AE21-A.PDF
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SCH-TE0803-03-4BE11-A.PDF
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SCH-TE0803-03-4BE21-L.PDF
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SCH-TE0803-03-4BI21-A.PDF
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SCH-TE0803-03-4BI21-X.PDF
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SCH-TE0803-03-4BI61-A.PDF
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SCH-TE0803-03-4BI61-X.PDF
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SCH-TE0803-03-4DE11-A.PDF
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SCH-TE0803-03-4DE11-AT.PDF
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SCH-TE0803-03-4DE21-L.PDF
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SCH-TE0803-03-4DI21-L.PDF
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SCH-TE0803-03-4DT55-A.PDF
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SCH-TE0803-03-4GE11-A.PDF
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SCH-TE0803-03-4GE21-L.PDF
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SCH-TE0803-03-4GI11-A.PDF
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SCH-TE0803-03-4GI21-A.PDF
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SCH-TE0803-03-5DE11-A.PDF
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SCH-TE0803-03-5DI21-A.PDF
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SCH-TE0803-03-5DI24-A.PDF
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Assembly Diagrams (31 Files) AD-TE0803-03-2AE11-A.PDF
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AD-TE0803-03-2BE11-A.PDF
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AD-TE0803-03-2BE13-A.PDF
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AD-TE0803-03-3AE10-R.PDF
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AD-TE0803-03-3AE11-A.PDF
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AD-TE0803-03-3BE11-A.PDF
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AD-TE0803-03-3BE21-A.PDF
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AD-TE0803-03-3BE31-A.PDF
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AD-TE0803-03-3BI21-A.PDF
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AD-TE0803-03-3RI21-A.PDF
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AD-TE0803-03-4AE11-A.PDF
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AD-TE0803-03-4AE11-AI.PDF
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AD-TE0803-03-4AE21-A.PDF
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AD-TE0803-03-4BE11-A.PDF
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AD-TE0803-03-4BE21-L.PDF
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AD-TE0803-03-4BI21-A.PDF
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AD-TE0803-03-4BI21-X.PDF
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AD-TE0803-03-4BI61-A.PDF
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AD-TE0803-03-4BI61-X.PDF
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AD-TE0803-03-4DE11-A.PDF
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AD-TE0803-03-4DE11-AT.PDF
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AD-TE0803-03-4DE21-L.PDF
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AD-TE0803-03-4DI21-L.PDF
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AD-TE0803-03-4DT55-A.PDF
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AD-TE0803-03-4GE11-A.PDF
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AD-TE0803-03-4GE21-L.PDF
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AD-TE0803-03-4GI11-A.PDF
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AD-TE0803-03-4GI21-A.PDF
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AD-TE0803-03-5DE11-A.PDF
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AD-TE0803-03-5DI21-A.PDF
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AD-TE0803-03-5DI24-A.PDF
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3D PDF (2 Files) 3DB-TE0803-03-No Variations.PDF
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3DT-TE0803-03-No Variations.PDF
Size
Other Files (1 Files) HW_Design - PCB Design relevant files, like PCB-STEP-Model, Cooler-STEP-Model, Trace-length and ...
- Please read the Legal Notices before downloading Trenz Electronics documents and files.
- Trenz Electronic use STEP-Models from different sources. Depending from model and soldering process the real dimension (especial maximum height) can be vary from the STEP-Models.
-
If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
Size
Trace Lengths (0 Files) Other Files (0 Files)
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If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
Size
TE0803-03-2AE11-A_bottom.jpg
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TE0803-03-2AE11-A_top.jpg
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TE0803-03-2BE11-A_angel.jpg
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TE0803-03-2BE11-A_bottom.jpg
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TE0803-03-2BE11-A_top.jpg
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TE0803-03-3BE11-A_angle.jpg
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TE0803-03-3BE11-A_top.jpg
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TE0803-03-4AE11-A_angle.jpg
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TE0803-03-4DE11-A_angel.jpg
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TE0803-03-4DE11-A_bottom.jpg
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TE0803-03-5DE11-A_bottom.jpg
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REV04 - PCB Revision: Schematics, AD, STEP, HW Design Files and more ...
- If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
- Please read the Legal Notices before downloading Trenz Electronics documents and files.
-
If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
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Schematics (38 Files) SCH-TE0803-04-2AE11-A.PDF
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SCH-TE0803-04-2AE11-AZ.PDF
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SCH-TE0803-04-2BE11-A.PDF
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SCH-TE0803-04-2BE11-AZ.PDF
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SCH-TE0803-04-3AE10-R.PDF
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SCH-TE0803-04-3AE11-A.PDF
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SCH-TE0803-04-3AE11-AZ.PDF
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SCH-TE0803-04-3BE11-A.PDF
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SCH-TE0803-04-3BE11-AZ.PDF
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SCH-TE0803-04-3BE21-A.PDF
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SCH-TE0803-04-3BE31-A.PDF
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SCH-TE0803-04-3BI21-A.PDF
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SCH-TE0803-04-3RI21-A.PDF
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SCH-TE0803-04-4AE11-A.PDF
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SCH-TE0803-04-4AE11-AZ.PDF
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SCH-TE0803-04-4BE11-A.PDF
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SCH-TE0803-04-4BE11-AZ.PDF
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SCH-TE0803-04-4BE21-L.PDF
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SCH-TE0803-04-4BI21-A.PDF
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SCH-TE0803-04-4BI21-X.PDF
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SCH-TE0803-04-4BI41-X.PDF
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SCH-TE0803-04-4DE11-A.PDF
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SCH-TE0803-04-4DE11-AZ.PDF
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SCH-TE0803-04-4DE21-L.PDF
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SCH-TE0803-04-4DE81-L.PDF
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SCH-TE0803-04-4DI21-L.PDF
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SCH-TE0803-04-4DT55-A.PDF
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SCH-TE0803-04-4GE11-A.PDF
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SCH-TE0803-04-4GE21-L.PDF
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SCH-TE0803-04-4GE21-LZ.PDF
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SCH-TE0803-04-4GE81-L.PDF
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SCH-TE0803-04-4GI21-A.PDF
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SCH-TE0803-04-5DE11-A.PDF
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SCH-TE0803-04-5DE11-AZ.PDF
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SCH-TE0803-04-5DI21-A.PDF
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SCH-TE0803-04-5DI21-AZ.PDF
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SCH-TE0803-04-5DI24-A.PDF
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SCH-TE0803-04-5DI81-A.PDF
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Assembly Diagrams (39 Files) AD-TE0803-04-2AE11-A.PDF
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AD-TE0803-04-2AE11-AZ.PDF
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AD-TE0803-04-2BE11-A.PDF
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AD-TE0803-04-2BE11-AZ.PDF
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AD-TE0803-04-3AE10-R.PDF
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AD-TE0803-04-3AE11-A.PDF
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AD-TE0803-04-3AE11-AZ.PDF
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AD-TE0803-04-3BE11-A.PDF
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AD-TE0803-04-3BE11-AZ.PDF
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AD-TE0803-04-3BE21-A.PDF
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AD-TE0803-04-3BE31-A.PDF
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AD-TE0803-04-3BI21-A.PDF
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AD-TE0803-04-3RI21-A.PDF
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AD-TE0803-04-4AE11-A.PDF
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AD-TE0803-04-4AE11-AZ.PDF
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AD-TE0803-04-4BE11-A.PDF
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AD-TE0803-04-4BE11-AZ.PDF
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AD-TE0803-04-4BE21-L.PDF
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AD-TE0803-04-4BI21-A.PDF
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AD-TE0803-04-4BI21-X.PDF
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AD-TE0803-04-4BI41-X.PDF
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AD-TE0803-04-4DE11-A.PDF
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AD-TE0803-04-4DE11-AZ.PDF
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AD-TE0803-04-4DE21-L.PDF
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AD-TE0803-04-4DE81-L.PDF
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AD-TE0803-04-4DI21-L.PDF
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AD-TE0803-04-4DT55-A.PDF
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AD-TE0803-04-4GE11-A.PDF
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AD-TE0803-04-4GE21-L.PDF
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AD-TE0803-04-4GE21-LZ.PDF
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AD-TE0803-04-4GE81-L.PDF
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AD-TE0803-04-4GI21-A.PDF
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AD-TE0803-04-5DE11-A.PDF
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AD-TE0803-04-5DE11-AZ.PDF
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AD-TE0803-04-5DI21-A.PDF
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AD-TE0803-04-5DI21-AZ.PDF
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AD-TE0803-04-5DI24-A.PDF
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AD-TE0803-04-5DI81-A.PDF
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AD-TE0803-04-No Variations.PDF
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3D PDF (3 Files) 3DB-TE0803-04-No Variations.PDF
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3DT-TE0803-04-No Variations.PDF
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PDF3D-TE0803-04-No Variations.PDF
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Other Files (1 Files) HW_Design - PCB Design relevant files, like PCB-STEP-Model, Cooler-STEP-Model, Trace-length and ...
- Please read the Legal Notices before downloading Trenz Electronics documents and files.
- Trenz Electronic use STEP-Models from different sources. Depending from model and soldering process the real dimension (especial maximum height) can be vary from the STEP-Models.
-
If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
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Trace Lengths (0 Files) Other Files (0 Files)
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-
If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
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TE0803-04 bottom.jpg
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TE0803-04 top.jpg
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Reference_Design - FPGA Design Examples for different Vivado Versions
- If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
Carrier_TEBF0808 - TE0803 Design for TEBF0808 Carrier Board
TE0803 Design for TEBF0808 Carrier Board
-Downloadable files are located below the description-
Currently implemented:
- PCIe
- USB
- SATA
- Ethernet
- Copy image.ub (prebuilt/os/petalinux/default) and Boot.bin (prebuilt/boot_images/<short dir>/u-boot) on SD-Card.
- Insert SD-Card in SD-Slot.
- Connect "XMOD-FPGA Access"-XMOD with green dot with PC.
- Power on TEBF0808.
- Windows: Open Serial Console (e.g. putty):COM Port(see device manager), Speed(115200).
- Linux: Open Serial Console (e.g. minicom):COM Port(dmesg |grep tty) UART is *USB1, Speed(115200).
Attention: PCIe initialisation start with Power Button need Slave CPLD Firmware update to REV05. Without Update press Reset Button after power on with Power Button.
Component | Description |
---|---|
PS-MIOs | GPIO, QSPI, GEM3, USB0, SD1, I2C0, UART0, PCIe Gen2 1 Lane, Display Port, SATA 1 Lane |
Xilinx-IP | VIO |
TE-IP | TEBF0808 Base-Controller |
Application | Description |
---|---|
hello_world.elf | Xilinx Hello World example |
hello_te0803.elf | Hello TE0808 as endless loop with SDK/HSI.(SDK Template:sw_lib/sw_apps) |
zynqmp_fsbl.elf | Modified FSBL, generated with SDK/HSI. (SDK Template:sw_lib/sw_apps) |
bl31.elf | ATF generated with PetaLinux. |
u-boot | Uboot generated with PetaLinux.(image.ub in prebuilt-folder,ex.:/os/petalinux/default) |
Name | Folder | Description |
---|---|---|
SI5338 | misc/Si5338 | Si5338ClockBuilder Project |
PetaLinux Project | <design_name>/os/petalinux | PetaLinux Project with USB, Ethernet, SATA, PCIe |
File | File-Extension | Description |
---|---|---|
BIF-File | *.bif | File with description to generate Bin-File |
BIN-File | *.bin | Flash Configuration File with Boot-Image (Zynq-FPGAs) |
BIT-File | *.bit | FPGA Configuration File |
DebugProbes-File | *.ltx | Definition File for Vivado/Vivado Labtools Debugging Interface |
Diverse Reports | --- | Report files in different formats |
Hardware-Platform-Specification-Files | *.hdf | Exported Vivado Hardware Specification for SDK/HSI |
LabTools Project-File | *.lpr | Vivado Labtools Project File |
OS-Image | *.ub | Image with Linux Kernel (On Petalinux optional with Devicetree and RAM-Disk) |
Software-Application-File | *.elf | Software Application for Zynq or MicroBlaze Processor Systems |
- Please read the Legal Notices before downloading Trenz Electronic documents and files.
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Reference Design - Source Code and Configuration Files (1 Files) te0803-Carrier_TEBF0808-vivado_2016.4-build_06_20170412163002.zip
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Other Files (0 Files)
TE0803 Simple Design
-Downloadable files are located below the description-
Component | Description |
---|---|
PS-MIOs | QSPI, UART0 |
Application | Description |
---|---|
hello_te0803.elf | Hello TE0803 as endless loop with SDK/HSI.(SDK Template:sw_lib/sw_apps) |
Name | Folder | Description |
---|
File | File-Extension | Description |
---|---|---|
BIF-File | *.bif | File with description to generate Bin-File |
BIN-File | *.bin | Flash Configuration File with Boot-Image (Zynq-FPGAs) |
BIT-File | *.bit | FPGA Configuration File |
Diverse Reports | --- | Report files in different formats |
Hardware-Platform-Specification-Files | *.hdf | Exported Vivado Hardware Specification for SDK/HSI |
LabTools Project-File | *.lpr | Vivado Labtools Project File |
Software-Application-File | *.elf | Software Application for Zynq or MicroBlaze Processor Systems |
- Please read the Legal Notices before downloading Trenz Electronic documents and files.
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Reference Design - Source Code and Configuration Files (1 Files) te0803-test_board-vivado_2016.4-build_06_20170412163105.zip
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Other Files (0 Files)
SK0803_SDSoC - TE0803 StarterKit SDSoC
TE0803 StarterKit SDSoC
-Downloadable files are located below the description-
Short Description:
- TE SDSoC User Guide coming soon on:SDSoC Projects
- TE SDSoC Reference Design description coming soon on:SK0803 SDSoC Design
Currently implemented SDSoC Examples:
- Array partition – Standalone/Linux
- Burst rw – Standalone/Linux
- Custom data type – Standalone/Linux
- Dependence inter – Standalone/Linux
- Dma sg – Standalone/Linux
- Dma simple – Standalone/Linux
- Full array 2d – Standalone/Linux
- Lmem 2rw – Standalone/Linux
- Loop fusion – Standalone/Linux
- Loop perfect – Standalone/Linux
- Loop reorder – Standalone/Linux
- Row array 2D – Standalone/Linux
- Shift register – Standalone/Linux
- Systolic array – Standalone/Linux
- Wide memory rw – Standalone/Linux
- Window array 2d – Standalone/Linux
- Direct connect – Standalone/Linux
- Data access random – Standalone/Linux
- Sys port – Standalone/Linux
- Hello vadd – Standalone/Linux
- File IO Video Processing – Linux
- File IO Dense Optical Flow – Linux
- File IO Stereo Block Matching – Linux
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Other Files (5 Files)
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SK0803_2eg_SDSoC_PFM_SDx_2017.1-build_05_20171009083313.zip
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SK0803_3cg_SDSoC_PFM_SDx_2017.1-build_05_20171009083313.zip
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SK0803_3eg_SDSoC_PFM_SDx_2017.1-build_05_20171009083313.zip
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SK0803_es1_SDSoC_PFM_SDx_2017.1-build_05_20171009083313.zip
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TE0803 Design for TE0803 StarterKit with TEBF0808 Carrier Board
-Downloadable files are located below the description-
Currently implemented:
- USB (3.0/2.0)
- Ethernet
- DisplayPort
- Design works only with include board part files, which names ends with *_tebf0808.
- Design works also on TE0803 with TEBF0808 standalone, but would be designed for StarterKit.
- PCIe is configured as root complex, PCIe card detection is driver dependent.
- For ES1 Devices only:
- Linux does not reboot. Power OFF StarterKit is needed.
- For Production Devices only:
- USB is not stable at the moment.
- For CG Devices only:
- Xilinx 2017.1 software do not complete support CG devices. SDK PMU firmware generation and JTAG connected failed.
- Copy image.ub (prebuilt/os/petalinux/default) and Boot.bin (prebuilt/boot_images/<short dir>/u-boot) on SD-Card.
- Insert SD-Card in SD-Slot.
- Connect "XMOD-FPGA Access"-XMOD with green dot with PC.
- Power on TEBF0808 (1. Switch on power supply unit and 2. power button on enclosure).
- Windows: Open Serial Console (e.g. putty):COM Port(see device manager), Speed(115200).
- Linux: Open Serial Console (e.g. minicom):COM Port(dmesg |grep tty) UART is *USB1, Speed(115200).
- LED PL Control (CPLD Firmware REV05 needed):
- Open Vivado HW-Manager and add VIO signal to dashboard.
- VIO value changed LED status.
- Use TEBF0808 Base-Controller RGPIO:
- There are two GPIO interfaces available, one to Master and one for Slave CPLD IOs.
- Open Vivado HW-Manager and add VIO signal to dashboard.
- Set GPIO Bits 31-28 to "1010" to activate interface.
- Signal assignment of other bits depends on CPLD Firmware, see Trenz Electronic Wiki.
Attention: PCIe card initialisation start with Power Button need Slave CPLD Firmware update to REV05. Without Update press Reset Button after power on with Power Button.
Component | Description |
---|---|
PS-MIOs | GPIO, QSPI, GEM3, USB0, SD0, SD1, I2C0, UART0, PCIe Gen2 1 Lane, Display Port, SATA 1 Lane, DDR4 |
Xilinx-IP | VIO |
TE-IP | TEBF0808 Base-Controller, axis_live_audio_1.0 |
Application | Description |
---|---|
hello_TE0803.elf | Hello TE0803 as endless loop with SDK/HSI.(SDK Template:sw_lib/sw_apps) |
zynqmp_fsbl.elf | Modified FSBL, generated with SDK/HSI. (SDK Template:sw_lib/sw_apps) |
zynqmp_pmufw.elf | Default Xilinx PMU, generated with SDK/HSI. |
bl31.elf | ATF generated with PetaLinux. |
u-boot | Uboot generated with PetaLinux.(image.ub in prebuilt-folder,ex.:/os/petalinux/default) |
Name | Folder | Description |
---|---|---|
SI5345 | misc/Si5345 | ClockBuilder Pro Project |
PetaLinux Project | <design_name>/os/petalinux | PetaLinux Project with USB, Ethernet, SATA, PCIe, DisplayPort |
Init Script | misc/init_script | Init Script for Audio |
File | File-Extension | Description |
---|---|---|
BIF-File | *.bif | File with description to generate Bin-File |
BIN-File | *.bin | Flash Configuration File with Boot-Image (Zynq-FPGAs) |
BIT-File | *.bit | FPGA Configuration File |
DebugProbes-File | *.ltx | Definition File for Vivado/Vivado Labtools Debugging Interface |
Diverse Reports | --- | Report files in different formats |
Hardware-Platform-Specification-Files | *.hdf | Exported Vivado Hardware Specification for SDK/HSI |
LabTools Project-File | *.lpr | Vivado Labtools Project File |
OS-Image | *.ub | Image with Linux Kernel (On Petalinux optional with Devicetree and RAM-Disk) |
Software-Application-File | *.elf | Software Application for Zynq or MicroBlaze Processor Systems |
- Please read the Legal Notices before downloading Trenz Electronic documents and files.
Size
Reference Design - Source Code and Configuration Files (1 Files) te0803-StarterKit-vivado_2017.1-build_04_20170727162554.zip
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Other Files (0 Files)
TE0803 Design with minimum PS Setup
-Downloadable files are located below the description-
Release Notes and Known Issues:
- Design works only with include board part files, which names ends not with *_tebf0808.
- For custom boards, please check UART. Design used UART0 on MIO42/43,
- SD is not activated!
- For CG Devices only:
- Xilinx 2017.1 software do not complete support CG devices. SDK PMU firmware generation and JTAG connected failed.
- Configure Flash with (prebuilt/boot_images/<short dir>/u-boot) or use HDF for SDK. Both need JTAG MODE, to start from flash change to QSPI Mode.
Attention: PCIe card initialisation start with Power Button need Slave CPLD Firmware update to REV05. Without Update press Reset Button after power on with Power Button.
Component | Description |
---|---|
PS-MIOs | QSPI, UART0, DDR4 |
Application | Description |
---|---|
hello_TE0803.elf | Hello TE0803 as endless loop with SDK/HSI.(SDK Template:sw_lib/sw_apps) |
zynqmp_fsbl.elf | Xilinx default FSBL |
Name | Folder | Description |
---|
File | File-Extension | Description |
---|---|---|
BIF-File | *.bif | File with description to generate Bin-File |
BIN-File | *.bin | Flash Configuration File with Boot-Image (Zynq-FPGAs) |
BIT-File | *.bit | FPGA Configuration File |
Diverse Reports | --- | Report files in different formats |
Hardware-Platform-Specification-Files | *.hdf | Exported Vivado Hardware Specification for SDK/HSI |
Software-Application-File | *.elf | Software Application for Zynq or MicroBlaze Processor Systems |
- Please read the Legal Notices before downloading Trenz Electronic documents and files.
Size
Reference Design - Source Code and Configuration Files (1 Files) te0803-test_board-vivado_2017.1-build_04_20170728105443.zip
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Other Files (0 Files)
test_board - TE0803 Simple Board Design
TE0803 Simple Board Design
-Downloadable files are located below the description-
- Please read the Legal Notices before downloading Trenz Electronics documents and files.
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Reference Design - Source Code and Configuration Files (1 Files) TE0803-test_board-vivado_2017.2-build_05_20171116152716.zip
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Reference Design - Documentation (1 Files) TE0803-test_board-vivado_2017.2-build_05-v4.pdf
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Other Files (0 Files)
SK0803_SDSoC - TE0803 StarterKit SDSoC
TE0803 StarterKit SDSoC
-Downloadable files are located below the description-
Short Description:
- TE SDSoC User Guide coming soon on:SDSoC Projects
- TE SDSoC Reference Design description coming soon on:SK0803 SDSoC Design
Currently implemented SDSoC Examples:
- Array partition – Standalone/Linux
- Burst rw – Standalone/Linux
- Custom data type – Standalone/Linux
- Dependence inter – Standalone/Linux
- Dma sg – Standalone/Linux
- Dma simple – Standalone/Linux
- Full array 2d – Standalone/Linux
- Lmem 2rw – Standalone/Linux
- Loop fusion – Standalone/Linux
- Loop perfect – Standalone/Linux
- Loop reorder – Standalone/Linux
- Row array 2D – Standalone/Linux
- Shift register – Standalone/Linux
- Systolic array – Standalone/Linux
- Wide memory rw – Standalone/Linux
- Window array 2d – Standalone/Linux
- Direct connect – Standalone/Linux
- Data access random – Standalone/Linux
- Sys port – Standalone/Linux
- Hello vadd – Standalone/Linux
- File IO Video Processing – Linux
- File IO Dense Optical Flow – Linux
- File IO Stereo Block Matching – Linux
Size
SDSoC_PFM_TE0803-01-02CG-1E_20180517163053.zip
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SDSoC_PFM_TE0803-01-02EG-1EA_20180517174134.zip
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SDSoC_PFM_TE0803-01-02EG-1E_20180517160724.zip
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SDSoC_PFM_TE0803-01-03CG-1EA_20180517185137.zip
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SDSoC_PFM_TE0803-01-03CG-1E_20180517171809.zip
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SDSoC_PFM_TE0803-01-03EG-1EA_20180517182811.zip
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SDSoC_PFM_TE0803-01-03EG-1EB_20180517191504.zip
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SDSoC_PFM_TE0803-01-03EG-1E_20180517165433.zip
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SDSoC_PFM_TE0803-01-04CG-1EA_20180517194009.zip
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SDSoC_PFM_TE0803-01-04CG-1EB_20180517205533.zip
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SDSoC_PFM_TE0803-01-04EG-1EA_20180517203108.zip
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SDSoC_PFM_TE0803-01-04EV-1EA_20180517200532.zip
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SDSoC_PFM_TE0803-01-05EV-1EA_20180517212050.zip
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SDSoC_PFM_TE0803-01-05EV-1IA_20180517214601.zip
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SDSoC_PFM_TE0803-ES1_20180517154308.zip
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SDSoC Reference Design to create SDSoC Platform (1 Files) TE0803-SK0803_zusys_SDSoC-vivado_2017.4-build_11_20180717135219.zip
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Other Files (0 Files)
TE0803 StarterKit Linux Design
-Downloadable files are located below the description-
- Please read the Legal Notices before downloading Trenz Electronics documents and files.
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Reference Design - Source Code and Configuration Files (1 Files) TE0803-Starterkit-vivado_2017.4-build_09_20180517141523.zip
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Reference Design - Documentation (1 Files) TE0803-Starterkit-vivado_2017.4-build_09-v14.pdf
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Other Files (0 Files)
TE0803 Simple Board Design
-Downloadable files are located below the description-
- Please read the Legal Notices before downloading Trenz Electronics documents and files.
Size
Reference Design - Source Code and Configuration Files (1 Files) TE0803-test_board-vivado_2017.4-build_09_20180517152103.zip
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Reference Design - Documentation (1 Files) TE0803-test_board-vivado_2017.4-build_09_-v14.pdf
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Other Files (0 Files)
SK0803_SDSoC - TE0803 SDSoC Example
TE0803 SDSoC
-Downloadable files are located below the description-
- Please read the Legal Notices before downloading Trenz Electronics documents and files.
Size
SDSoC_PFM_TE0803-01-02CG-1E_20181102084411.zip
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SDSoC_PFM_TE0803-01-02EG-1EA_20181102094616.zip
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SDSoC_PFM_TE0803-01-02EG-1E_20181102082401.zip
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SDSoC_PFM_TE0803-01-03CG-1EA_20181102104731.zip
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SDSoC_PFM_TE0803-01-03CG-1E_20181102092525.zip
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SDSoC_PFM_TE0803-01-03EG-1EA_20181102102703.zip
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SDSoC_PFM_TE0803-01-03EG-1E_20181102090443.zip
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SDSoC_PFM_TE0803-01-04CG-1EA_20181102113111.zip
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SDSoC_PFM_TE0803-01-04CG-1EB_20181102130128.zip
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SDSoC_PFM_TE0803-01-04EG-1EA_20181102123935.zip
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SDSoC_PFM_TE0803-01-04EV-1E3_20181102121708.zip
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SDSoC_PFM_TE0803-01-04EV-1EA_20181102115442.zip
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SDSoC_PFM_TE0803-01-05EV-1EA_20181102132333.zip
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SDSoC_PFM_TE0803-01-05EV-1IA_20181102134617.zip
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SDSoC_PFM_TE0803-02-03EG-1EB_20181102110817.zip
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SDSoC_PFM_TE0803-02-04EG-1IC_20181102140910.zip
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SDSoC_PFM_TE0803-02-04EV-1E3_20181102145654.zip
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SDSoC_PFM_TE0803-02-04EV-1EB_20181102143308.zip
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SDSoC Reference Design to create SDSoC Platform (1 Files) TE0803-SK0803_zusys_SDSoC-vivado_2018.2-build_03_20181112081021.zip
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Other Files (0 Files)
TE0803 StarterKit Linux Design
-Downloadable files are located below the description-
- Please read the Legal Notices before downloading Trenz Electronics documents and files.
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Reference Design - Source Code and Configuration Files (1 Files) TE0803-Starterkit-vivado_2018.2-build_03_20181026141553.zip
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Reference Design - Documentation (1 Files) TE0803-Starterkit-vivado_2018.2-build_03-v21.pdf
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Other Files (0 Files)
TE0803 Simple Board Design
-Downloadable files are located below the description-
- Please read the Legal Notices before downloading Trenz Electronics documents and files.
Size
Reference Design - Source Code and Configuration Files (1 Files) TE0803-test_board-vivado_2018.2-build_03_20181026141651.zip
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Reference Design - Documentation (1 Files) TE0803-test_board-vivado_2018.2-build_03-v18.pdf
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Other Files (0 Files)
StarterKit - TE0803 StarterKit Linux Design
TE0803 StarterKit Linux Design
-Downloadable files are located below the description-
- Please read the Legal Notices before downloading Trenz Electronics documents and files.
Size
Reference Design - Source Code and Configuration Files (1 Files) TE0803-StarterKit-vivado_2018.3-build_05_20190507093424.zip
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Reference Design - Documentation (1 Files) TE0803-StarterKit-vivado_2018.3-build_05_v24.pdf
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Other Files (0 Files)
TE0803 Simple Board Design
-Downloadable files are located below the description-
- Please read the Legal Notices before downloading Trenz Electronics documents and files.
Size
Reference Design - Source Code and Configuration Files (1 Files) TE0803-test_board-vivado_2018.3-build_05_20190506161936.zip
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Reference Design - Documentation (1 Files) TE0803-test_board-vivado_2018.3-build_05-v21.pdf
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Other Files (0 Files)
SK_DEMO1 - TE0803 StarterKit Debian and Ubuntu Example
TE0803 StarterKit Debian and Ubuntu Example
-Downloadable files are located below the description-
- Please read the Legal Notices before downloading Trenz Electronics documents and files.
Size
Reference Design - Source Code and Configuration Files (1 Files) TE0803-SK_DEMO1-vivado_2019.2-build_11_20200508143327.zip
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Reference Design - Documentation (0 Files) Other Files (2 Files)
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te0803-ubuntu.zip
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TE0803 StarterKit Linux Design
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Reference Design - Source Code and Configuration Files (1 Files) TE0803-StarterKit-vivado_2019.2-build_8_20200325082450.zip
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Reference Design - Documentation (1 Files) TE0803-StarterKit-vivado_2019.2-build_8-v.28-07_14_2021.pdf
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TE0803 Simple Board Design
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Reference Design - Source Code and Configuration Files (1 Files) TE0803-test_board-vivado_2019.2-build_9_20200406081019.zip
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Reference Design - Documentation (0 Files) Other Files (1 Files) 2020.2
StarterKit - TE0803 StarterKit Linux Design
TE0803 StarterKit Linux Design
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Reference Design - Source Code and Configuration Files (1 Files) TE0803-StarterKit-vivado_2020.2-build_7_20210906104617.zip
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Reference Design - Documentation (1 Files) TE0803-StarterKit-vivado_2020.2-build_7_v.29-03_23_2022.pdf
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TE0803 Simple Board Design
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Reference Design - Source Code and Configuration Files (1 Files) TE0803-test_board-vivado_2020.2-build_7_20210906104518.zip
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Reference Design - Documentation (1 Files) TE0803-test_board-vivado_2020.2-build_7_v.25-04_05_2022.pdf
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StarterKit - TE0803 StarterKit Linux Design
TE0803 StarterKit Linux Design
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TE0803-StarterKit_noprebuilt-vivado_2021.2-build_18_20221017093105.zip
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Reference Design - Source Code and Configuration Files (2 Files) TE0803-StarterKit-vivado_2021.2-build_15_withoutvivadopatch_20220830131524.zip
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TE0803-StarterKit-vivado_2021.2-build_18_20221017093105.zip
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Reference Design - Documentation (1 Files) TE0803-StarterKit-vivado_2021.2-build_18_v.36-09_12_2023.pdf
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TE0803 Simple Board Design
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TE0803-test_board_noprebuilt-vivado_2021.2-build_18_20221017093148.zip
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Reference Design - Source Code and Configuration Files (2 Files) TE0803-test_board-vivado_2021.2-build_15_withoutvivadopatch_20220830131430.zip
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TE0803-test_board-vivado_2021.2-build_18_20221017093148.zip
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Reference Design - Documentation (1 Files) TE0803-test_board-vivado_2021.2-build_18_v.33-09_12_2023.pdf
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StarterKit - TE0803 StarterKit Linux Design
TE0803 StarterKit Linux Design
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Reference Design - Source Code and Configuration Files (1 Files) TE0803-StarterKit-vivado_2022.2-build_8_20230914124643.zip
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TE0803 Simple Board Design
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Reference Design - Source Code and Configuration Files (1 Files) TE0803-test_board-vivado_2022.2-build_8_20230914124756.zip
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Reference Design - Documentation (0 Files) Other Files (0 Files)
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AVN-20220429 Problems with PCIe on TEBF0808 with TE080x.pdf
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PCN-20200511 TE0807-02 to TE0807-03 Hardware Revision Change.pdf
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Assembly Diagrams (1 Files) AD-TE0807-01-07EV-1E.PDF
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Schematics (9 Files) SCH-TE0807-02-04EG-1E.PDF
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SCH-TE0807-02-07EV-1E.PDF
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SCH-TE0807-02-07EV-1I.PDF
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SCH-TE0807-02-4AI21-A.PDF
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SCH-TE0807-02-4AI21-X.PDF
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SCH-TE0807-02-4BE21-A.PDF
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SCH-TE0807-02-7DE21-A.PDF
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SCH-TE0807-02-7DI21-C.PDF
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SCH-TE0807-02-7DI24-A.PDF
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Assembly Diagrams (9 Files) AD-TE0807-02-04EG-1E.PDF
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AD-TE0807-02-07EV-1E.PDF
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AD-TE0807-02-07EV-1I.PDF
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AD-TE0807-02-4AI21-A.PDF
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AD-TE0807-02-4AI21-X.PDF
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AD-TE0807-02-4BE21-A.PDF
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AD-TE0807-02-7DE21-A.PDF
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AD-TE0807-02-7DI21-C.PDF
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AD-TE0807-02-7DI24-A.PDF
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3D PDF (2 Files) 3DB-TE0807-02.PDF
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3DT-TE0807-02.PDF
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TE0807-02-07EV-1E_bottom.jpg
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TE0807-02-07EV-1E_top.jpg
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REV03 - PCB Revision: Schematics, AD, STEP, HW Design Files and more ...
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Schematics (15 Files) SCH-TE0807-03-4AI21-A.PDF
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SCH-TE0807-03-4AI21-C.PDF
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SCH-TE0807-03-4AI21-X.PDF
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SCH-TE0807-03-4AI81-A.PDF
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SCH-TE0807-03-4BE21-A.PDF
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SCH-TE0807-03-4BE81-A.PDF
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SCH-TE0807-03-7AI21-A.PDF
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SCH-TE0807-03-7AI81-A.PDF
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SCH-TE0807-03-7DE21-A.PDF
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SCH-TE0807-03-7DE81-A.PDF
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SCH-TE0807-03-7DI21-A.PDF
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SCH-TE0807-03-7DI21-C.PDF
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SCH-TE0807-03-7DI24-A.PDF
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SCH-TE0807-03-7DI81-A.PDF
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SCH-TE0807-03-7NE21-A.PDF
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Assembly Diagrams (15 Files) AD-TE0807-03-4AI21-A.PDF
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AD-TE0807-03-4AI21-C.PDF
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AD-TE0807-03-4AI21-X.PDF
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AD-TE0807-03-4AI81-A.PDF
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AD-TE0807-03-4BE21-A.PDF
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AD-TE0807-03-4BE81-A.PDF
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AD-TE0807-03-7AI21-A.PDF
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AD-TE0807-03-7AI81-A.PDF
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AD-TE0807-03-7DE21-A.PDF
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AD-TE0807-03-7DE81-A.PDF
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AD-TE0807-03-7DI21-A.PDF
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AD-TE0807-03-7DI21-C.PDF
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AD-TE0807-03-7DI24-A.PDF
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AD-TE0807-03-7DI81-A.PDF
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AD-TE0807-03-7NE21-A.PDF
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3D PDF (2 Files) 3DB-TE0807-03-No Variations.PDF
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3DT-TE0807-03-No Variations.PDF
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Trace Lengths (0 Files) Other Files (0 Files)
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TE0807-03-4AI21-A_bottom.jpg
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TE0807-03-4AI21-A_top.jpg
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TE0807-03-4BE21-A_angel.jpg
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TE0807-03-4BE21-A_bottom.jpg
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TE0807-03-4BE21-A_top.jpg
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TE0807-03-7AI21-A angel.jpg
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TE0807-03-7AI21-A bottom.jpg
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TE0807-03-7AI21-A top.jpg
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TE0807-03-7DE21-A_angel.jpg
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TE0807-03-7DE21-A_bottom.jpg
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TE0807-03-7DE21-A_top.jpg
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Reference_Design - FPGA Design Examples for different Vivado Versions
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test_board - TE0807 Simple Board Design
TE0807 Simple Board Design
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Reference Design - Source Code and Configuration Files (1 Files) TE0807-test_board-vivado_2017.2-build_05_20171114115511.zip
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Reference Design - Documentation (1 Files) TE0807-test_board-vivado_2017.2-build_05-v3-20190506_1613.pdf
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Other Files (0 Files)
StarterKit - TE0807 StarterKit Linux Design
TE0807 StarterKit Linux Design
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Reference Design - Source Code and Configuration Files (1 Files) TE0807-StarterKit-vivado_2017.4-build_10_20180524150106.zip
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Reference Design - Documentation (1 Files) TE0807-StarterKit-vivado_2017.4-build_10-v12.pdf
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TE0807 Simple Board Design
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Reference Design - Source Code and Configuration Files (1 Files) TE0807-test_board-vivado_2017.4-build_05_20180118152104.zip
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Reference Design - Documentation (1 Files) TE0807-test_board-vivado_2017.4-build_05-v5.pdf
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StarterKit - TE0807 StarterKit Linux Design
TE0807 StarterKit Linux Design
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Reference Design - Source Code and Configuration Files (1 Files) TE0807-StarterKit-vivado_2018.2-build_04_20190207111616.zip
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Reference Design - Documentation (1 Files) TE0807-StarterKit-vivado_2018.2-build_04-v15.pdf
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TE0807 Simple Board Design
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Reference Design - Source Code and Configuration Files (1 Files) TE0807-test_board-vivado_2018.2-build_04_20190207111524.zip
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Reference Design - Documentation (1 Files) TE0807-test_board-vivado_2018.2-build_04-v9.pdf
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StarterKit - TE0807 StarterKit Linux Design
TE0807 StarterKit Linux Design
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Reference Design - Source Code and Configuration Files (1 Files) TE0807-StarterKit-vivado_2018.3-build_06_20190522132448.zip
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Reference Design - Documentation (1 Files) TE0807-StarterKit-vivado_2018.3-build_06-v16.pdf
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TE0807 Simple Board Design
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Reference Design - Source Code and Configuration Files (1 Files) TE0807-test_board-vivado_2018.3-build_05_20190522132356.zip
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Reference Design - Documentation (1 Files) TE0807-test_board-vivado_2018.3-build_05-v10.pdf
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SK_DEMO1 - TE0807 StarterKit Debian and Ubuntu Example
TE0807 StarterKit Debian and Ubuntu Example
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Reference Design - Source Code and Configuration Files (1 Files) TE0807-SK_DEMO1-vivado_2019.2-build_11_20200511100750.zip
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Reference Design - Documentation (0 Files) Other Files (2 Files)
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te0807-ubuntu.zip
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TE0807 StarterKit Linux Design
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Reference Design - Source Code and Configuration Files (1 Files) TE0807-StarterKit-vivado_2019.2-build_15_20201006122402.zip
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Reference Design - Documentation (1 Files) TE0807TE0807-StarterKit-vivado_2019.2-build_15-v.21-02_08_2021.pdf
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TE0807 Simple Board Design
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Reference Design - Source Code and Configuration Files (1 Files) TE0807-test_board-vivado_2019.2-build_15_20201006121342.zip
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Reference Design - Documentation (1 Files) TE0807-test_board-vivado_2019.2-build_15-v.14-02_08_2021.pdf
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StarterKit - TE0807 StarterKit Linux Design
TE0807 StarterKit Linux Design
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Reference Design - Source Code and Configuration Files (1 Files) TE0807-StarterKit-vivado_2020.2-build_1_20210208093620.zip
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Reference Design - Documentation (1 Files) TE0807-StarterKit-vivado_2020.2-build_1_v.23-05_18_2022.pdf
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TE0807 Simple Board Design
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Reference Design - Source Code and Configuration Files (1 Files) TE0807-test_board-vivado_2020.2-build_1_20210208093443.zip
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Reference Design - Documentation (1 Files) TE0807-test_board-vivado_2020.2-build_1_v.15-05_18_2022.pdf
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StarterKit - TE0807 StarterKit Linux Design
TE0807 StarterKit Linux Design
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TE0807-StarterKit_noprebuilt-vivado_2021.2_withoutvivadopatch-build_14_20220519081728.zip
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Reference Design - Source Code and Configuration Files (2 Files) TE0807-StarterKit-vivado_2021.2-build_18_20221017093227.zip
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TE0807-StarterKit-vivado_2021.2_withoutvivadopatch-build_14_20220519081728.zip
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Reference Design - Documentation (1 Files) TE0807-StarterKit-vivado_2021.2-build_18_-v.21-08_14_2023.pdf
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Other Files (0 Files)
TE0807 Simple Board Design
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TE0807-test_board_noprebuilt-vivado_2021.2_withoutvivadopatch-build_14_20220518130935.zip
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Reference Design - Source Code and Configuration Files (2 Files) TE0807-test_board-vivado_2021.2-build_18_20221017093249.zip
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TE0807-test_board-vivado_2021.2_withoutvivadopatch-build_14_20220518130935.zip
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Reference Design - Documentation (1 Files) E0807-test_board-vivado_2021.2-build_18_v.21-08_14_2023.pdf
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Other Files (0 Files)
StarterKit - TE0807 StarterKit Linux Design
TE0807 StarterKit Linux Design
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Reference Design - Source Code and Configuration Files (1 Files) TE0807-StarterKit-vivado_2022.2-build_6_20230817092640.zip
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Reference Design - Documentation (0 Files) Other Files (0 Files)
TE0807 Simple Board Design
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Reference Design - Source Code and Configuration Files (1 Files) TE0807-test_board-vivado_2022.2-build_6_20230817092607.zip
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Reference Design - Documentation (0 Files) Other Files (0 Files)
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Design Note (0 Files) Other Files (0 Files)
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PCN-20190109 TE0808-04 SPI Flash Change.pdf
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PCN-20200327 TE0808-04 to TE0808-05 Hardware Revision Change.pdf
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PCN-20240616 TE0808-05 PLL, DCDC and DDR update.pdf
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Assembly Diagrams (1 Files) AD-TE0808-02.PDF
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3D PDF (2 Files) 3DB-TE0808-02.PDF
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3DT-TE0808-02.PDF
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Other Files (0 Files)
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STP-TE0808-02.zip
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TE0808-02_bottom.jpg
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TE0808-02_top.jpg
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REV03 - PCB Revision
Documents - Technical Reference Manual, Schematics, Assembly Diagrams and ..
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Schematics (3 Files) SCH-TE0808-03-02I.PDF
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SCH-TE0808-03.PDF
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SCH-TE0808-03ES2.PDF
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Assembly Diagrams (3 Files) AD-TE0808-03-02I.PDF
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AD-TE0808-03.PDF
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AD-TE0808-03ES2.PDF
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3D PDF (2 Files) 3DB-TE0808-03.PDF
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3DT-TE0808-03.PDF
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Other Files (0 Files)
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STP-TE0808-03.zip
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Trace Lengths (1 Files) TL-TE0808-03.xls
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TE0808-03 bottom.JPG
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TE0808-03 top.JPG
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REV04 - PCB Revision
Documents - Technical Reference Manual, Schematics, Assembly Diagrams and ..
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Schematics (22 Files) SCH-TE0808-04-06EG-1E3.PDF
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SCH-TE0808-04-06EG-1EB.PDF
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SCH-TE0808-04-06EG-1EE.PDF
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SCH-TE0808-04-09EG-1EA.PDF
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SCH-TE0808-04-09EG-1EB.PDF
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SCH-TE0808-04-09EG-1ED.PDF
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SCH-TE0808-04-09EG-1EE.PDF
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SCH-TE0808-04-09EG-1EL.PDF
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SCH-TE0808-04-09EG-2IA.PDF
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SCH-TE0808-04-09EG-2IB.PDF
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SCH-TE0808-04-09EG-2IE.PDF
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SCH-TE0808-04-15EG-1EB.PDF
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SCH-TE0808-04-15EG-1EE.PDF
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SCH-TE0808-04-6BE21-A.PDF
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SCH-TE0808-04-6BE21-L.PDF
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SCH-TE0808-04-6BI21-A.PDF
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SCH-TE0808-04-6BI21-X.PDF
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SCH-TE0808-04-6GI21-L.PDF
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SCH-TE0808-04-9BE21-A.PDF
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SCH-TE0808-04-9BE21-L.PDF
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SCH-TE0808-04-9GI21-A.PDF
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SCH-TE0808-04-BBE21-A.PDF
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Assembly Diagrams (22 Files) AD-TE0808-04-06EG-1E3.PDF
Size
AD-TE0808-04-06EG-1EB.PDF
Size
AD-TE0808-04-06EG-1EE.PDF
Size
AD-TE0808-04-09EG-1EA.PDF
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AD-TE0808-04-09EG-1EB.PDF
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AD-TE0808-04-09EG-1ED.PDF
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AD-TE0808-04-09EG-1EE.PDF
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AD-TE0808-04-09EG-1EL.PDF
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AD-TE0808-04-09EG-2IA.PDF
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AD-TE0808-04-09EG-2IB.PDF
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AD-TE0808-04-09EG-2IE.PDF
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AD-TE0808-04-15EG-1EB.PDF
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AD-TE0808-04-6BE21-A.PDF
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AD-TE0808-04-9GI21-A.PDF
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AD-TE0808-04-BBE21-A.PDF
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3D PDF (2 Files) 3DB-TE0808-04.PDF
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3DT-TE0808-04.PDF
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If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
- Please read the Legal Notices before downloading Trenz Electronics documents and files.
- Trenz Electronic use STEP-Models from different sources. Depending from model and soldering process the real dimension (especial maximum height) can be vary from the STEP-Models.
-
If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
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Trace Lengths (1 Files) TL-TE0808-04.xls
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TE0808-04-06EG-1EE_bottom.jpg
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TE0808-04-06EG-1EE_top.jpg
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TE0808-04-09EG angle.jpg
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TE0808-04-09EG bottom.jpg
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TE0808-04-09EG top.jpg
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TE0808-04-15EG-1EE_angle.jpg
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TE0808-04-15EG-1EE_bottom.jpg
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TE0808-04-15EG-1EE_top.jpg
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REV05 - PCB Revision
Documents - Technical Reference Manual, Schematics, Assembly Diagrams and ..
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Schematics (27 Files) SCH-TE0808-05-6BE21-A.PDF
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SCH-TE0808-05-6BE21-F.PDF
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SCH-TE0808-05-6BE21-L.PDF
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SCH-TE0808-05-6BE81-A.PDF
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SCH-TE0808-05-6BE81-L.PDF
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SCH-TE0808-05-6BI21-A.PDF
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SCH-TE0808-05-6BI21-X.PDF
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SCH-TE0808-05-6BI41-X.PDF
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SCH-TE0808-05-6GI21-L.PDF
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SCH-TE0808-05-9BE21-A.PDF
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SCH-TE0808-05-9BE21-AZ.PDF
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SCH-TE0808-05-9BE21-E.PDF
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SCH-TE0808-05-9BE21-F.PDF
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SCH-TE0808-05-9BE21-L.PDF
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SCH-TE0808-05-9BE81-A.PDF
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SCH-TE0808-05-9BE81-L.PDF
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SCH-TE0808-05-BBE21-L.PDF
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SCH-TE0808-05-BBE81-A.PDF
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SCH-TE0808-05-BBE81-E.PDF
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SCH-TE0808-05-No Variations.PDF
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Assembly Diagrams (26 Files) AD-TE0808-05-6BE21-A.PDF
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AD-TE0808-05-6BE21-F.PDF
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AD-TE0808-05-6BE21-L.PDF
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AD-TE0808-05-6BE81-A.PDF
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AD-TE0808-05-6BE81-L.PDF
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AD-TE0808-05-6BI21-A.PDF
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AD-TE0808-05-6BI21-X.PDF
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AD-TE0808-05-6BI41-X.PDF
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AD-TE0808-05-6GI21-L.PDF
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AD-TE0808-05-9BE21-A.PDF
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AD-TE0808-05-9BE21-AZ.PDF
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AD-TE0808-05-9BE21-F.PDF
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AD-TE0808-05-9BE21-L.PDF
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AD-TE0808-05-9BE81-A.PDF
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AD-TE0808-05-9BE81-L.PDF
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AD-TE0808-05-9BI41-X.PDF
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AD-TE0808-05-9GI21-A.PDF
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AD-TE0808-05-9GI21-C.PDF
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AD-TE0808-05-9GI21-E.PDF
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AD-TE0808-05-9GI81-A.PDF
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AD-TE0808-05-BBE21-A.PDF
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AD-TE0808-05-BBE21-E.PDF
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AD-TE0808-05-BBE21-L.PDF
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AD-TE0808-05-BBE81-A.PDF
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AD-TE0808-05-BBE81-E.PDF
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3D PDF (2 Files) 3DB-TE0808-05-No Variations.PDF
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3DT-TE0808-05-No Variations.PDF
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Other Files (1 Files) Firmware - Initial Configuration for diverse PCB components, like CPLD, PLL and ...
- Please read the Legal Notices before downloading Trenz Electronics documents and files.
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If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
- Please read the Legal Notices before downloading Trenz Electronics documents and files.
- Trenz Electronic use STEP-Models from different sources. Depending from model and soldering process the real dimension (especial maximum height) can be vary from the STEP-Models.
-
If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
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Trace Lengths (0 Files) Other Files (0 Files)
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If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
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TE0808-05-9BE21-A bottom.jpg
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TE0808-05-9BE21-A top.jpg
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Reference_Design - FPGA Design Examples for different Vivado Versions
- If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
TRD
SD_Images
Files BOOT.bin
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image.ub
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atf
Files bl31.elf
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fsbl
jtag_fsbl
Files BOOT.bin
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jtag_fsbl.bif
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uboot
Files fsbl.elf
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misc
Files Si5345-RevB-0808-02A-Draft-Datasheet-Addendum.pdf
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Si5345-RevB-0808-02A-Project.slabtimeproj
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Si5345-RevB-0808-02A-Registers.h
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pmufw
Files pmufw.elf
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readme.txt
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uboot
Files u-boot.elf
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disable_network
Files Kconfig
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Makefile
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README
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interfaces
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images
Files Image_for_TEBT0808.zip
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Files TE0808-TEB0808T_noprebuilt-vivado_2016.1-build_05_20160627110518.zip
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2016.2
Carrier_TEBF0808 - TE0808 Design for TEBF0808 Carrier Board
TE0808 Design for TEBF0808 Carrier Board
-Downloadable files are located below the description-
Launch:
- Copy image.ub (prebuilt/os/petalinux/default) and Boot.bin (prebuilt/boot_images/<short dir>/u-boot) on microSD-Card.
- Insert SD-Card in microSD-Slot(J16).
- Power on TEBF0808.
- Connect "XMOD-FPGA Access"-XMOD with PC.
- Open Serial Console:COM Port(see device manager), Speed(115200).
Component | Description |
---|---|
PS-MIOs | GPIO, QSPI, GEM3, USB0, SD1, CAN1, I2C0, UART0, PCIe-Lane 1, Display Port, SATA-Lane0 |
Xilinx-IP | VIO,ILA |
TE-IP | TEBF0808 Base-Controller, Labtools Frequency Counter, DisplayPort AUX Monitor |
Application | Description |
---|---|
zynqmp_fsbl.elf | Modified FSBL, generated with PetaLinux-Project. |
u-boot | Petalinux-Uboot (image.ub in prebuilt-folder,ex.:/os/petalinux/default) |
Name | Folder | Description |
---|---|---|
PetaLinux Project | <design_name>/os/petalinux | PetaLinux Project with apps (early-init,fbv,si534x,spitool), bootloader(zynqmo_fsbl) and modules (clk-dummy). Additional Modifications: bootloader, system-top.dts, platform-top.h. Build steos: See /os/petalinux/readme.txt |
File | File-Extension | Description |
---|---|---|
Bin-File | *.bin | Flash Configuration File with Boot-Image (Zynq-FPGAs) |
BIT-File | *.bit | FPGA Configuration File |
Software-Application-File | *.elf | Software Application for Zynq or MicroBlaze Processor Systems |
Hardware-Platform-Specification-Files | *.hdf | Exported Vivado Hardware Specification for SDK/HSI |
OS-Image | *.ub | Image with Linux Kernel (On Petalinux optional with Devicetree and RAM-Disk) |
Diverse Reports | -- | Report files in different formats |
- Please read the Legal Notices before downloading Trenz Electronic documents and files.
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TE0808-TEBF0808_noprebuilt-vivado_2016.2-build_07_20161005112112.zip
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Carrier_TEBT0808 - UlraScale+ MPSoc TEBT0808 Carrier Board Reference Design
UlraScale+ MPSoc TEBT0808 Carrier Board Reference Design
-Downloadable files are located below the description-
TE0808 Getting Started description available on TesKit 808.
Component | Description |
---|---|
PS-MIOs | QSPI, Uart1, GPIO |
Application | Description |
---|---|
u-boot | Petalinux-Uboot (image.ub in prebuilt-folder,ex.:/os/petalinux/default) |
Name | Folder | Description |
---|---|---|
PetaLinux Project | <design_name>/os/petalinux | PetaLinux Project with User-Application "disable_network" |
File | File-Extension | Description |
---|---|---|
Bin-File | *.bin | Flash Configuration File with Boot-Image (Zynq-FPGAs) |
BIT-File | *.bit | FPGA Configuration File |
Software-Application-File | *.elf | Software Application for Zynq or MicroBlaze Processor Systems |
Hardware-Platform-Specification-Files | *.hdf | Exported Vivado Hardware Specification for SDK/HSI |
OS-Image | *.ub | Image with Linux Kernel (On Petalinux optional with Devicetree and RAM-Disk) |
Diverse Reports | -- | Report files in different formats |
- Please read the Legal Notices before downloading Trenz Electronic documents and files.
Size
TE0808-TEBT0808_noprebuilt-vivado_2016.2-build_07_20161017115343.zip
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blink_done
Files TE0808-blink_done-vivado_2016.2-build_03_20160714115216.zip
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te0808_sdsoc - TE0808 SDSoC
TE0808 SDSoC
Short Description:
TE SDSoC User Guide is available on:SDSoC Projects.
The SDSoC project is available as separate ZIP (te0808_es1_sdsoc.zip) or can be created from reference design.
Currently supported Xilinx SDSoC Examples:
- Matrix Multiplication – Standalone/Linux
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SDSoC Reference Design to create SDSoC Platform (0 Files) Other Files (1 Files)
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Carrier_TEBF0808 - TE0808 Design for TEBF0808 Carrier Board
TE0808 Design for TEBF0808 Carrier Board
-Downloadable files are located below the description-
Attention: SATA is not running with this reference design. This will be fix in Vivado 2016.4 reference design. Use 2016.2 reference design until the new one is published. Launch:
- Copy image.ub (prebuilt/os/petalinux/default) and Boot.bin (prebuilt/boot_images/<short dir>/u-boot) on microSD-Card.
- Insert SD-Card in microSD-Slot(J16).
- Power on TEBF0808.
- Connect "XMOD-FPGA Access"-XMOD with PC.
- Windows: Open Serial Console (e.g. putty):COM Port(see device manager), Speed(115200).
- Linux: Open Serial Console (e.g. minicom):COM Port(dmesg |grep tty) UART is *USB1, Speed(115200).
Component | Description |
---|---|
PS-MIOs | GPIO, QSPI, GEM3, USB0, SD1, CAN1, I2C0, UART0, PCIe-Lane 1, Display Port, SATA-Lane0 |
Xilinx-IP | VIO,ILA |
TE-IP | TEBF0808 Base-Controller, Labtools Frequency Counter, DisplayPort AUX Monitor |
Application | Description |
---|---|
zynqmp_fsbl.elf | Modified FSBL, generated with PetaLinux-Project. |
u-boot | Petalinux-Uboot (image.ub in prebuilt-folder,ex.:/os/petalinux/default) |
Name | Folder | Description |
---|---|---|
PetaLinux Project | <design_name>/os/petalinux | PetaLinux Project with apps (early-init,fbv,si534x,spitool), bootloader(zynqmo_fsbl) and modules (clk-dummy). Additional Modifications: bootloader, system-top.dts, platform-top.h. Build steos: See /os/petalinux/readme.txt |
File | File-Extension | Description |
---|---|---|
Bin-File | *.bin | Flash Configuration File with Boot-Image (Zynq-FPGAs) |
BIT-File | *.bit | FPGA Configuration File |
Software-Application-File | *.elf | Software Application for Zynq or MicroBlaze Processor Systems |
Hardware-Platform-Specification-Files | *.hdf | Exported Vivado Hardware Specification for SDK/HSI |
OS-Image | *.ub | Image with Linux Kernel (On Petalinux optional with Devicetree and RAM-Disk) |
Diverse Reports | -- | Report files in different formats |
- Please read the Legal Notices before downloading Trenz Electronic documents and files.
Size
TE0808-TEBF0808_noprebuilt-vivado_2016.3-build_03_20161223104209.zip
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Carrier_TEBF0808_IBERT - TEBF0808 SFP IBERT
TEBF0808 SFP IBERT
-Downloadable files are located below the description-
Short Instruction:
- Copy Boot.bin on SD and boot TEBF0808.
- Open Vivado HW-Manager and run auto connect.
- IBERT will be detected automatically.
- Uart will print Hello TE0808 as endless loop.
Component | Description |
---|---|
PS-MIOs | SD1, QSPI, UART0, I2C |
Xilinx-IP | IBERT Ultrascale GTH |
Application | Description |
---|---|
zynqmp_fsbl | U+FSBL modified to initial SI534x PLL |
hello_te0808 | Hello Te0808 as endless loop |
Name | Folder | Description |
---|
File | File-Extension | Description |
---|---|---|
BIF-File | *.bif | File with description to generate Bin-File |
BIN-File | *.bin | Flash Configuration File with Boot-Image (Zynq-FPGAs) |
BIT-File | *.bit | FPGA Configuration File |
DebugProbes-File | *.ltx | Definition File for Vivado/Vivado Labtools Debugging Interface |
Diverse Reports | --- | Report files in different formats |
Hardware-Platform-Specification-Files | *.hdf | Exported Vivado Hardware Specification for SDK/HSI |
LabTools Project-File | *.lpr | Vivado Labtools Project File |
Software-Application-File | *.elf | Software Application for Zynq or MicroBlaze Processor Systems |
- Please read the Legal Notices before downloading Trenz Electronic documents and files.
Size
TE0808-TEBF0808_IBERT_noprebuilt-vivado_2016.3-build_02_20161205094042.zip
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2016.4
Carrier_TEBF0808 - TE0808 Design for TEBF0808 Carrier Board
TE0808 Design for TEBF0808 Carrier Board
-Downloadable files are located below the description-
Currently implemented:
- PCIe
- USB
- SATA
- Ethernet
- Copy image.ub (prebuilt/os/petalinux/default) and Boot.bin (prebuilt/boot_images/<short dir>/u-boot) on SD-Card.
- Insert SD-Card in SD-Slot.
- Connect "XMOD-FPGA Access"-XMOD with green dot with PC.
- Power on TEBF0808.
- Windows: Open Serial Console (e.g. putty):COM Port(see device manager), Speed(115200).
- Linux: Open Serial Console (e.g. minicom):COM Port(dmesg |grep tty) UART is *USB1, Speed(115200).
- ------------
- Use TEBF0808 Base-Controller RGPIO
- There are two GPIO Interfaces available to get access to Master and Slave CPLD IOs.
- Open Vivado HW-Manager and add VIO signal to dashboard.
- Set GPIO Bits 31-28 to "1010" to activate interface.
- Signal assignment of other bits depends on CPLD Firmware, see Trenz Electronic Wiki.
Attention: PCIe initialisation start with Power Button need Slave CPLD Firmware update to REV05. Without Update press Reset Button after power on with Power Button.
Component | Description |
---|---|
PS-MIOs | GPIO, QSPI, GEM3, USB0, SD1, I2C0, UART0, PCIe Gen2 1 Lane, Display Port, SATA 1 Lane |
Xilinx-IP | VIO |
TE-IP | TEBF0808 Base-Controller |
Application | Description |
---|---|
hello_world.elf | Xilinx Hello World example |
hello_te0808.elf | Hello TE0808 as endless loop with SDK/HSI.(SDK Template:sw_lib/sw_apps) |
zynqmp_fsbl.elf | Modified FSBL, generated with SDK/HSI. (SDK Template:sw_lib/sw_apps) |
bl31.elf | ATF generated with PetaLinux. |
u-boot | Uboot generated with PetaLinux.(image.ub in prebuilt-folder,ex.:/os/petalinux/default) |
Name | Folder | Description |
---|---|---|
SI5345 | misc/Si5345 | ClockBuilder Pro Project |
PetaLinux Project | <design_name>/os/petalinux | PetaLinux Project with USB, Ethernet, SATA, PCIe |
File | File-Extension | Description |
---|---|---|
BIF-File | *.bif | File with description to generate Bin-File |
BIN-File | *.bin | Flash Configuration File with Boot-Image (Zynq-FPGAs) |
BIT-File | *.bit | FPGA Configuration File |
DebugProbes-File | *.ltx | Definition File for Vivado/Vivado Labtools Debugging Interface |
Diverse Reports | --- | Report files in different formats |
Hardware-Platform-Specification-Files | *.hdf | Exported Vivado Hardware Specification for SDK/HSI |
LabTools Project-File | *.lpr | Vivado Labtools Project File |
OS-Image | *.ub | Image with Linux Kernel (On Petalinux optional with Devicetree and RAM-Disk) |
Software-Application-File | *.elf | Software Application for Zynq or MicroBlaze Processor Systems |
- Please read the Legal Notices before downloading Trenz Electronic documents and files.
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Reference Design - Source Code and Configuration Files (1 Files) te0808-Carrier_TEBF0808-vivado_2016.4-build_06_20170412162741.zip
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Other Files (0 Files)
TE0808 Simple Design
-Downloadable files are located below the description-
Component | Description |
---|---|
PS-MIOs | QSPI, UART0 |
Application | Description |
---|---|
hello_te0808.elf | Hello TE0808 as endless loop with SDK/HSI.(SDK Template:sw_lib/sw_apps) |
Name | Folder | Description |
---|
File | File-Extension | Description |
---|---|---|
BIF-File | *.bif | File with description to generate Bin-File |
BIN-File | *.bin | Flash Configuration File with Boot-Image (Zynq-FPGAs) |
BIT-File | *.bit | FPGA Configuration File |
Diverse Reports | --- | Report files in different formats |
Hardware-Platform-Specification-Files | *.hdf | Exported Vivado Hardware Specification for SDK/HSI |
LabTools Project-File | *.lpr | Vivado Labtools Project File |
Software-Application-File | *.elf | Software Application for Zynq or MicroBlaze Processor Systems |
- Please read the Legal Notices before downloading Trenz Electronic documents and files.
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Reference Design - Source Code and Configuration Files (1 Files) te0808-test_board-vivado_2016.4-build_06_20170412162843.zip
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Other Files (0 Files)
SK0808_SDSoC - TE0808 StarterKit SDSoC
TE0808 StarterKit SDSoC
-Downloadable files are located below the description-
Short Description:
- TE SDSoC User Guide coming soon on:SDSoC Projects
- TE SDSoC Reference Design description coming soon on:SK0808 SDSoC Design
Currently implemented SDSoC Examples:
- Array partition – Standalone/Linux
- Burst rw – Standalone/Linux
- Custom data type – Standalone/Linux
- Dependence inter – Standalone/Linux
- Dma sg – Standalone/Linux
- Dma simple – Standalone/Linux
- Full array 2d – Standalone/Linux
- Lmem 2rw – Standalone/Linux
- Loop fusion – Standalone/Linux
- Loop perfect – Standalone/Linux
- Loop reorder – Standalone/Linux
- Row array 2D – Standalone/Linux
- Shift register – Standalone/Linux
- Systolic array – Standalone/Linux
- Wide memory rw – Standalone/Linux
- Window array 2d – Standalone/Linux
- Direct connect – Standalone/Linux
- Data access random – Standalone/Linux
- Sys port – Standalone/Linux
- Hello vadd – Standalone/Linux
- File IO Video Processing – Linux
- File IO Dense Optical Flow – Linux
- File IO Stereo Block Matching – Linux
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Other Files (6 Files)
Size
SK0808_eg_1e_SDSoC_PFM_SDx_2017.1-build_05_20171009085547.zip
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SK0808_eg_1eb_SDSoC_PFM_SDx_2017.1-build_05_20171009085547.zip
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SK0808_eg_2i_SDSoC_PFM_SDx_2017.1-build_05_20171009085547.zip
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SK0808_es1_SDSoC_PFM_SDx_2017.1-build_05_20171009085547.zip
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SK0808_es2_SDSoC_PFM_SDx_2017.1-build_05_20171009085547.zip
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TE0808 HIO StarterKit SDSoC
-Downloadable files are located below the description-
Short Description:
- TE SDSoC User Guide coming soon on:SDSoC Projects
- TE SDSoC Reference Design description coming soon on:SK0808 SDSoC Design
Currently implemented SDSoC Examples:
- Array partition – Standalone/Linux
- Burst rw – Standalone/Linux
- Custom data type – Standalone/Linux
- Dependence inter – Standalone/Linux
- Dma sg – Standalone/Linux
- Dma simple – Standalone/Linux
- Full array 2d – Standalone/Linux
- Lmem 2rw – Standalone/Linux
- Loop fusion – Standalone/Linux
- Loop perfect – Standalone/Linux
- Loop reorder – Standalone/Linux
- Row array 2D – Standalone/Linux
- Shift register – Standalone/Linux
- Systolic array – Standalone/Linux
- Wide memory rw – Standalone/Linux
- Window array 2d – Standalone/Linux
- File IO Video Processing – Linux
- File IO Dense Optical Flow – Linux
- File IO Stereo Block Matching – Linux
- Motion detection dma – Linux, FMC HDMI I/O card
- Motion detection sgdma – Linux, FMC HDMI I/O card
- Motion detection sw – Linux, FMC HDMI I/O card
- Optical flow dma – Linux, FMC HDMI I/O card
- Optical flow sgdma – Linux, FMC HDMI I/O card
- Optical flow sw – Linux, FMC HDMI I/O card
- Sobel sw – Linux, FMC HDMI I/O card
- Sobel dma – Linux, FMC HDMI I/O card
- Sobel sgdma – Linux, FMC HDMI I/O card
Size
Other Files (6 Files)
Size
SKHio0808_eg_1e_SDSoC_PFM_SDx_2017.1-build_05_20171009090520.zip
Size
SKHio0808_eg_1eb_SDSoC_PFM_SDx_2017.1-build_05_20171009090520.zip
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SKHio0808_eg_2i_SDSoC_PFM_SDx_2017.1-build_05_20171009090520.zip
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SKHio0808_es1_SDSoC_PFM_SDx_2017.1-build_05_20171009090520.zip
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SKHio0808_es2_SDSoC_PFM_SDx_2017.1-build_05_20171009090520.zip
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TE0808 StarterKit Demo Design with Debian_8.4 64Bit Example
-Downloadable files are located below the description-
Currently implemented:
- PCIe
- USB (3.0/2.0)
- SATA
- Ethernet
- DisplayPort
- Design works only with include board part files, which names ends with *_tebf0808.
- Design works also on TE0808 with TEBF0808 standalone, but would be designed for StarterKit.
- PCIe is configured as root complex, PCIe card detection is driver dependent.
- Overwrite SD-Card with image from \prebuilt\debian folder. Use Win32 Disk Imager .
- Copy image.ub (prebuilt/os/petalinux/default) and Boot.bin (prebuilt/boot_images/<short dir>/u-boot) on SD-Card.
- Insert SD-Card in SD-Slot.
- Connect Monitor with DisplayPort.
- Connect Keyboard and Mouse to USB connector.
- Connect "XMOD-FPGA Access"-XMOD with green dot with PC.
- Power on TEBF0808 (1. Switch on power supply unit and 2. power button on enclosure).
- Windows: Open Serial Console (e.g. putty):COM Port(see device manager), Speed(115200).
- Linux: Open Serial Console (e.g. minicom):COM Port(dmesg |grep tty) UART is *USB1, Speed(115200).
- Debian GUI:
- After Linux login type "startx&" to start GUI
- LED PL Control (CPLD Firmware REV05 needed):
- Open Vivado HW-Manager and add VIO signal to dashboard.
- VIO value changed LED status.
- Use TEBF0808 Base-Controller RGPIO:
- There are two GPIO interfaces available, one to Master and one for Slave CPLD IOs.
- Open Vivado HW-Manager and add VIO signal to dashboard.
- Set GPIO Bits 31-28 to "1010" to activate interface.
- Signal assignment of other bits depends on CPLD Firmware, see Trenz Electronic Wiki.
Attention: PCIe Card initialisation start with Power Button need Slave CPLD Firmware update to REV05. Without Update press Reset Button after power on with Power Button.
Component | Description |
---|---|
PS-MIOs | GPIO, QSPI, GEM3, USB0, SD0, SD1, I2C0, UART0, PCIe Gen2 1 Lane, Display Port, SATA 1 Lane, DDR4(2400) |
Xilinx-IP | VIO |
TE-IP | TEBF0808 Base-Controller, axis_live_audio_1.0 |
Application | Description |
---|---|
hello_te0808.elf | Hello TE0808 as endless loop with SDK/HSI.(SDK Template:sw_lib/sw_apps) |
zynqmp_fsbl.elf | Modified FSBL, generated with SDK/HSI. (SDK Template:sw_lib/sw_apps) |
zynqmp_pmufw.elf | Default Xilinx PMU, generated with SDK/HSI. |
bl31.elf | ATF generated with PetaLinux. |
u-boot | Uboot generated with PetaLinux.(image.ub in prebuilt-folder,ex.:/os/petalinux/default) |
Name | Folder | Description |
---|---|---|
SI5345 | misc/Si5345 | ClockBuilder Pro Project |
PetaLinux Project | <design_name>/os/petalinux | PetaLinux Project with USB, Ethernet, SATA, PCIe, DisplayPort |
Debian SD-Image | <design_name>/prebuilt/os/debian/debian | Debian Image for SD-Card |
File | File-Extension | Description |
---|---|---|
BIF-File | *.bif | File with description to generate Bin-File |
BIN-File | *.bin | Flash Configuration File with Boot-Image (Zynq-FPGAs) |
BIT-File | *.bit | FPGA Configuration File |
DebugProbes-File | *.ltx | Definition File for Vivado/Vivado Labtools Debugging Interface |
Debian SD-Image | *.img | Debian Image for SD-Card |
Diverse Reports | --- | Report files in different formats |
Hardware-Platform-Specification-Files | *.hdf | Exported Vivado Hardware Specification for SDK/HSI |
LabTools Project-File | *.lpr | Vivado Labtools Project File |
OS-Image | *.ub | Image with Linux Kernel (On Petalinux optional with Devicetree and RAM-Disk) |
Software-Application-File | *.elf | Software Application for Zynq or MicroBlaze Processor Systems |
- Please read the Legal Notices before downloading Trenz Electronic documents and files.
Size
Reference Design - Source Code and Configuration Files (1 Files) te0808-SK_demo1-vivado_2017.1-build_04_20170824174614.zip
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Other Files (0 Files)
TE0808 Design for TE0808 StarterKit with TEBF0808 Carrier Board
-Downloadable files are located below the description-
Currently implemented:
- PCIe
- USB (3.0/2.0)
- SATA
- Ethernet
- DisplayPort
- Design works only with include board part files, which names ends with *_tebf0808.
- Design works also on TE0808 with TEBF0808 standalone, but would be designed for StarterKit.
- PCIe is configured as root complex, PCIe card detection is driver dependent.
- Copy image.ub (prebuilt/os/petalinux/default), init.sh (<design_name>/misc/sd_script/), and Boot.bin (prebuilt/boot_images/<short dir>/u-boot) on SD-Card.
- Insert SD-Card in SD-Slot.
- Connect "XMOD-FPGA Access"-XMOD with green dot with PC.
- Power on TEBF0808 (1. Switch on power supply unit and 2. power button on enclosure).
- Windows: Open Serial Console (e.g. putty):COM Port(see device manager), Speed(115200).
- Linux: Open Serial Console (e.g. minicom):COM Port(dmesg |grep tty) UART is *USB1, Speed(115200).
- Use AUDIO/VIDEO:
- Type on Console: aplay /media/<Filename>.wav or other aplay supported format.
- LED PL Control (CPLD Firmware REV05 needed):
- Open Vivado HW-Manager and add VIO signal to dashboard.
- VIO value changed LED status.
- Use TEBF0808 Base-Controller RGPIO:
- There are two GPIO interfaces available, one to Master and one for Slave CPLD IOs.
- Open Vivado HW-Manager and add VIO signal to dashboard.
- Set GPIO Bits 31-28 to "1010" to activate interface.
- Signal assignment of other bits depends on CPLD Firmware, see Trenz Electronic Wiki.
Attention: PCIe card initialisation start with Power Button need Slave CPLD Firmware update to REV05. Without Update press Reset Button after power on with Power Button.
Component | Description |
---|---|
PS-MIOs | GPIO, QSPI, GEM3, USB0, SD0, SD1, I2C0, UART0, PCIe Gen2 1 Lane, Display Port, SATA 1 Lane, DDR4 |
Xilinx-IP | VIO |
TE-IP | TEBF0808 Base-Controller, axis_live_audio_1.0 |
Application | Description |
---|---|
hello_te0808.elf | Hello TE0808 as endless loop with SDK/HSI.(SDK Template:sw_lib/sw_apps) |
zynqmp_fsbl.elf | Modified FSBL, generated with SDK/HSI. (SDK Template:sw_lib/sw_apps) |
zynqmp_pmufw.elf | Default Xilinx PMU, generated with SDK/HSI. |
bl31.elf | ATF generated with PetaLinux. |
u-boot | Uboot generated with PetaLinux.(image.ub in prebuilt-folder,ex.:/os/petalinux/default) |
Name | Folder | Description |
---|---|---|
SI5345 | misc/Si5345 | ClockBuilder Pro Project |
PetaLinux Project | <design_name>/os/petalinux | PetaLinux Project with USB, Ethernet, SATA, PCIe, DisplayPort |
Init Script | misc/init_script | Init Script for Audio |
File | File-Extension | Description |
---|---|---|
BIF-File | *.bif | File with description to generate Bin-File |
BIN-File | *.bin | Flash Configuration File with Boot-Image (Zynq-FPGAs) |
BIT-File | *.bit | FPGA Configuration File |
DebugProbes-File | *.ltx | Definition File for Vivado/Vivado Labtools Debugging Interface |
Diverse Reports | --- | Report files in different formats |
Hardware-Platform-Specification-Files | *.hdf | Exported Vivado Hardware Specification for SDK/HSI |
LabTools Project-File | *.lpr | Vivado Labtools Project File |
OS-Image | *.ub | Image with Linux Kernel (On Petalinux optional with Devicetree and RAM-Disk) |
Software-Application-File | *.elf | Software Application for Zynq or MicroBlaze Processor Systems |
- Please read the Legal Notices before downloading Trenz Electronic documents and files.
Size
Reference Design - Source Code and Configuration Files (1 Files) te0808-StarterKit-vivado_2017.1-build_04_20170824180157.zip
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Other Files (0 Files)
TE0808 Design with minimum PS Setup
-Downloadable files are located below the description-
Release Notes and Known Issues:
- Design works only with include board part files, which names ends not with *_tebf0808.
- For custom boards, please check UART. Design used UART0 on MIO42/43,
- SD is not activated!
- Configure Flash with (prebuilt/boot_images/<short dir>/u-boot) or use HDF for SDK. Both need JTAG MODE, to start from flash change to QSPI Mode.
Attention: PCIe card initialisation start with Power Button need Slave CPLD Firmware update to REV05. Without Update press Reset Button after power on with Power Button.
Component | Description |
---|---|
PS-MIOs | QSPI, UART0, DDR4 |
Application | Description |
---|---|
hello_te0808.elf | Hello TE0808 as endless loop with SDK/HSI.(SDK Template:sw_lib/sw_apps) |
zynqmp_fsbl.elf | Xilinx default FSBL |
Name | Folder | Description |
---|
File | File-Extension | Description |
---|---|---|
BIF-File | *.bif | File with description to generate Bin-File |
BIN-File | *.bin | Flash Configuration File with Boot-Image (Zynq-FPGAs) |
BIT-File | *.bit | FPGA Configuration File |
Diverse Reports | --- | Report files in different formats |
Hardware-Platform-Specification-Files | *.hdf | Exported Vivado Hardware Specification for SDK/HSI |
Software-Application-File | *.elf | Software Application for Zynq or MicroBlaze Processor Systems |
- Please read the Legal Notices before downloading Trenz Electronic documents and files.
Size
Reference Design - Source Code and Configuration Files (1 Files) te0808-test_board-vivado_2017.1-build_04_20170824174201.zip
Size
Other Files (0 Files)
StarterKit - TE0808 StarterKit Linux Design
TE0808 StarterKit Linux Design
-Downloadable files are located below the description-
- Please read the Legal Notices before downloading Trenz Electronics documents and files.
Size
Reference Design - Source Code and Configuration Files (1 Files) TE0808-StarterKit-vivado_2017.2-build_07_20171219151728.zip
Size
Reference Design - Documentation (1 Files) TE0808-StarterKit-vivado_2017.2-build_07-v2.pdf
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Other Files (0 Files)
TE0808 Simple Board Design
-Downloadable files are located below the description-
- Please read the Legal Notices before downloading Trenz Electronics documents and files.
Size
Reference Design - Source Code and Configuration Files (1 Files) TE0808-test_board-vivado_2017.2-build_07_20171220192501.zip
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Reference Design - Documentation (1 Files) TE0808-test_board-vivado_2017.2-build_07-v14.pdf
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Other Files (0 Files)
SK0808_SDSoC - TE0808 StarterKit SDSoC
TE0808 StarterKit SDSoC
-Downloadable files are located below the description-
Short Description:
- TE SDSoC User Guide coming soon on:SDSoC Projects
- TE SDSoC Reference Design description coming soon on:SK0803 SDSoC Design
Currently implemented SDSoC Examples:
- Array partition – Standalone/Linux
- Burst rw – Standalone/Linux
- Custom data type – Standalone/Linux
- Dependence inter – Standalone/Linux
- Dma sg – Standalone/Linux
- Dma simple – Standalone/Linux
- Full array 2d – Standalone/Linux
- Lmem 2rw – Standalone/Linux
- Loop fusion – Standalone/Linux
- Loop perfect – Standalone/Linux
- Loop reorder – Standalone/Linux
- Row array 2D – Standalone/Linux
- Shift register – Standalone/Linux
- Systolic array – Standalone/Linux
- Wide memory rw – Standalone/Linux
- Window array 2d – Standalone/Linux
- Direct connect – Standalone/Linux
- Data access random – Standalone/Linux
- Sys port – Standalone/Linux
- Hello vadd – Standalone/Linux
- File IO Video Processing – Linux
- File IO Dense Optical Flow – Linux
- File IO Stereo Block Matching – Linux
Size
SDSoC_PFM_TE0808-04-06EG-1EE_20180606223327.zip
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SDSoC_PFM_TE0808-04-09EG-1EA_20180606180946.zip
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SDSoC_PFM_TE0808-04-09EG-1EB_20180606183820.zip
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SDSoC_PFM_TE0808-04-09EG-1ED_20180606190645.zip
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SDSoC_PFM_TE0808-04-09EG-1EE_20180606203538.zip
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SDSoC_PFM_TE0808-04-09EG-1EL_20180606210431.zip
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SDSoC_PFM_TE0808-04-09EG-2IB_20180606193547.zip
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SDSoC_PFM_TE0808-04-09EG-2IE_20180606213333.zip
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SDSoC_PFM_TE0808-04-15EG-1EB_20180606200701.zip
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SDSoC_PFM_TE0808-04-15EG-1EE_20180606220406.zip
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SDSoC_PFM_TE0808-2ES2_20180606174028.zip
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SDSoC_PFM_TE0808-ES1_20180606163234.zip
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SDSoC_PFM_TE0808-ES2_20180606170518.zip
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SDSoC Reference Design to create SDSoC Platform (1 Files) TE0808-SK0808_zusys_SDSoC-vivado_2017.4-build_11_20180717135431.zip
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Other Files (0 Files)
TE0808 StarterKit Linux Design
-Downloadable files are located below the description-
- Please read the Legal Notices before downloading Trenz Electronics documents and files.
Size
Reference Design - Source Code and Configuration Files (1 Files) TE0808-StarterKit-vivado_2017.4-build_10_20180524091208.zip
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Reference Design - Documentation (1 Files) TE0808-StarterKit-vivado_2017.4-build_10-v21.pdf
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Other Files (0 Files)
TE0808 Simple Board Design
-Downloadable files are located below the description-
- Please read the Legal Notices before downloading Trenz Electronics documents and files.
Size
Reference Design - Source Code and Configuration Files (1 Files) TE0808-test_board-vivado_2017.4-build_07_20180329151341.zip
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Reference Design - Documentation (1 Files) TE0808-test_board-vivado_2017.4-build_07-v20.pdf
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Other Files (0 Files)
SK0808_SDSoC - TE0808 SDSoC Example
TE0808 SDSoC
-Downloadable files are located below the description-
- Please read the Legal Notices before downloading Trenz Electronics documents and files.
Size
SDSoC_PFM_TE0808-04-06EG-1EE_20181101150732.zip
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SDSoC_PFM_TE0808-04-09EG-1EA_20181101110137.zip
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SDSoC_PFM_TE0808-04-09EG-1EB_20181101112824.zip
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SDSoC_PFM_TE0808-04-09EG-1ED_20181101115436.zip
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SDSoC_PFM_TE0808-04-09EG-1EE_20181101131627.zip
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SDSoC_PFM_TE0808-04-09EG-1EL_20181101134429.zip
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SDSoC_PFM_TE0808-04-09EG-2IB_20181101122053.zip
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SDSoC_PFM_TE0808-04-09EG-2IE_20181101141219.zip
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SDSoC_PFM_TE0808-04-15EG-1EB_20181101124906.zip
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SDSoC_PFM_TE0808-04-15EG-1EE_20181101144055.zip
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SDSoC_PFM_TE0808-2ES2_20181101103324.zip
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SDSoC_PFM_TE0808-ES2_20181101100330.zip
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SDSoC Reference Design to create SDSoC Platform (1 Files) TE0808-SK0808_zusys_SDSoC-vivado_2018.2-build_03_20181106095111.zip
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Other Files (0 Files)
TE0808 StarterKit Linux Design
-Downloadable files are located below the description-
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Size
Reference Design - Source Code and Configuration Files (1 Files) TE0808-StarterKit-vivado_2018.2-build_02_20180711091049.zip
Size
Reference Design - Documentation (1 Files) TE0808-StarterKit-vivado_2018.2-build_02-v27.pdf
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Other Files (0 Files)
TE0808 Simple Board Design
-Downloadable files are located below the description-
- Please read the Legal Notices before downloading Trenz Electronics documents and files.
Size
Reference Design - Source Code and Configuration Files (1 Files) TE0808-test_board-vivado_2018.2-build_02_20180711143702.zip
Size
Reference Design - Documentation (1 Files) TE0808-test_board-vivado_2018.2-build_02-v21.pdf
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Other Files (0 Files)
StarterKit - TE0808 StarterKit Linux Design
TE0808 StarterKit Linux Design
-Downloadable files are located below the description-
- Please read the Legal Notices before downloading Trenz Electronics documents and files.
Size
Reference Design - Source Code and Configuration Files (1 Files) TE0808-StarterKit-vivado_2018.3-build_07_20190809131620.zip
Size
Reference Design - Documentation (1 Files) TE0808-StarterKit-vivado_2018.3-build_07-v32.pdf
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Other Files (0 Files)
TE0808 Simple Board Design
-Downloadable files are located below the description-
- Please read the Legal Notices before downloading Trenz Electronics documents and files.
Size
Reference Design - Source Code and Configuration Files (1 Files) TE0808-test_board-vivado_2018.3-build_07_20190809131522.zip
Size
Reference Design - Documentation (1 Files) TE0808-test_board-vivado_2018.3-build_07_-v24.pdf
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Other Files (0 Files)
IBERT - TE0808 IBERT Design
TE0808 IBERT Design
-Downloadable files are located below the description-
- Please read the Legal Notices before downloading Trenz Electronics documents and files.
Size
Reference Design - Source Code and Configuration Files (1 Files) TE0808-IBERT-vivado_2019.2-build_15_20200929070820.zip
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Reference Design - Documentation (0 Files) Other Files (0 Files)
TE0808 StarterKit Debian and Ubuntu Example
-Downloadable files are located below the description-
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Size
Reference Design - Source Code and Configuration Files (1 Files) TE0808-SK_DEMO1-vivado_2019.2-build_11_20200511131516.zip
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Reference Design - Documentation (0 Files) Other Files (2 Files)
Size
te0808-ubuntu.zip
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TE0808 StarterKit Linux Design
-Downloadable files are located below the description-
- Please read the Legal Notices before downloading Trenz Electronics documents and files.
Size
Reference Design - Source Code and Configuration Files (1 Files) TE0808-StarterKit-vivado_2019.2-build_15_20200928195304.zip
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Reference Design - Documentation (1 Files) TE0808-StarterKit-vivado_2019.2-build_15-v.41-02_04_2021.pdf
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Other Files (0 Files)
TE0808 Simple Board Design
-Downloadable files are located below the description-
- Please read the Legal Notices before downloading Trenz Electronics documents and files.
Size
Reference Design - Source Code and Configuration Files (1 Files) TE0808-test_board-vivado_2019.2-build_15_20200929070725.zip
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Reference Design - Documentation (1 Files) TE0808-test_board-vivado_2019.2-build_15-v.31-02_04_2021.pdf
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Other Files (0 Files)
StarterKit - TE0808 StarterKit Linux Design
TE0808 StarterKit Linux Design
-Downloadable files are located below the description-
- Please read the Legal Notices before downloading Trenz Electronics documents and files.
Size
Reference Design - Source Code and Configuration Files (1 Files) TE0808-StarterKit-vivado_2020.2-build_5_20210512133800.zip
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Reference Design - Documentation (1 Files) TE0808-StarterKit-vivado_2020.2-build_5-v.47-02_17_2022.pdf
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Other Files (0 Files)
TE0808 Simple Board Design
-Downloadable files are located below the description-
- Please read the Legal Notices before downloading Trenz Electronics documents and files.
Size
Reference Design - Source Code and Configuration Files (1 Files) TE0808-test_board-vivado_2020.2-build_5_20210512133121.zip
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Reference Design - Documentation (1 Files) TE0808-test_board-vivado_2020.2-build_5-v.35-02_17_2022.pdf
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Other Files (0 Files)
StarterKit - TE0808 StarterKit Linux Design
TE0808 StarterKit Linux Design
-Downloadable files are located below the description-
- Please read the Legal Notices before downloading Trenz Electronics documents and files.
Size
TE0808-StarterKit_noprebuilt-vivado_2021.2_withoutvivadopatch-build_11_20220316082848.zip
Size
Reference Design - Source Code and Configuration Files (2 Files) TE0808-StarterKit-vivado_2021.2-build_11_withoutvivadopatch_20220316082848.zip
Size
TE0808-StarterKit-vivado_2021.2-build_20_20230413092755.zip
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Reference Design - Documentation (0 Files) Other Files (1 Files) test_board - TE0808 Simple Board Design
TE0808 Simple Board Design
-Downloadable files are located below the description-
- Please read the Legal Notices before downloading Trenz Electronics documents and files.
Size
TE0808-test_board_noprebuilt-vivado_2021.2_withoutvivadopatch-build_11_20220321063547.zip
Size
Reference Design - Source Code and Configuration Files (2 Files) TE0808-test_board-vivado_2021.2-build_20_20230413090245.zip
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TE0808-test_board-vivado_2021.2_withoutvivadopatch-build_11_20220321063547.zip
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Reference Design - Documentation (0 Files) Other Files (1 Files) 2022.2
StarterKit - TE0808 StarterKit Linux Design
TE0808 StarterKit Linux Design
-Downloadable files are located below the description-
- Please read the Legal Notices before downloading Trenz Electronics documents and files.
Size
Reference Design - Source Code and Configuration Files (1 Files) TE0808-StarterKit-vivado_2022.2-build_1_20230601094128.zip
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Reference Design - Documentation (1 Files) TE0808-StarterKit-vivado_2022.2-build_1_TE0808 StarterKit-v.58-03_13_2024.pdf
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Other Files (0 Files)
TE0808 Simple Board Design
-Downloadable files are located below the description-
- Please read the Legal Notices before downloading Trenz Electronics documents and files.
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Reference Design - Source Code and Configuration Files (1 Files) TE0808-test_board-vivado_2022.2-build_1_20230601101432.zip
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Reference Design - Documentation (1 Files) TE0808-test_board-vivado_2022.2-build_1_v.45-03_14_2024.pdf
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Other Files (0 Files)
StarterKit - TE0808 StarterKit Linux Design
TE0808 StarterKit Linux Design
-Downloadable files are located below the description-
- Please read the Legal Notices before downloading Trenz Electronics documents and files.
Size
Reference Design - Source Code and Configuration Files (1 Files) TE0808-StarterKit-vivado_2023.2-build_4_20240528104904.zip
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Reference Design - Documentation (0 Files) Other Files (0 Files)
TE0808 Simple Board Design
-Downloadable files are located below the description-
- Please read the Legal Notices before downloading Trenz Electronics documents and files.
Size
Reference Design - Source Code and Configuration Files (1 Files) TE0808-test_board-vivado_2023.2-build_4_20240528102532.zip
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Reference Design - Documentation (0 Files) Other Files (0 Files)
- If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
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-
If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
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Other Files (0 Files)
- If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
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-
If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
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Schematics (32 Files) SCH-TE0813-01-2AE11-A.PDF
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SCH-TE0813-01-2BE11-A.PDF
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SCH-TE0813-01-2BE71-A.PDF
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SCH-TE0813-01-2FE71-A.PDF
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SCH-TE0813-01-3BE71-A.PDF
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SCH-TE0813-01-3BI21-A.PDF
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SCH-TE0813-01-3RI21-A.PDF
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SCH-TE0813-01-4AE11-A.PDF
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SCH-TE0813-01-4AE71-A.PDF
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SCH-TE0813-01-4AE71-KS.PDF
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SCH-TE0813-01-4DE11-AZ.PDF
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SCH-TE0813-01-4DE21-A.PDF
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SCH-TE0813-01-5DI24-A.PDF
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SCH-TE0813-01-5DI81-A.PDF
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Assembly Diagrams (32 Files) AD-TE0813-01-2AE11-A.PDF
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AD-TE0813-01-2BE11-A.PDF
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AD-TE0813-01-2BE71-A.PDF
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AD-TE0813-01-2FE71-A.PDF
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AD-TE0813-01-3BE21-A.PDF
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AD-TE0813-01-3BI21-A.PDF
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AD-TE0813-01-3RI21-A.PDF
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AD-TE0813-01-4AE11-A.PDF
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AD-TE0813-01-4AE71-A.PDF
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AD-TE0813-01-4AE71-KS.PDF
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AD-TE0813-01-4BE11-A.PDF
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AD-TE0813-01-4BE71-A.PDF
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AD-TE0813-01-4BI21-A.PDF
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AD-TE0813-01-4DE11-A.PDF
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AD-TE0813-01-4DE11-AZ.PDF
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AD-TE0813-01-4DE21-A.PDF
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AD-TE0813-01-4DE71-A.PDF
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AD-TE0813-01-4DI21-A.PDF
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AD-TE0813-01-4DI71-A.PDF
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AD-TE0813-01-4GE11-A.PDF
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AD-TE0813-01-4GE71-A.PDF
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AD-TE0813-01-4GI21-A.PDF
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AD-TE0813-01-5DE11-A.PDF
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AD-TE0813-01-5DE71-A.PDF
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AD-TE0813-01-5DI21-A.PDF
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AD-TE0813-01-5DI24-A.PDF
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AD-TE0813-01-5DI81-A.PDF
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3D PDF (0 Files) Other Files (1 Files) HW_Design - PCB Design relevant files, like PCB-STEP-Model, Cooler-STEP-Model, Trace-length and ...
- Please read the Legal Notices before downloading Trenz Electronics documents and files.
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If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
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Trace Lengths (0 Files) Other Files (0 Files)
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If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
Size
TE0813-01-2AE11-A bottom.jpg
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TE0813-01-2AE11-A top.jpg
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TE0813-01-4BE11-A angle.jpg
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TE0813-01-4BE11-A bottom.jpg
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TE0813-01-4BE11-A top.jpg
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REV02 - PCB Revision: Schematics, AD, STEP, HW Design Files and more ...
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Schematics (10 Files) SCH-TE0813-02-2AE81-A.PDF
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Assembly Diagrams (10 Files) AD-TE0813-02-2AE81-A.PDF
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AD-TE0813-02-2BE81-A.PDF
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AD-TE0813-02-3AE81-A.PDF
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StarterKit - TE0813 StarterKit Linux Design
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Reference Design - Source Code and Configuration Files (1 Files) TE0813-StarterKit-vivado_2020.2-build_9_20211116073742.zip
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Schematics (8 Files) SCH-TE0817-01-4AI21-A.PDF
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AD-TE0817-01-4BE21-A.PDF
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Reference_Design - FPGA Design Examples for different Vivado Versions
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StarterKit - TE0817 StarterKit Linux Design
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Reference Design - Source Code and Configuration Files (2 Files) TE0817-StarterKit-vivado_2021.2-build_15_20220912093833.zip
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TE0817-StarterKit-vivado_2021.2_withoutvivadopatch-build_14_20220627122156.zip
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PCN-20240615 TE0818-02 DCDC (U19_U37) Stability and power consumption improvement.pdf
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SCH-TE0818-01-6BE76-A.PDF
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SCH-TE0818-01-9BI46-X.PDF
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SCH-TE0818-01-BBE21-A.PDF
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SCH-TE0818-01-BBE76-A.PDF
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SCH-TE0818-01-No Variations.PDF
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Assembly Diagrams (10 Files) AD-TE0818-01-6BE21-A.PDF
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AD-TE0818-01-6BE76-A.PDF
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AD-TE0818-01-9BE21-A.PDF
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AD-TE0818-01-9BE71-A.PDF
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AD-TE0818-01-9BE76-A.PDF
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AD-TE0818-01-9BI46-X.PDF
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AD-TE0818-01-9GI21-A.PDF
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AD-TE0818-01-9GI76-A.PDF
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AD-TE0818-01-BBE21-A.PDF
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AD-TE0818-01-BBE76-A.PDF
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3D PDF (3 Files) 3DB-TE0818-01-No Variations.PDF
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3DT-TE0818-01-No Variations.PDF
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PDF3D-TE0818-01-No Variations.PDF
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TE0818-01-9BE21-A bottom.jpg
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TE0818-01-9GI21-A angle.jpg
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TE0818-01-9GI21-A bottom.jpg
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REV02 - PCB Revision: Schematics, AD, STEP, HW Design Files and more ...
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Schematics (6 Files) SCH-TE0818-02-6BE81-A.PDF
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SCH-TE0818-02-9BE81-A.PDF
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SCH-TE0818-02-9GI81-A.PDF
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SCH-TE0818-02-BBE81-A.PDF
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SCH-TE0818-02-BBI81-A.PDF
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SCH-TE0818-02-BGI81-A.PDF
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Assembly Diagrams (6 Files) AD-TE0818-02-6BE81-A.PDF
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AD-TE0818-02-9BE81-A.PDF
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AD-TE0818-02-9GI81-A.PDF
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AD-TE0818-02-BBE81-A.PDF
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AD-TE0818-02-BBI81-A.PDF
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AD-TE0818-02-BGI81-A.PDF
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3D PDF (2 Files) 3DB-TE0818-02.PDF
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3DT-TE0818-02.PDF
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StarterKit - TE0818 StarterKit Linux Design
TE0818 StarterKit Linux Design
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TE0818-StarterKit_noprebuilt-vivado_2021.2_withoutvivadopatch-build_14_20220512120454.zip
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Reference Design - Source Code and Configuration Files (2 Files) TE0818-StarterKit-vivado_2021.2-build_20_20230214112518.zip
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TE0818-StarterKit-vivado_2021.2_withoutvivadopatch-build_14_20220512120454.zip
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Reference Design - Documentation (0 Files) Other Files (1 Files) test_board - TE0818 Simple Board Design
TE0818 Simple Board Design
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TE0818-test_board_noprebuilt-vivado_2021.2_withoutvivadopatch-build_14_20220512120419.zip
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Reference Design - Source Code and Configuration Files (2 Files) TE0818-test_board-vivado_2021.2-build_20_20230214132934.zip
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TE0818-test_board-vivado_2021.2_withoutvivadopatch-build_14_20220512120419.zip
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StarterKit - TE0818 StarterKit Linux Design
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Reference Design - Source Code and Configuration Files (1 Files) TE0818-StarterKit-vivado_2022.2-build_6_20230815120540.zip
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Reference Design - Source Code and Configuration Files (1 Files) TE0818-StarterKit-vivado_2023.2-build_4_20240308103809.zip
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TE0818 Simple Board Design
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SCH-TEB0835-01.PDF
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Assembly Diagrams (2 Files) AD-TEB0835-01-P.PDF
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AD-TEB0835-01.PDF
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Assembly Diagrams (1 Files) AD-TEB0835-02-A.PDF
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3D PDF (2 Files) 3DB-TEB0835-02-No Variations.PDF
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3DT-TEB0835-02-No Variations.PDF
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TE0835 - Xilinx RFSoC FPGA modules
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PCN-20231204 TE0835-02 CPLD Change.pdf
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REV02 - PCB Revision: Schematics, AD, STEP, HW Design Files and more ...
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Schematics (7 Files) SCH-TE0835-02-MXE21-A.PDF
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SCH-TE0835-02-NYE21-A.PDF
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SCH-TE0835-02-TXE21-A.PDF
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SCH-TE0835-02-TXI21-A.PDF
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SCH-TE0835-02-TYE21-A.PDF
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SCH-TE0835-02-UXE21-A.PDF
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SCH-TE0835-02-YXE21-A.PDF
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Assembly Diagrams (7 Files) AD-TE0835-02-MXE21-A.PDF
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AD-TE0835-02-NYE21-A.PDF
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AD-TE0835-02-TXE21-A.PDF
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AD-TE0835-02-TXI21-A.PDF
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AD-TE0835-02-TYE21-A.PDF
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AD-TE0835-02-UXE21-A.PDF
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AD-TE0835-02-YXE21-A.PDF
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3D PDF (2 Files) 3DB-TE0835-02-No Variations.PDF
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3DT-TE0835-02-No Variations.PDF
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DIM-TE0835-02-TXE21-A.PDF
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TE0835-02-MXE21-A bottom.jpg
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TE0835-02-MXE21-A top.jpg
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TE0835-02-TXE21-A angle.jpg
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TE0835-02-TXE21-A bottom.jpg
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TE0835-02-TXE21-A top.jpg
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REV03 - PCB Revision: Schematics, AD, STEP, HW Design Files and more ...
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SCH-TE0835-03-TXE81-A.PDF
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SCH-TE0835-03-TXI81-A.PDF
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SCH-TE0835-03-TYE81-A.PDF
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SCH-TE0835-03-UXE81-A.PDF
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Assembly Diagrams (5 Files) AD-TE0835-03-MXE81-A.PDF
Size
AD-TE0835-03-TXE81-A.PDF
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AD-TE0835-03-TXI81-A.PDF
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AD-TE0835-03-TYE81-A.PDF
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AD-TE0835-03-UXE81-A.PDF
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3D PDF (2 Files) 3DB-TE0835-03.PDF
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3DT-TE0835-03.PDF
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Other Files (1 Files) Firmware - Initial Configuration for diverse PCB components, like CPLD, PLL and ...
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test_board - TE0835 RF Analyser Board Design
TE0835 RF Analyser Board Design
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Reference Design - Source Code and Configuration Files (1 Files) TE0835-test_board-vivado_2019.2-build_15_20201027100128.zip
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test_board - TE0835 RF Analyser Board Design
TE0835 RF Analyser Board Design
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Reference Design - Source Code and Configuration Files (1 Files) TE0835-test_board-vivado_2020.2-build_9_20220223123124.zip
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Reference Design - Documentation (1 Files) TE0835-test_board-vivado_2020.2-build_9_v.33-09_19_2023.pdf
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test_board - TE0835 RF Analyser Board Design
TE0835 RF Analyser Board Design
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Reference Design - Source Code and Configuration Files (1 Files) TE0835-test_board-vivado_2022.2-build_9_20231109094654.zip
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Assembly Diagrams (1 Files) AD-TEB0728-01.PDF
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3D PDF (2 Files) 3DB-TEB0728-01.PDF
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3DT-TEB0728-01.PDF
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Trace Lengths (0 Files) Altium Project and Libraries (1 Files) AP-TEB0728-01.zip
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TEB0728_angle2.jpg
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TEB0728_top.jpg
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REV02 - PCB Revision: Schematics, AD, STEP, HW Design Files and more ...
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Size
Schematics (1 Files) SCH-TEB0728-02.PDF
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Assembly Diagrams (1 Files) AD-TEB0728-02.PDF
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3D PDF (3 Files) 3DB-TEB0728-02.PDF
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3DT-TEB0728-02.PDF
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PDF3D-TEB0728-02.PDF
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Trace Lengths (0 Files) Altium Project and Libraries (1 Files) AP-TEB0728-02.zip
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TEB0728-02_bottom.jpg
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TEB0728-02_top.jpg
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TE0728 - Xilinx Zynq FPGA modules
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PCN-20240730 TE0728-04 RTC Change.pdf
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Schematics (1 Files) SCH-TE0728-03-1Q.PDF
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Assembly Diagrams (1 Files) AD-TE0728-03-1Q.PDF
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3D PDF (0 Files) Other Files (0 Files)
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TE0728 top.jpg
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TE0728-angle.jpg
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REV04 - PCB Revision: Schematics, AD, STEP, HW Design Files and more ...
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Schematics (1 Files) SCH-TE0728-04-1Q.PDF
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Assembly Diagrams (1 Files) AD-TE0728-04-1Q.PDF
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3D PDF (2 Files) 3DB-TE0728-04-1Q.PDF
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3DT-TE0728-04-1Q.PDF
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Other Files (0 Files)
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TE0728-04 bottom.jpg
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TE0728-04 top.jpg
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TE0728-04-1Q angle.jpg
Size
TE0728-04-1Q bottom.jpg
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TE0728-04-1Q top.jpg
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Reference_Design - FPGA Design Examples for different Vivado Versions
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test_board - Zynq Basic-System
Short Description:
Excerpt of special Block-Design components/interfaces:
Component | Description |
---|---|
Zynq Processor | activated MIO-Interfaces: DDR3, QSPI, GPIO,1x Uart,1x SPI,1x I2C |
Additional Software Application for SDK/HSI and Linux:
Application | Description |
---|---|
zynq_fsbl | Zynq First Stage Bootloader |
hello_world | Xilinx Hello World Example |
Additional content in the larger ZIP with prebuilt-folders:
File | File-Extension | Description |
---|---|---|
Bin-File | *.bin | Flash Configuration File with Boot-Image (Zynq-FPGAs) |
Bit-File | *.bit | FPGA Configuration File |
Software-Application-File | *.elf | Software Application for Zynq or MicroBlaze Processor Systems |
Hardware-Platform-Specification-Files | *.hdf | Hardware Specification from the vivado project. Used in SDK/HSI |
BIF-File | *.bif | File with description to generate Bin-File |
Diverse Reports | -- | Report files in different formats |
Size
TE0728-test_board_noprebuilt-vivado_2015.4-build_32_20160504103319.zip
Size
2016.2
test_board - TE0728 Zynq PS
TE0728 Zynq PS
-Downloadable files are located below the description-
Component | Description |
---|---|
PS-MIOs | activated: SPI1, I2C0, UART1, QSPI, DDR3 |
Application | Description |
---|---|
hello_world | Xilinx Hello World Example |
Name | Folder | Description |
---|
File | File-Extension | Description |
---|---|---|
BIF-File | *.bif | File with description to generate Bin-File |
BIN-File | *.bin | Flash Configuration File with Boot-Image (Zynq-FPGAs) |
BIT-File | *.bit | FPGA Configuration File |
Diverse Reports | --- | Report files in different formats |
Hardware-Platform-Specification-Files | *.hdf | Exported Vivado Hardware Specification for SDK/HSI |
LabTools Project-File | *.lpr | Vivado Labtools Project File |
Software-Application-File | *.elf | Software Application for Zynq or MicroBlaze Processor Systems |
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Size
te0728-test_board_noprebuilt-vivado_2016.2-build_07_20161017162313.zip
Size
2017.2
test_board - TE0728 Basic Linux Example
TE0728 Basic Linux Example
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Size
Reference Design - Source Code and Configuration Files (1 Files) TE0728-test_board-vivado_2017.2-build_03_20171006103634.zip
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Reference Design - Documentation (0 Files) Other Files (0 Files)
test_board - TE0728 Basic Linux Example
TE0728 Basic Linux Example
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Reference Design - Source Code and Configuration Files (1 Files) TE0728-test_board-vivado_2018.2-build_03_20181212131950.zip
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Reference Design - Documentation (0 Files) Other Files (0 Files)
test_board - TE0728 Basic Linux Example
TE0728 Basic Linux Example
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Reference Design - Source Code and Configuration Files (1 Files) TE0728-test_board-vivado_2020.2-build_8_20211103093707.zip
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Reference Design - Documentation (0 Files) Other Files (0 Files)
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Assembly Diagrams (1 Files) AD-TEIB0006-01.PDF
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3D PDF (0 Files) Other Files (0 Files)
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Size
TEIB0006-01_bottom.jpg
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REV02 - PCB Revision: Schematics, AD, STEP, HW Design Files and more ...
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Assembly Diagrams (1 Files) AD-TEIB0006-02.PDF
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3D PDF (0 Files) Other Files (0 Files)
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Trace Lengths (0 Files) Electronic Design Interchange Format(EDIF) (0 Files) Other Files (1 Files) Pictures - PCB pictures
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TEIB0006-02_bottom.jpg
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TEIB0006-02_top.jpg
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TEI0006 - Intel Cyclone 10
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Arrow_USB_Programmer - ARROW USB Programmer Driver
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PCN-20230119 TEI0006-03 to TEI0006-04 Hardware Revision Change.pdf
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Schematics (1 Files) SCH-TEI0006-01-220-5I.PDF
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Assembly Diagrams (1 Files) AD-TEI0006-01-220-5I.PDF
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3D PDF (0 Files) Other Files (0 Files)
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TEI0006-01-220-5I_bottom.jpg
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TEI0006-01-220-5I_top.jpg
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REV02 - PCB Revision: Schematics, AD, STEP, HW Design Files and more ...
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Schematics (3 Files) SCH-TEI0006-02-105-6E.PDF
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SCH-TEI0006-02-150-6E.PDF
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SCH-TEI0006-02-220-5I.PDF
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Assembly Diagrams (3 Files) AD-TEI0006-02-105-6E.PDF
Size
AD-TEI0006-02-150-6E.PDF
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AD-TEI0006-02-220-5I.PDF
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3D PDF (0 Files) Other Files (0 Files)
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Source Code of CPLD Firmware (0 Files) Other Files (0 Files)
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Size
TEI0006-02-220-5I_bottom.jpg
Size
TEI0006-02-220-5I_top.jpg
Size
REV03 - PCB Revision: Schematics, AD, STEP, HW Design Files and more ...
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Size
Schematics (8 Files) SCH-TEI0006-03-105-6E.PDF
Size
SCH-TEI0006-03-150-6E.PDF
Size
SCH-TEI0006-03-220-5E.PDF
Size
SCH-TEI0006-03-220-5I.PDF
Size
SCH-TEI0006-03-ALC13-R.PDF
Size
SCH-TEI0006-03-ALC13A.PDF
Size
SCH-TEI0006-03-ANC13-R.PDF
Size
SCH-TEI0006-03-APC13-R.PDF
Size
Assembly Diagrams (8 Files) AD-TEI0006-03-105-6E.PDF
Size
AD-TEI0006-03-150-6E.PDF
Size
AD-TEI0006-03-220-5E.PDF
Size
AD-TEI0006-03-220-5I.PDF
Size
AD-TEI0006-03-ALC13-R.PDF
Size
AD-TEI0006-03-ALC13A.PDF
Size
AD-TEI0006-03-ANC13-R.PDF
Size
AD-TEI0006-03-APC13-R.PDF
Size
3D PDF (2 Files) 3DB-TEI0006-03-No Variations.PDF
Size
3DT-TEI0006-03-No Variations.PDF
Size
Other Files (1 Files) Firmware - Initial Configuration for diverse PCB components, like CPLD, PLL and ...
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Source Code of CPLD Firmware (0 Files) Other Files (0 Files)
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Size
TEI0006-03-220-5I bottom.jpg
Size
TEI0006-03-220-5I top.jpg
Size
REV04 - PCB Revision: Schematics, AD, STEP, HW Design Files and more ...
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Size
SCH-TEI0006-04-ALE13A.PDF
Size
SCH-TEI0006-04-ANE13A.PDF
Size
SCH-TEI0006-04-APE23A.PDF
Size
SCH-TEI0006-04-API23A.PDF
Size
Assembly Diagrams (6 Files) AD-TEI0006-04-ALC13A.PDF
Size
AD-TEI0006-04-ALE13A.PDF
Size
AD-TEI0006-04-ANE13A.PDF
Size
AD-TEI0006-04-APE13A.PDF
Size
AD-TEI0006-04-APE23A.PDF
Size
AD-TEI0006-04-API23A.PDF
Size
3D PDF (0 Files) Other Files (1 Files) Firmware - Initial Configuration for diverse PCB components, like CPLD, PLL and ...
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Source Code of CPLD Firmware (0 Files) Other Files (0 Files)
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3DT-TEI0006-04-No Variations.PDF
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Reference_Design - FPGA Design Examples for Intel Quartus Prime Suite
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test_board - TEI0006 Basic Example
TEI0006 Basic Example
-Downloadable files are located below the description-
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Project Files (2 Files) TEI0006-test_board-quartus_19.4.0-20201019101840.zip
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TEI0006-test_board_noprebuilt-quartus_19.4.0-20201019101920.zip
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test_board - TEI0006 Basic Example
TEI0006 Basic Example
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Project Files (2 Files) TEI0006-test_board-quartus_20.4.0-20230411171231.zip
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TEI0006-test_board_noprebuilt-quartus_20.4.0-20230411171022.zip
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test_board - TEI0006 Basic Example
TEI0006 Basic Example
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TEI0006-test_board_noprebuilt-quartus_22.4.0-20240109135551.zip
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Assembly Diagrams (1 Files) AD-TEBT0865-01.PDF
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3D PDF (2 Files) 3DB-TEBT0865-01.PDF
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3DT-TEBT0865-01.PDF
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Other Files (1 Files) HW_Design - PCB Design relevant files, like PCB-STEP-Model, Cooler-STEP-Model, Trace-length, Altium libraries / projects (only for selected carrier boards), and ...
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SCH-TE0865-01-ABI41FA.PDF
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SCH-TE0865-01-DGE23MA.PDF
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SCH-TE0865-01-DGE43FA.PDF
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SCH-TE0865-01-DGE43MA.PDF
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SCH-TE0865-01-FBE23MA.PDF
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SCH-TE0865-01-FBE43FA.PDF
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SCH-TE0865-01-S001.PDF
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SCH-TE0865-01-S002.PDF
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Assembly Diagrams (9 Files) AD-TE0865-01-ABI21MA.PDF
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AD-TE0865-01-ABI41FA.PDF
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AD-TE0865-01-DGE23MA.PDF
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AD-TE0865-01-DGE43FA.PDF
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AD-TE0865-01-DGE43MA.PDF
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AD-TE0865-01-FBE23MA.PDF
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AD-TE0865-01-FBE43FA.PDF
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AD-TE0865-01-S001.PDF
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AD-TE0865-01-S002.PDF
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3D PDF (2 Files) 3DB-TE0865-01-DGE43FA.PDF
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3DT-TE0865-01-DGE43FA.PDF
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Other Files (1 Files) Firmware - Initial Configuration for diverse PCB components, like CPLD, PLL and ...
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TE0865-01 bottom.jpg
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TE0865-01 top.jpg
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REV02 - PCB Revision: Schematics, AD, STEP, HW Design Files and more ...
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Schematics (5 Files) SCH-TE0865-02-ABI21MA.PDF
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SCH-TE0865-02-DGE23MA.PDF
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SCH-TE0865-02-DGE43MA.PDF
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SCH-TE0865-02-FBE23MA.PDF
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SCH-TE0865-02-FGE23MA.PDF
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Assembly Diagrams (5 Files) AD-TE0865-02-ABI21MA.PDF
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AD-TE0865-02-DGE23MA.PDF
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AD-TE0865-02-DGE43MA.PDF
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AD-TE0865-02-FBE23MA.PDF
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AD-TE0865-02-FGE23MA.PDF
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3D PDF (2 Files) 3DB-TE0865-02-DGE23MA.PDF
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3DT-TE0865-02-DGE23MA.PDF
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Other Files (1 Files) Firmware - Initial Configuration for diverse PCB components, like CPLD, PLL and ...
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Trace Lengths (0 Files) Other Files (0 Files)
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TE0865-02 bottom.jpg
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TE0865-02 top.jpg
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Reference_Design - FPGA Design Examples for different Vivado Versions
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- If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
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Schematics (2 Files) SCH-TEBT0782-01.PDF
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SCH-TEBT0782-01A.PDF
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Assembly Diagrams (2 Files) AD-TEBT0782-01.PDF
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AD-TEBT0782-01A.PDF
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3D PDF (2 Files) 3DB-TEBT0782-01.PDF
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3DT-TEBT0782-01.PDF
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Other Files (0 Files)
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TEBT0782-01A_top.jpg
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TEBT0782-01_angle.jpg
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TEBT0782-01_top.jpg
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TE0782 - Xilinx Zynq FPGA modules
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PCN-20210612 TE0782-02 eMMC Change.pdf
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Schematics (12 Files) SCH-TE0782-02-035-2I.PDF
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SCH-TE0782-02-045-2I.PDF
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SCH-TE0782-02-045-2IC.PDF
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SCH-TE0782-02-100-2I.PDF
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SCH-TE0782-02-100-2IY.PDF
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SCH-TE0782-02-82I33FA.PDF
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SCH-TE0782-02-82I33MA.PDF
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SCH-TE0782-02-92I33FA.PDF
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SCH-TE0782-02-92I33FH.PDF
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SCH-TE0782-02-92I33MA.PDF
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SCH-TE0782-02-A2I33FA.PDF
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SCH-TE0782-02-A2I33MA.PDF
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Assembly Diagrams (12 Files) AD-TE0782-02-035-2I.PDF
Size
AD-TE0782-02-045-2I.PDF
Size
AD-TE0782-02-045-2IC.PDF
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AD-TE0782-02-100-2I.PDF
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AD-TE0782-02-100-2IY.PDF
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AD-TE0782-02-82I33FA.PDF
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AD-TE0782-02-82I33MA.PDF
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AD-TE0782-02-92I33FA.PDF
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AD-TE0782-02-92I33FH.PDF
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AD-TE0782-02-92I33MA.PDF
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AD-TE0782-02-A2I33FA.PDF
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AD-TE0782-02-A2I33MA.PDF
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3D PDF (0 Files) Other Files (1 Files) Firmware - Initial Configuration for diverse PCB components, like CPLD, PLL and ...
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Files SC-PGM-TE0782-02_SC0782-01_20160627.zip
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TE0782 CPLD-v.5-11_15_2023.pdf
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Files[-] Close all Programming files of CPLD Firmware (1 Files) SC-PGM-TE0782-002_SC0782-002_20231123.zip
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Other Files (0 Files)
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Trace Lengths (1 Files) TL-TE0782-02_signal_length_b2b.xls
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Other Files (0 Files)
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TE0782-02 bottom.jpg
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TE0782-02 top.jpg
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TE0782-02-035-2I_angle.jpg
Size
TE0782-02-035-2I_bottom.jpg
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TE0782-02-035-2I_top.jpg
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TE0782-02-045-2I_angle.jpg
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TE0782-02-045-2I_bottom.jpg
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TE0782-02-045-2I_top.jpg
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TE0782-02-100-2I_angle.jpg
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TE0782-02-100-2I_bottom.jpg
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TE0782-02-100-2I_top.jpg
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TE0782-02-82I33MA angle.jpg
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TE0782-02-82I33MA bottom.jpg
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TE0782-02-82I33MA top.jpg
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TE0782-02-92I33MA angle.jpg
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TE0782-02-92I33MA bottom.jpg
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TE0782-02-92I33MA top.jpg
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TE0782-02-A2I33MA angle.jpg
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TE0782-02-A2I33MA bottom.jpg
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TE0782-02-A2I33MA top.jpg
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Reference_Design - FPGA Design Examples for different Vivado Versions
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test_board - Zynq Basic-System
Short Description:
Project contains a PetaLinux Project (for Linux!) in "<design_name>/os/petalinux/" . See PetaLinux KICKstart.
Connector Pinout Viewer/XDC-Generator available on TE Master Pinout.
Excerpt of special Block-Design components/interfaces:
Component | Description |
---|---|
Zynq PS | activated MIO-Interfaces: DDR3, QSPI, GPIO, Uart, I2C, SD, Ethernet |
Xilinx IPs | GMII to RGMII, VIO, RGMII Reset |
TE IPs | TE0782 System Control |
Additional Software Application for SDK/HSI and Linux:
Application | Description |
---|---|
zynq_fsbl | Zynq First Stage Bootloader |
hello_world | Xilinx Hello World Example |
u-boot | Petalinux-Uboot (image.ub in prebuilt-folder,ex.:/os/petalinux/default) |
Additional content in the larger ZIP with prebuilt-folders:
File | File-Extension | Description |
---|---|---|
Bin-File | *.bin | Flash Configuration File with Boot-Image (Zynq-FPGAs) |
Bit-File | *.bit | FPGA Configuration File |
Software-Application-File | *.elf | Software Application for Zynq or MicroBlaze Processor Systems |
Hardware-Platform-Specification-Files | *.hdf | Hardware Specification from the vivado project. Used in SDK/HSI |
BIF-File | *.bif | File with description to generate Bin-File |
OS-Image | *.ub | Image with Linux Kernel (On Petalinux optional with Devicetree and RAM-Disk) |
Diverse Reports | -- | Report files in different formats |
Size
te0782-test_board_noprebuilt-vivado_2016.1-build_06_20160620135501.zip
Size
2016.2
te0782_sdsoc - TE0782 SDSoC
TE0782 SDSoC
-Downloadable files are located below the description-
Short Description:
TE SDSoC User Guide is available on:SDSoC Projects.
The SDSoC project is available as separate ZIP (te0782_35_sdsoc.zip, te0782_45_sdsoc.zip, te0782_100_sdsoc.zip) or can be created from reference design.
Currently supported Xilinx SDSoC Examples:
- Matrix Multiplication – Standalone/Linux
- Matrix Multiplication (area reduced) – Standalone/Linux
- Matrix Multiplication Data Size (area reduced) - Standalone/Linux
- Pipelined Matrix Multiplication (area reduced) - Linux
- Matrix Multiplication and Addition (area reduced) - Standalone/Linux
- Color Space Conversion - RGB/HSV) - Standalone/Linux
- Synthesizeable FIR Filter) - Standalone/Linux
- File IO Video Processing - Linux
Size
te0782_35_sdsoc.zip
Size
te0782_45_sdsoc.zip
Size
SDSoC Reference Design to create SDSoC Platform (1 Files) te0782-te0782_sdsoc-vivado_2016.2-build_09_20170118120559.zip
Size
Other Files (0 Files)
TE0782 Basic Zynq System
-The downloadable files can be found after description-
- activate interface, type: ifconfig eth1 up
- connect cable, link up appears with message:
macb e000c000.ethernet eth1: unable to generate target frequency: 125000000 Hz
macb e000c000.ethernet eth1: link up (1000/Full) - "unable to generate target frequency" can be ignored, this is set by modified FSBL
- set IP manually, type: ifconfig eth1 <ip>
- for ping test, type: ping -I eth1 <ip>
Component | Description |
---|---|
PS-MIOs | DDR3, QSPI, GPIO, Uart, I2C, SD, Ethernet |
Xilinx IPs | GMII to RGMII, VIO, RGMII Reset |
TE IPs | TE0782 System Control |
Application | Description |
---|---|
zynq_fsbl | Zynq First Stage Bootloader (TE::Modified) |
hello_world | Xilinx Hello World Example |
u-boot | Petalinux-Uboot (image.ub in prebuilt-folder,ex.:/os/petalinux/default) |
Name | Folder | Description |
---|---|---|
SI5338 SiLab Project | <design_name>/misc/si5338 | FSBL SI5338 configuration |
PetaLinux Project | <design_name>/os/petalinux | PetaLinux Project with I2C, Flash, USB, Ethernet. Modified system-top.dts and platform-top.h. |
File | File-Extension | Description |
---|---|---|
Bin-File | *.bin | Flash Configuration File with Boot-Image (Zynq-FPGAs) |
BIT-File | *.bit | FPGA Configuration File |
Software-Application-File | *.elf | Software Application for Zynq or MicroBlaze Processor Systems |
SREC-File | *.srec | Converted Software Application for MicroBlaze Processor Systems |
Hardware-Platform-Specification-Files | *.hdf | Exported Vivado Hardware Specification for SDK/HSI |
BIF-File | *.bif | File with description to generate Bin-File |
OS-Image | *.ub | Image with Linux Kernel (On Petalinux optional with Devicetree and RAM-Disk) |
Diverse Reports | -- | Report files in different formats |
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Size
te0782-test_board_noprebuilt-vivado_2016.2-build_07_20161020100303.zip
Size
2017.1
test_board - TE0782 Basic-System
TE0782 Basic-System
-Downloadable files are located below the description-
Currently implemented:
- USB 2.0(both)
- ETH (both)
- RTC
- Boot process from QSPI
- read image.ub from flash with uboot is slow. This effect occurs with uboot generate with 2017.1 petalinux
- Connect JTAG/UART on carrier.
- Power on carrier.
- Configure Flash with Boot.bin (<design_name>/prebuilt/boot_images/<short dir>/u-boot), image.ub is included into boot.bin. Use SDK or Vivado.
- Power off/on carrier.
- Open Serial console:
- Windows: Open Serial Console (e.g. putty):COM Port(see device manager), Speed(115200).
- Linux: Open Serial Console (e.g. minicom):COM Port(dmesg |grep tty) UART is *USB1, Speed(115200).
- Wait until Linux boot finised(load image.ub from QSPI need a little bit time, see release notes).
- ETH0 (PHY connected to PS MIOs)
- Connect ETH cable.
- type: udhcpc
- or set IP manually
- ETH1 (PHY connected to PL IOs)
- Connect ETH cable.
- type: ifconfig eth1 up
- Note: output "xemacps e000c000.ethernet: Set clk to 0 Hz" can be ignored.
- type: ifconfig eth1 <ip>
Component | Description |
---|---|
PS-MIOs | QSPI, I2C1, UART1, GPIO, SD1, USB0, USB1, ETH0, ETH1, DDR3 |
Xilinx-IP | GMII to RGMII |
TE-IP | TE0782 System Control |
Application | Description |
---|---|
zynq_fsbl | TE modified Zynq FSBL for SI5338 Configuration (template in subfolder sw_lib) |
hello_world | Xilinx Hello World Example |
u-boot | Petalinux-Uboot (image.ub in <design_name>/prebuilt/os/petalinux/<short dir or default>) |
Name | Folder | Description |
---|---|---|
SI5338 Project | <design_name>/misc/si5338/ | Clock Builder Desktop Project, with all CLKs enabled. |
FSBL Template | <design_name>/sw_lib/ | Modified FSBL Template for SDK/HSI |
PetaLinux Project | <design_name>/os/petalinux | PetaLinux Project with ETH0,RTH1,USB0,USB1,RTC |
File | File-Extension | Description |
---|---|---|
BIF-File | *.bif | File with description to generate Bin-File |
BIN-File | *.bin | Flash Configuration File with Boot-Image (Zynq-FPGAs) |
BIT-File | *.bit | FPGA Configuration File |
Diverse Reports | --- | Report files in different formats |
Hardware-Platform-Specification-Files | *.hdf | Exported Vivado Hardware Specification for SDK/HSI |
OS-Image | *.ub | Image with Linux Kernel (On Petalinux optional with Devicetree and RAM-Disk) |
Software-Application-File | *.elf | Software Application for Zynq or MicroBlaze Processor Systems |
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Size
Reference Design - Source Code and Configuration Files (1 Files) te0782-test_board-vivado_2017.1-build_04_20170830170807.zip
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Other Files (0 Files)
test_board - TE0782 PS Design with Linux Example
TE0782 PS Design with Linux Example
-Downloadable files are located below the description-
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Size
Reference Design - Source Code and Configuration Files (1 Files) TE0782-test_board-vivado_2018.2-build_03_20181009164622.zip
Size
Reference Design - Documentation (1 Files) TE0782-test_board-vivado_2018.2-build_03_TE0782 Test Board-v.9-10_10_2023.pdf
Size
Other Files (0 Files)
test_board - TE0782 PS Design with Linux Example
TE0782 PS Design with Linux Example
-Downloadable files are located below the description-
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Size
Reference Design - Source Code and Configuration Files (1 Files) TE0782-test_board-vivado_2022.2-build_9_20231205104243.zip
Size
Reference Design - Documentation (0 Files) Other Files (0 Files)
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Size
PCN-20210613 TE0783-02 eMMC Change and Product Update.pdf
Size
Other Files (0 Files)
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-
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Size
SCH-TE0783-01-045-2I.PDF
Size
SCH-TE0783-01-100-2I.PDF
Size
SCH-TE0783-01.PDF
Size
Assembly Diagrams (4 Files) AD-TE0783-01-035-2I.PDF
Size
AD-TE0783-01-045-2I.PDF
Size
AD-TE0783-01-100-2I.PDF
Size
AD-TE0783-01.PDF
Size
3D PDF (2 Files) 3DB-TE0783-01.PDF
Size
3DT-TE0783-01.PDF
Size
Other Files (0 Files)
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Other Files (0 Files)
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Trace Lengths (0 Files) Other Files (0 Files)
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Size
TE0783-01-045-2I_bottom.jpg
Size
TE0783-01-045-2I_top.jpg
Size
REV02 - PCB Revision: Schematics, AD, STEP, HW Design Files and more ...
- If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
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-
If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
Size
Schematics (11 Files) SCH-TE0783-02-035-2I.PDF
Size
SCH-TE0783-02-045-2I.PDF
Size
SCH-TE0783-02-100-2I.PDF
Size
SCH-TE0783-02-92I33FA.PDF
Size
SCH-TE0783-02-92I33HA.PDF
Size
SCH-TE0783-02-92I33MA.PDF
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SCH-TE0783-02-92I35HA.PDF
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SCH-TE0783-02-92I35PA.PDF
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SCH-TE0783-02-A2I33FA.PDF
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SCH-TE0783-02-A2I33MA.PDF
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SCH-TE0783-02.PDF
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Assembly Diagrams (11 Files) AD-TE0783-02-035-2I.PDF
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AD-TE0783-02-045-2I.PDF
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AD-TE0783-02-100-2I.PDF
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AD-TE0783-02-92I33FA.PDF
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AD-TE0783-02-92I33HA.PDF
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AD-TE0783-02-92I33MA.PDF
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AD-TE0783-02-A2I33FA.PDF
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AD-TE0783-02-A2I33MA.PDF
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AD-TE0783-02.PDF
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3D PDF (2 Files) 3DB-TE0783-02.PDF
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3DT-TE0783-02.PDF
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Other Files (0 Files)
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If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
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Other Files (0 Files)
- Please read the Legal Notices before downloading Trenz Electronics documents and files.
- Trenz Electronic use STEP-Models from different sources. Depending from model and soldering process the real dimension (especial maximum height) can be vary from the STEP-Models.
-
If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
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Trace Lengths (0 Files) Other Files (0 Files)
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TE0783-02-045-2I_bottom.jpg
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TE0783-02-045-2I_top.jpg
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TE0783-02-92I33MA angle.jpg
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TE0783-02-92I33MA bottom.jpg
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TE0783-02-92I33MA top.jpg
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Reference_Design - FPGA Design Examples for different Vivado Versions
- If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
test_board - TE0783 PS Design with Linux Example
TE0783 PS Design with Linux Example
-Downloadable files are located below the description-
- Please read the Legal Notices before downloading Trenz Electronics documents and files.
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Reference Design - Source Code and Configuration Files (1 Files) TE0783-test_board-vivado_2017.4-build_10_20180611114017.zip
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Reference Design - Documentation (0 Files) Other Files (0 Files)
- If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
- Please read the Legal Notices before downloading Trenz Electronics documents and files.
-
If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
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PCN-20210614 TE0784-01 eMMC Change and Product Update.pdf
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Other Files (0 Files)
- If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
- Please read the Legal Notices before downloading Trenz Electronics documents and files.
-
If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
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Schematics (6 Files) SCH-TE0784-01-045-2I.PDF
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SCH-TE0784-01-100-2I.PDF
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SCH-TE0784-01-92I33FA.PDF
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SCH-TE0784-01-92I33MA.PDF
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SCH-TE0784-01-A2I33FA.PDF
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SCH-TE0784-01-A2I33MA.PDF
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Assembly Diagrams (6 Files) AD-TE0784-01-045-2I.PDF
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AD-TE0784-01-100-2I.PDF
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AD-TE0784-01-92I33FA.PDF
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AD-TE0784-01-92I33MA.PDF
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AD-TE0784-01-A2I33FA.PDF
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AD-TE0784-01-A2I33MA.PDF
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3D PDF (0 Files) Other Files (1 Files) Firmware - Initial Configuration for diverse PCB components, like CPLD, PLL and ...
- Please read the Legal Notices before downloading Trenz Electronics documents and files.
-
If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
- Please read the Legal Notices before downloading Trenz Electronics documents and files.
- Trenz Electronic use STEP-Models from different sources. Depending from model and soldering process the real dimension (especial maximum height) can be vary from the STEP-Models.
-
If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
- Please read the Legal Notices before downloading Trenz Electronics documents and files.
-
If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
- If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
- If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
Common documentation and device drivers repository for Trenz Electronic FPGA modules equipped with USB interface:
- TE0300 series
- TE0320 series
- TE0630 series
Current documentation is available
Files PCN-0001.pdf Product change notification:
Trenz Electronic USB series modules: firmware version 2.02 released.
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PCN-0002.pdf Product change notification:
Trenz Electronic USB series modules: firmware version 3.00 released.
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generation_1 - driver: DEWESoft (NOT recommended for new designs).
drivers
Files DewesoftUSB.zip DEWESoft USB device drivers for Trenz Electronic USB 2.0 FPGA modules:
- source: DEWESoft
- devices: TE0300-Serie, TE0320-Serie, TE0630-Serie
- operating systems:
- Microsoft Windows 32 bit
- Version: 0.1.0.0
- Datum: 2007 Aug 08
- VID (vendor ID): 0547 (Anchor Chips, now Cypress Semiconductor)
- PID (product ID):1002 (Python2 WDM Encoder)
- device driver: DEWESoft USB FX2
- API: DEWESoft USB FX2
Please check your VID/PID in device manager (devmgmt.msc > properties > details > Hardware Ids).
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generation_2 - firmware, driver, API: DEWESoft (NOT recommended for new designs).
System requirements:
- Trenz Electronic hardware: TE0300 series, TE0320 series, TE0630 series
- VID (vendor identifier): 0547 (Anchor Chips, now Cypress Semiconductor)
- PID (product identifier): 1002 (Python2 WDM Encoder)
- device drivers: DEWESoft USB FX2 (generation 2)
- API: DEWESoft USB FX2 (generation 2)
Please check your VID/PID in device manager (devmgmt.msc > properties > details > Hardware Ids).
Please watch generation 2 to generation 3
Please find here:
- Trenz Electronic USB FX2 microcontroller
GitHub-TE-FPGA-USB-FW:firmware files UM-TE-USB-DD-2:generation 2 device drivers UM-TE-USB-API-2:generation 2 API documentation UM-TE-USB-API-2-3:generation 2 API to generation 3 APIs documentation UM-TE-USB-DD-3:generation 3 device drivers UM-TE-USB-API-3:generation 3 APIs documentation GitHub-TE-FPGA-USB:generation 3 APIs source files
Files UM-TE_USB_API.pdf User manual:
Trenz Electronic USB FPGA module series API (application programming interfaces). Not recommended for new designs.
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documents
Files Bootload.ini Configuration file for FWU file creation
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FWU-iMPACT.avi.zip FWU - fpga.bin file creation video.
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TE0320+FUT4.1.avi.zip Video:
a FWU (FirmWare Upgrade) file is uploaded to a Trenz Electronic TE0320 module with FUT (Firmware Upgrade Tool) version 4.1 (
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UM-USB-Firmware.pdf User manual:
USB microcontroller firmware update and recovery.
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drivers - USB FX2 device drivers: DEWESoft
Legacy device driver collection (DEWESoft) for Trenz Electronic FPGA modules equipped with FX2 USB microcontroller. Not recommended for new designs.
Please find here:
- Trenz Electronic USB FX2 microcontroller
GitHub-TE-FPGA-USB-FW:firmware files UM-TE-USB-DD-2:generation 2 device drivers UM-TE-USB-API-2:generation 2 API documentation UM-TE-USB-API-2-3:generation 2 API to generation 3 APIs documentation UM-TE-USB-DD-3:generation 3 device drivers UM-TE-USB-API-3:generation 3 APIs documentation GitHub-TE-FPGA-USB:generation 3 APIs source files
Files TE03xx-USB_32-64.new_VID_PID.zip Trenz Electronic USB device drivers for Trenz Electronic USB 2.0 FPGA modules:
- source: DEWESoft
- devices: TE0300 series, TE0320 series, TE0630 series
- operating systems:
- Microsoft Windows 32 bit
- Microsoft Windows 64 bit
- version: 8.1.0.0
- date: 2010 Jan 10
- VID (vendor identifier): 0BD0 (Trenz Electronic GmbH)
- PID (product identifier): 0300 (USB 2.0 FPGA modules)
- device driver: DEWESoft USB FX2
- API: DEWESoft USB FX2
Please check your VID/PID in device manager (devmgmt.msc > properties > details > Hardware Ids).
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Files TE03xx-USB_32-64.zip Trenz Electronic USB device drivers for Trenz Electronic USB 2.0 FPGA modules with old VID/PID:
- source: DEWESoft
- devices: TE0300 series, TE0320 series, TE0630 series
- operating systems:
- Microsoft Windows 32 bit
- Microsoft Windows 64 bit
- version: 8.1.0.0
- date: 2010 Jan 10
- VID (vendor identifier): 0547 (Anchor Chips, now Cypress Semiconductor)
- PID (product identifier): 1002 (Python2 WDM Encoder)
Please check your VID/PID in device manager (devmgmt.msc > properties > details > Hardware Ids).
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UM-drivers-DEWESoft_USB_FX2.pdf User manual:
Trenz Electronic USB FPGA modules driver installation.
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reference_designs - Software development resources
Please browse our current open software repositories:
- Trenz Electronic
GitHub-TE:GitHub repositories - Trenz Electronic reference design:
GitHub-TE-FPGA-TE03XX:TE0300 and TE0320 series Xilinx EDK project - Trenz Electronic reference design:
GitHub-TE-FPGA-TE063X:TE0630 series Xilinx EDK project - Trenz Electronic
GitHub-TE-FPGA-USB:USB FPGA module series (click "ZIP" button to download repository as a zip file) - Trenz Electronic sample applications:
GitHub-TE-FPGA-USB-G2:generation 2 - Trenz Electronic sample application:
GitHub-TE-FPGA-USB-TE0300:TE0300 C++ application - Trenz Electronic sample application:
GitHub-TE-FPGA-USB-TE0320:TE0320 C++ application
Files TE0300_API_Example.zip Sample application project:
it tests data transfer between host computer and module SDRAM (through FX2 USB microcontroller and FPGA):
- device: TE0300 series
- operating systems: Microsoft Windows 32 bit
- development environment: Visual C++ version 9.00
- programming language: C++
- application version: 3.1
- code type(s): project, sources, executable
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TE0320_API_Example.zip Sample application project:
it tests data transfer between host computer and module SDRAM (through FX2 USB microcontroller and FPGA):
- device: TE0320 series
- operating systems: Microsoft Windows 32 bit
- development environment: Visual C++ version 9.00
- programming language: C++
- application version: 1.0
- code type(s): project, sources, executable
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tools - Utility programs
Utility programs for restoring and updating firmware of Trenz Electronic USB FX2 FPGA modules.
System requirements:
- DEWESoft device driver (generation 2)
- DEWESoft USB FX2 API (generation 2)
Open_FUT (generation 2) source code hosted by
Files DewesoftFUT.zip
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Open_FUT.zip Open Firmware Upgrade Tool
Open source firmware upgrade tool for Microsoft Windows operating systems.
Written in Python with Tcl/Tk GUI by Trenz Electronic.
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Files DEWESoft_USBFirmwareUpgradeTool_5_4.zip DEWESoft Firmware Upgrade Tool
Recommended firmware upgrade tool for Microsoft Windows operating systems.
Version: 5.4.
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generation_2_to_generation_3 - firmware, driver, APIs: migration.
Migration from the second generation (aka DEWESoft USB FX2) to the third generation (aka TE USB FX2) of Trenz Electronic USB FX2 technology stack (firmware, driver and APIs).
System requirements:- Trenz Electronic hardware: TE0300 series, TE0320 series, TE0630 series
- VID (vendor identifier): from 0547 to 0BD0
- PID (product identifier): from 1002 to 0300
- device drivers: from DEWESoft USB FX2 to Trenz Electronic USB FX2
- APIs: from DEWESoft USB FX2 API to Trenz Electronic USB FX2 APIs
Please check your VID/PID in device manager (devmgmt.msc > properties > details > Hardware Ids).
Please watch generation 2 to generation 3
Please find here:
- Trenz Electronic USB FX2 microcontroller
GitHub-TE-FPGA-USB-FW:firmware files UM-TE-USB-DD-2:generation 2 device drivers UM-TE-USB-API-2:generation 2 API documentation UM-TE-USB-API-2-3:generation 2 API to generation 3 APIs documentation UM-TE-USB-DD-3:generation 3 device drivers UM-TE-USB-API-3:generation 3 APIs documentation GitHub-TE-FPGA-USB:generation 3 APIs source files
These documents are a PDF export from the Trenz Electronic wiki. The current version is available
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UM-TE_USB_API.cpp.PortingGuide.pdf Dewesoft C++ DLL to Trenz Electronic C++ DLL Porting Guide
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UM-TE_USB_API.cs.PortingGuide.pdf Dewesoft C++ DLL to Trenz Electronic C# DLL Porting Guide
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documents - Generation migration guide: from the 2nd (aka DEWESoft USB FX2) to the 3rd (aka TE USB FX2) generation.
Files UM-TE-USB-FX2-gen2_to_gen3.pdf
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generation_3 - firmware, driver, APIs: Trenz Electronic.
Please read the Trenz Electronic
System requirements:
- Trenz Electronic hardware: TE0300 series, TE0320 series, TE0630 series
- VID (vendor identifier): 0BD0 (Trenz Electronic GmbH)
- PID (product identifier): 0300 (USB 2.0 FPGA modules)
- device drivers: Trenz Electronic USB FX2 (generation 3)
- APIs: Trenz Electronic USB FX2 (generation 3)
Please check your VID/PID in device manager (devmgmt.msc > properties > details > Hardware Ids).
Please find here:
- Trenz Electronic USB FX2 microcontroller
GitHub-TE-FPGA-USB-FW:firmware files UM-TE-USB-DD-3:generation 3 device drivers UM-TE-USB-API-3:generation 3 APIs documentation GitHub-TE-FPGA-USB:generation 3 APIs source files
These documents are a PDF export from the Trenz Electronic wiki. The current version is available
Trenz Electronic USB FX2 FPGA module series C++ API (application programming interfaces) reference manual.
This document is a PDF export from the Trenz Electronic wiki. The current version is available
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UM-TE_USB_API.cs.pdf C# TE_USB_FX2 API:
Trenz Electronic USB FX2 FPGA module series C# API (application programming interfaces) reference manual.
This document is a PDF export from the Trenz Electronic wiki. The current version is available
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drivers - USB FX2 device drivers: Trenz Electronic
Current device driver collection (Trenz Electronic) for Trenz Electronic FPGA modules equipped with FX2 USB microcontroller.
Please read the corresponding Trenz Electronic
- source: Cypress
- devices: TE0300 series, TE0320 series, TE0630 series
- operating systems:
- Microsoft Windows 8, 64 bit (certified: automatic/online installation/update possible)
- Microsoft Windows 8, 32 bit (certified: automatic/online installation/update possible)
- Microsoft Windows 7, 64 bit (certified: automatic/online installation/update possible)
- Microsoft Windows 7, 32 bit (certified: automatic/online installation/update possible)
- Microsoft Windows Vista, 64 bit
- Microsoft Windows Vista, 32 bit
- Microsoft Windows XP, 64 bit
- Microsoft Windows XP, 32 bit
- Microsoft Windows 2000, 32 bit
- version: 10.0.0.0
- date: 2012 May 01
- VID (vendor identifier): 0BD0 (Trenz Electronic GmbH)
- PID (product identifier): 0300 (USB 2.0 FPGA modules)
Please check your VID/PID in device manager (devmgmt.msc > properties > details > Hardware Ids).
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UM-drivers-TE_USB_FX2.pdf User manual:
Trenz Electronic USB FPGA modules driver installation.
This document is a PDF export from the Trenz Electronic wiki. The current version is available
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reference_designs - Software development resources
Please read the corresponding Trenz Electronic USB Suite Documentation.
Please browse our current open software repositories:
TE_USB_FX2.Cpp - Application code examples: C++Please read the corresponding Trenz Electronic
"FilesToImportForApplicationCpp" contains files required to create a new C++ software project that uses TE_USB_FX2_CyAPI.dll.
In particular, there are two header files: TE_USB_FX2_CyAPI.h and CyApi.h. This two files shall be added to the new C++ software project under "Include files".
The DLL32 subdirectory contains various files, but the only file necessary for a new C++ software project is TE_USB_FX2_CyAPI.dll that shall be added under "Resource Files". The other files have been stored here for completness.
The DLL64 subdirectory contains various files, but the only file necessary for a new C++ software project is TE_USB_FX2_CyAPI.dll that shall be added under "Resource Files". The other files have been stored here for completness.
For further information, please read UM-TE_USB_API.cpp.pdf.
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TE_USB_FX2_CyAPI-32-VSExpress+VSProfessional.zip
TE_USB_FX2_CyAPI-32-VSExpress+VSProfessional contains the Microsoft Visual Studio 2010 Express C++ project with CyAPI.lib (for 32 bit) and settings adapted to compile under Visual Studio 2010 Express and Professional.
This software project creates TE_USB_FX2_CyAPI.dll for 32 bit.
The use of symbolic debugging is set to yes.
For further information, please read UM-TE_USB_API.cpp.pdf.
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TE_USB_FX2_CyAPI-64-VSExpress.zip
TE_USB_FX2_CyAPI-64-VSExpress contains the Microsoft Visual Studio 2010 Express C++ project with CyAPI.lib (for 64 bit) and settings adapted to compile under Microsoft Visual Studio 2010 Express C++.
This software project creates TE_USB_FX2_CyAPI.dll for 64 bit, under Visual Studio 2010 Express.
The use of symbolic debugging is set to yes.
For further information, please read UM-TE_USB_API.cpp.pdf.
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TE_USB_FX2_CyAPI-64-VSProfessional.zip
TE_USB_FX2_CyAPI-64-VSProfessional contains the Visual Studio 2010 Express C++ project with CyAPI.lib (for 64 bit) and settings adapted to compile under Visual Studio 2010 Professional.
This software project creates TE_USB_FX2_CyAPI.dll for 64 bit, under Visual Studio 2010 Professional.
The use of symbolic debugging is set to yes.
For further information, please read UM-TE_USB_API.cpp.pdf.
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TE_USB_FX2_CyAPI_SampleApplication-32-VSExpress+VSProfessional.zip
TE_USB_FX2_CyAPI_SampleApplication-32-VSExpress+VSProfessional contains the Microsoft Visual Studio 2010 Express C++ project with TE_USB_FX2_CyAPI.dll (for 32 bit) and settings adapted to compile under Visual Studio 2010 Express and Professional.
The use of symbolic debugging is set to yes, and this can slow down the building process.
For further information, please read UM-TE_USB_API.cpp.pdf.
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TE_USB_FX2_CyAPI_SampleApplication-64-VSExpress.zip
TE_USB_FX2_CyAPI_SampleApplication-64-VSExpress contains the Microsoft Visual Studio 2010 Express C++ project with TE_USB_FX2_CyAPI.dll (for 64 bit) and settings adapted to compile under Visual Studio 2010 Express.
The use of symbolic debugging is set to yes, and this can slow down the building process.
For further information, please read UM-TE_USB_API.cpp.pdf.
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TE_USB_FX2_CyAPI_SampleApplication-64-VSProfessional.zip
TE_USB_FX2_CyAPI_SampleApplication-64-VSProfessional contains the Microsft Visual Studio 2010 Express C++ project with TE_USB_FX2_CyAPI.dll (for 64 bit) and settings adapted to compile under Visual Studio 2010 Professional.
The use of symbolic debugging is set to yes, and this can slow down the building process.
For further information, please read UM-TE_USB_API.cpp.pdf.
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executable-32.zip Executable-32 contains two files required to run the test on 32 bit systems: TE_USB_FX2_CyAPI.dll and TE_USB_FX2_CyAPI_SampleApplication.exe.
To run the test, you shall copy both files to the desired directory and double click TE_USB_FX2_CyAPI_SampleApplication.exe.
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executable-64.zip Executable-64 contains two files required to run the test on 32 bit systems: TE_USB_FX2_CyAPI.dll and TE_USB_FX2_CyAPI_SampleApplication.exe.
To run the test, you shall copy both files to the desired directory and double click TE_USB_FX2_CyAPI_SampleApplication.exe.
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TE_USB_FX2.Cs - Application code examples: C#
To run the test, you shall copy files in the desired directory and double click TE_USB_FX2_CyUSB_SampleApplication.exe.
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FilesToImportForApplicationCsharp.zip FilesToImportForApplicationCsharp contains files required to create a new C# software project that uses TE_USB_FX2_CyUSB.dll and CyUSB.dll. They shall be added under "References" in Microsoft Visual Studio C# project.
For further information, please read UM-TE_USB_API.cs.pdf.
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TE_USB_FX2_CyUSB.zip
TE_USB_FX2_CyUSB contains the Microsoft Visual Studio 2010 Express C# project with CyUSB.dll and settings adapted to compile under Visual Studio 2010 Express and Professional for the creation of the TE_USB_FX2_CyUSB.dll API DLL.
Note: under Microsoft Visual Studio 2010 Express C# some settings are not selectable. In particular there is a "bug" that forces the compilation result into Debug folder even if Release is selected.
This problem does not exist under Visual Studio 2010 Professional, even if the project has been created using Express.
For further information, please read UM-TE_USB_API.cs.pdf.
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TE_USB_FX2_CyUSB_SampleApplication.zip
TE_USB_FX2_CyUSB_SampleApplication contains the Microsoft Visual Studio 2010 Express C# project with TE_USB_FX2_CyUSB.dll and CyUSB.dll and settings adapted to compile under Visual Studio 2010 Express and Professional.
Note: under Microsoft Visual Studio 2010 Express C# some settings are not selectable. In particular there is a "bug" that forces the compilation result into Debug folder even if Release is selected.
This problem does not exist under Visual Studio 2010 Professional, even if the project has been created using Express.
For further information, please read UM-TE_USB_API.cs.pdf.
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tools - Utility programs
Programming tool to update or restore USB FX2 microcontroller firmware and FPGA bitsream on TE USB modules.
Linux version available
Files OpenFutNet v1.0.zip
Programming tool to update or restore USB FX2 microcontroller firmware and FPGA bitsream on TE USB-based modules.
System requirements:
- operating system: Microsoft Windows
- .NET Framework 4 (or higher) required
- with generation 2 device driver and API:
- updates USB FX2 firmware into EEPROM
- with generation 3 device driver and API:
- updates USB FX2 firmware into EEPROM
- updates FPGA bitstream into SPI Flash memory
Source code
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Open_FUT.zip
Programm to update FX2 and FPGA firmware on TE USB-based modules.
System requirements:
- operating system: Microsoft Windows
- Trenz Electronic device driver (generation 3)
- Trenz Electronic USB FX2 API (generation 3)
- Python 2.7
Source code
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Files OpenFutNet v1.3.zip
Programming tool to update or restore USB FX2 microcontroller firmware and FPGA bitsream on TE USB-based modules.
System requirements:
- operating system: Microsoft Windows
- .NET Framework 4 (or higher) required
- with generation 2 device driver and API:
- updates USB FX2 firmware into EEPROM
- with generation 3 device driver and API:
- updates USB FX2 firmware into EEPROM
- updates FPGA bitstream into SPI Flash memory
Source code
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recovery - recovery resources.
drivers - Cypress Generic USB FX2 device drivers (recovery device drivers).
Please visit
Files Cypress_generic_USB_driver.MS-Windows-Vista+7-64-bit.signed.pdf Steps to use Cypress EZ-USB FX2LP with Microsoft Windows 7.
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Cypress_generic_USB_driver.MS-Windows-Vista+7-64-bit.signed.zip Signed Cypress generic USB device driver for Trenz Electronic USB 2.0 FPGA modules:
- source:
Cypress_Win7x64signed:Cypress Knowledge Base (meanwhile withdrawn!) - devices: TE0300 series, TE0320 series, TE0630 series
- operating systems:
- Microsoft: Windows Vista (Longhorn), Windows 7
- 64 bit version
- Version: 3.4.5.000
- date: 2011 Jan 19
- VID (vendor identifier): 04B4 (Cypress Semiconductor)
- PID (product identifier): 8613 (CY7C68013 EZ-USB FX2 USB 2.0)
Please check your VID/PID in device manager (devmgmt.msc > properties > details > Hardware Ids).
Note: it seems to work just with Cypress Control Center (.NET), not with Cypress CyConsole (C++)
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Cypress_generic_USB_driver.zip Cypress generic USB device driver for Trenz Electronic USB 2.0 FPGA modules:
- source:
Cypress_SuiteUSB:Cypress SuiteUSB 3.4 - devices: TE0300 series, TE0320 series, TE0630 series
- operating systems:
- w2k = Microsoft Windows 2000
- wxp = Microsoft Windows XP
- wlh = Microsoft: Windows Vista (Longhorn), Windows 7
- x86 = 32 bit version
- x64 = 64 bit version
- version: 3.4.7
- date: 2011 Oct 17
- VID (vendor identifier): 04B4 (Cypress Semiconductor)
- PID (product identifier): 8613 (CY7C68013 EZ-USB FX2 USB 2.0)
Please check your VID/PID in device manager (devmgmt.msc > properties > details > Hardware Ids).
YOu might have to disable driver signature enforcement.
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Cypress_generic_USB_driver_de.avi.zip Video:
installation of Cypress "Generic USB Device Driver" (
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Files Cypress_generic_USB_driver.zip Cypress generic USB device driver for Trenz Electronic USB 2.0 FPGA modules:
- source:
Cypress_SuiteUSB:Cypress SuiteUSB 3.4 - devices: TE0300 series, TE0320 series, TE0630 series
- operating systems:
- Microsoft Windows 2000
- Microsoft Windows XP
- Microsoft Windows Vista (Longhorn)
- Microsoft Windows Windows 7
- x86 = 32 bit version
- x64 = 64 bit version
- version: 3.4.5
- date: 2011 Jan 19
- VID (vendor identifier): 04B4 (Cypress Semiconductor)
- PID (product identifier): 8613 (CY7C68013 EZ-USB FX2 USB 2.0)
Please check your VID/PID in device manager (devmgmt.msc > properties > details > Hardware Ids).
You might have to disable driver signature enforcement.
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tools - firmware recovery tools.
Cypress firmware recovery tools for Trenz Electronic USB FX2 FPGA modules:
- source:
Cypress_SuiteUSB:Cypress SuiteUSB 3.4 - devices: TE0300 series, TE0320 series, TE0630 series
- operating systems: Microsoft Windows
- SuiteUSB version: 3.4.7
- date: 2011 Nov 24
- device driver: based on CyUSB.sys
- license:
Cypress_license:Cypress Software Licence Agreement v. 3.4 - Object Code
Cypress CyConsole is used to communicate with Trenz Electronic USB FX2 devices in recovery mode (matched to the CyUSB.sys device driver).
Based on CyAPI.dll (Cypress USB C++ API).
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CyUSB.NET.zip CyControl = Cypress USB Control Center (3.4.7.0) [.NET]
Cypress USB Control Center is used to communicate with Trenz Electronic USB FX2 devices in recovery mode (served by CyUSB.sys device driver).
Written in C#, based on CyUSB.dll (Cypress USB .NET API).
Requires a Microsoft .NET framework 2.0 or later for execution.
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Files TE USB FX2 Technology Stack Overview.pdf Trenz Electronic USB FX2 Technology Stack Overview:
A Quick Guide to Relevant Resources.
This document is a PDF export from the Trenz Electronic wiki. The current version is available
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TE0140_series - Xilinx Spartan-3 Micromodules with USB PHY mit UMTI
Xilinx Spartan-3 Micromodules with USB PHY mit UMTI (USB Transceiver Macrocell Interface) TE0140
HW-design - Hardware design resources
Please share your contributions
Files 50103-xx. 0.8.receptacle.ASE.. rev-O.pdf
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50110-xx.conn.ASE. rev-A.pdf
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mated_connectors.png
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Files TE0140.LIB.zip Trenz Electronic TE0140 series
- Protel schematic library saved in Version 4.0 format
- Protel PCB library saved in Version 3.0 format
- Eagle library
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documents
archive
Files SCH-TE0140-00.pdf
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SCH-TE0140-02.pdf
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UM-TE0140-00.pdf
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UM-TE0140-01.pdf
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UM-TE0140-02.pdf
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Files PCN-20201027 TE0140 End of Life-v3-02_16_2021.pdf Product change notification:
Trenz Electronic TE0140 status: EOL
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PCN-TE0140-A.pdf Product change notification:
Trenz Electronic TE0140-04 series: new B2B (board-to-board) interconnect
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SCH-TE0140-04.pdf Schematic diagram
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UM-TE0140-04.pdf User manual
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pictures
archive
Files TE0140-04_h.jpg
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TE0140-04_v.jpg
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Files TE0140-04.angle.jpg
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TE0140-04.bottom.jpg
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TE0140-04.top.jpg
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reference_designs
Files TE0140-blinker_test.zip Sample project for a blinking LED on a Trenz Electronic TE0140 FPGA module:
- Xilinx ISE version: 10.1.02
- language: VHDL
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test
Files blink_1000.bit
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blink_400.bit
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TE0143
documents
archive
Files AD-TE0143-00.pdf
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Files 3DB-TE0143-01.PDF
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3DT-TE0143-01.PDF
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AD-TE0143-00.pdf Assembly diagram
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AD-TE0143-01.PDF
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AN-TE0143.pdf Application note:
Trenz Electronic TE0143 prototyping carrier board
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PCN-20201029 TE0143 End of Life-v3-02_16_2021.pdf Product change notification:
Trenz Electronic TE0143 status: EOL
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SCH-TE0143-00.pdf Schematic diagram
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SCH-TE0143-01.PDF
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UM-TE0143-00.pdf User manual
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pictures
Files TE0143-bottom.jpg
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TE0143-top.jpg
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TE0146
documents
Files AD-TE0146-00.pdf Assembly diagram
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PCN-20201008 TE0146 End of Life-v4-02_16_2021.pdf Product change notification:
Trenz Electronic TE0146 status: EOL
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SCH-TE0146-00.pdf Schematic diagram
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UM-TE0146.pdf User manual
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pictures
Files TE0146-bottom.jpg
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TE0146-bottom.xcf
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TE0146-top.jpg
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TE0146-top.xcf
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reference_designs
archive
Files TE0146_SDRAM_TEST.zip
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pt.mcs
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Files TE0146-SDRAM_test-ISE_8.1i.zip This sample project tests the SDRAM a on Trenz Electronic TE0146 FPGA module:
- Xilinx ISE-Version: 8.1i
- Sprache: Verilog
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TE014x
HW_design
archive
Files Component Datasheets.zip Component datasheets
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Files Component Datasheets.zip Component datasheets
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documents
archive
Files PB-xc3smicro-and-sdram.pdf
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Files PB-TE014X.pdf Product brief
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reference_designs
archive
Files Obsolete USB1.1 Beta.zip
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USB Core Dokumentation_1_0.pdf
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USB2.0 Demo.zip
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TE0300_series - Spartan-3E Micromodules with USB 2.0 Microcontroller
TE0300 - Spartan-3E Micromodules with USB 2.0 Microcontroller
REV01
HW_design - Hardware design resources
Please visit
2x80-pin Hirose DF17 B2B connectors
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TE0300-01.LIB-Altium.zip Trenz Electronic TE0300 and TE0630: module and connectors footprint:
- Protel for Windows (Schematic Library Editor Binary File, version 1.2)
- PCB 3.0 Binary Library (Protel Advanced PCB Library, version 3.00)
- Gerber files
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TE0300-01.LIB-Eagle.zip Trenz Electronic TE0300 and TE0630: module and connectors footprint:
- EAGLE PCB
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TE0300.3D-STEP.zip Trenz Electronic TE0300 and TE0630 modules:
- 3D STEP (ISO 10303) model
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documents
archive
Files AD-TE0300-00.pdf Assembly diagram
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AN-TE0300-01.pdf Application note
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SCH-TE0300-00.pdf Schematic diagram
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UM-TE0300-v1.18.pdf User manual
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Files AD-TE0300-01.pdf Assembly diagram
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AD-TE0300-01BM.PDF
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AD-TE0300-01BMLP.PDF
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AD-TE0300-01I.PDF
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AD-TE0300-01IBM-C1.PDF
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AD-TE0300-01IBM.PDF
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AD-TE0300-01IBMLP.PDF
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AD-TE0300-01M.PDF
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AD-TE0300-01PD21.PDF
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AN-TE03xx.pdf Application note:
Trenz Electronic TE0300 series and TE0320 series
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PB-TE0300.pdf Product brief
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PCN-20220131 TE03XX End of Life.pdf
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SCH-TE0300-01.pdf Schematic diagram
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SCH-TE0300-01BM.PDF
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SCH-TE0300-01BMLP.PDF
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SCH-TE0300-01I.PDF
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SCH-TE0300-01IBM-C1.PDF
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SCH-TE0300-01IBM.PDF
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SCH-TE0300-01IBMLP.PDF
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SCH-TE0300-01M.PDF
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SCH-TE0300-01PD21.PDF
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UM-TE0300.pdf User manual
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pictures
Files TE0300-00-top.jpg
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TE0300.angle.jpg
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reference_designs - Software development resources
Please browse our current open software repositories:
GitHub-TE:Trenz Electronic - Trenz Electronic
GitHub-TE-FPGA-TE03XX:TE0300 and TE0320 series - Trenz Electronic
GitHub-TE-FPGA-USB:USB FPGA module series
Files TE0300-00-SW_dev_pack-v0.8.zip Trenz Electronic TE0300 software development package:
- package version: 0.8
- Xilinx EDK version: 9.2.02
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TE0300-00-SW_dev_pack-v1.0.zip Trenz Electronic TE0300 software development package:
- package version: 1.0
- Xilinx EDK version: 9.2.02
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TE0300-00-SW_dev_pack-v2.1.zip Trenz Electronic TE0300 software development package:
- package version: 2.1
- Xilinx EDK version: 10.1.01
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TE0300-00-SW_dev_pack-v3.1.zip Trenz Electronic TE0300 software development package:
- package version: 3.1
- Xilinx EDK version: 10.1.01
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TE0300-00-blinker_test.zip Trenz Electronic TE0300-00 blinker test:
- Xilinx ISE version: 9.1.03 to 10.1.02
- language: VHDL
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TE0300-01-SW_dev_pack-v4.0.zip Trenz Electronic TE0300 software development package:
- package version: 4.0
- Xilinx EDK version: 10.1.01
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TE0300-01-SW_dev_pack-v5.0.zip Trenz Electronic TE0300 software development package:
- package version: 5.0
- Xilinx EDK version: 10.1.03
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TE0300-01-SW_dev_pack-v6.01.zip Trenz Electronic TE0300 software development package:
- package version: 6.01
- Xilinx EDK version: 10.1.03 - Xilinx EDK version: 11.2
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TE0300-01-SW_dev_pack-v7.0.zip Trenz Electronic TE0300 software development package:
- package version: 7.0
- Xilinx EDK version: 11.5
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TE0300-01-SW_dev_pack-v8.0.zip Trenz Electronic TE0300 software development package:
- package version: 8.0
- Xilinx EDK version: 12.2
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TE0300-01-blinker_test.zip Trenz Electronic TE0300-01 blinker test:
- Xilinx ISE version: 9.1.03 to 10.1.02
- language: VHDL
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Files TE0300-01-MIG_2.3_v1.0.5747fe6.zip MIG (memory interface generator) Core für Trenz Electronic TE0300-01:
- core version: 2.3
- target FPGA: xc3s1600e-fg320/-4
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TE0300-01-blinker_test-ISE_13.2_v1.0.5747fe6.zip Sample project for a blinking LED on a Trenz Electronic TE0300-01 FPGA module:
- Xilinx ISE version: 13.2
- language: VHDL
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TE0300-01-reference_design-EDK-13.2-v1.0.4831fb3.zip
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TE0300-01-vcom-ISE-13.2-v1.0.4ca6573.zip Virtual COM port example project for Trenz Electronic TE0300-01 FPGA module.
This project implements communication between FPGA and Cypress FX2 USB microcontroller according Cypress application note AN58764:
- Xilinx ISE version: 13.2
- language: VHDL
Size
TE0303 - Prototyping Baseboard for Trenz Electronic TE0300 and TE0630 Micromodules
HW_design - Hardware design resources
Files TE0303.PRJ-Altium.zip Trenz Electronic TE0303 Prototyping Baseboard hardware source files:
- Altium Designer: Project file
- Altium Designer: schematic diagram
- Altium Designer: PCB layout
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REV01
Documents
archive
Files AD-TE0303-00.pdf Assembly diagram
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SCH-TE0303-00.pdf Schematic diagram
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UM-TE0303-00.pdf User manual
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Files AD-TE0303-01.pdf Assembly diagram
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PCN-20220131 TE03XX End of Life.pdf.lnk
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SCH-TE0303-01.pdf Schematic diagram
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UM-TE0303-01.pdf User manual
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pictures
Files TE0303+TE0630.jpg
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TE0303-01.jpg
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TE0304 - Application Baseboard for Trenz Electronic TE0300 and TE0630 Micromodules
HW_design - Hardware design resources
Files TE0304.PRJ-Altium.zip Trenz Electronic TE0304 Application Baseboard hardware source files:
- Altium Designer: schematic diagram
- Altium Designer: PCB layout
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documents
Files AD-TE0304-00.pdf Assembly diagram
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PCN-20220131 TE03XX End of Life.pdf.lnk
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SCH-TE0304-00.pdf Baseboard schematics
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UM-TE0304-00.pdf User Manual for Demo Baseboard
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reference_designs - Software development resources
Files genode-fx.zip Genode FPGA Graphics
http://www.genode-labs.com/products/fpga-graphics
http://sourceforge.net/projects/genode-fx/
About using Genode FX on the Trenz Electronic TE0300 + TE0304 platform
#########################
Trenz Electronic TE0304 + Trenz Electronic TE0300-01B
Trenz Electronic TE0304 + Trenz Electronic TE0300-01BLP
Trenz Electronic TE0304 + Trenz Electronic TE0300-01BM
Trenz Electronic TE0304 + Trenz Electronic TE0300-01BMLP
#########################
For further information, please read
genode-fx/README
Xilinx EDK version: 10.1
Size
TE0320_series - Xilinx Spartan-3A DSP Micromodules with USB 2.0 Microcontroller
TE0320 - Xilinx Spartan-3A DSP Micromodule with USB 2.0 Microcontroller
HW_design - Hardware design resources
Please visit
Files CHC2-80-2-M100-2P.PcbLib.zip Altium Designer library files for obsolete Trenz Electronic TE0320 B2B connector
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CHC2-80-2-M100-2P.lib.zip PCB 3.0 Binary Library file (Protel Advanced PCB Library, version 3.00) for obsolete Trenz Electronic TE0320 B2B connector
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Files PO-TE0320-pinouts+tracelengths.zip Pin-out lists and signal line lengths for Trenz Electronic TE0320 B2B connector
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TE0320-00.LIB-Eagle.zip Trenz Electronic TE0320: module and connectors footprint:
- EAGLE PCB
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TE0320-SmtHeaders.LIB-Altium.zip Altium Designer library files for Trenz Electronic TE0320 B2B connector
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TE0320.3D-STEP.zip Trenz Electronic TE0320 modules:
- 3D STEP (ISO 10303) model
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documents
Files AD-TE0320-00.pdf Assembly diagram
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AN-TE03xx.pdf Application note:
Trenz Electronic TE0300 series and TE0320 series
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PCN-20220131 TE03XX End of Life.pdf
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SCH-TE0320-00-EV01.pdf Schematic diagram
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SCH-TE0320-00-EV02.pdf Schematic diagram
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SCH-TE0320-00.pdf Schematic diagram
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TE0320-iMPACT.avi.zip A bitstream file is uploaded to a Trenz Electronic TE0320 FPGA module with Xilinx iMPACT 10.1.03.
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TE0320-indirectSPI-iMPACT11-5.avi.zip Video: PROM file generation flow and the software flow for indirect ISP (in-system programming) of a Trenz Electronic TE0320 SPI (serial peripheral interface) Flash configuration PROM through the JTAG interface of a Xilinx Spartan-3A DSP FPGA using Xilinx iMPACT 11.5.
http://www.youtube.com/watch?v=607R-yy9cI8
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UM-TE0320.pdf User manual
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pictures
Files TE0320 RGB.jpg
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TE0320-00-EV02_angle.jpg
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TE0320-00-EV02_bottom.jpg
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TE0320-00-EV02_top.jpg
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TE0323+TE0320.jpg
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reference_designs - Software development resources
Please browse our current open software repositories:
GitHub-TE:Trenz Electronic - Trenz Electronic
GitHub-TE-FPGA-TE03XX:TE0300 and TE0320 series - Trenz Electronic
GitHub-TE-FPGA-USB:USB FPGA module series
Files TE0320-00-SW_dev_pack-v1.1.zip Trenz Electronic TE0320 software development package:
- package version: 1.1
- Xilinx EDK version: 11.2
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TE0320-00-SW_dev_pack-v1.2.zip Trenz Electronic TE0320 software development package:
- package version: 1.2
- Xilinx EDK version: 11.3
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TE0320-00-SW_dev_pack-v7.0.zip Trenz Electronic TE0320 software development package:
- package version: 7.0
- Xilinx EDK version: 11.5
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TE0320-00-SW_dev_pack-v8.0.zip Trenz Electronic TE0320 software development package:
- package version: 8.0
- Xilinx EDK version: 12.2
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TE0320-00B-DDR_SDRAM_MPMC.ucf.zip Trenz Electronic TE0320-00B FPGA module user constraint file:
- connection between DDR-SDRAM and MPMC (multi-port memory controller).
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TE0320-00B-v2.2.0.xbd Trenz Electronic TE0320-00B FPGA module: - Xilinx Board Definition file
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Files TE0320-01-vcom-ISE-13.2-v1.0.4ca6573.zip Virtual COM port example project for Trenz Electronic TE0320-01 FPGA module.
This project implements communication between FPGA and Cypress FX2 USB microcontroller according Cypress application note AN58764:
- Xilinx ISE version: 13.2
- language: VHDL
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TE0320-MIG_2.3_v1.0.5747fe6.zip MIG (memory interface generator) Core für Trenz Electronic TE0320:
- core version: 2.3
- target FPGA: xc3sd1800afg676/-4
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TE0320-blinker_test-ISE-13.2-v1.0.5747fe6.zip Sample project for a blinking LED on a Trenz Electronic TE0320 FPGA module:
- Xilinx ISE version: 13.2
- language: VHDL
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TE0320-push_LED-ISE_12-2.zip Sample project testing push buttons and user LEDs of a Trenz Electronic TE0320 FPGA module:
- Xilinx ISE version: 12.2
- language: VHDL
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TE0320-reference-design-EDK-13.2-v1.0.9e3624f.zip
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TE0323 - Prototyping Baseboard for Trenz Electronic TE0320 Micromodules
HW_design - Hardware design resources
Files GB-TE0323-00.zip Trenz Electronic TE0323 Prototyping Baseboard hardware source files:
- Gerber files
- NC (numerical control) drill files
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TE0323-00.PRJ-Altium.zip Trenz Electronic TE0323 Prototyping Baseboard hardware source files:
- Altium Designer: Project files
- Altium Designer: schematic diagram
- Altium Designer: PCB layout
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documents
Files AD-TE0323-00.PDF Assembly diagram
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PCN-20220131 TE03XX End of Life.pdf.lnk
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SCH-TE0323-00.PDF Schematic diagram
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pictures
Files TE0323+TE0320.jpg
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TE0323-angle.jpg
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TE0323-top.jpg
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reference_designs - Software development resources
Files Pmod-MIC.zip This designs connects the user LEDs of the Trenz Electronic TE0320-00-EV02 with the output of the Digilent Pmod-MIC (connector J11 of the Trenz Electronic TE0323-00).
Verified hardware:
- Trenz Electronic TE0323-00
- Trenz Electronic TE0320-00-EV02
- Digilent Pmod-MIC
Compatible hardware (unverified)
- TE0320-00-EV01
Xilinx ISE version: 11.5
Size
TE0630_series - Spartan-6 Micromodules with USB 2.0 Microcontroller
Trenz Electronic TE0630 series is compatible with Trenz Electronic TE0300 series carrier boards and accessories. Please visit
Trenz Electronic TE0630 series is compatible with Trenz Electronic TE0300 series carrier boards and accessories. Please visit
- Please read the Legal Notices before downloading Trenz Electronics documents and files.
-
If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
Size
PCN-20190103 TE0630-01 to TE0630-02 Hardware Revision Change.pdf
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PCN-20200330 TE0630-02 SPI Flash Change.pdf
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PCN-20231006 TE0630-02 to TE0630-03 Hardware Revision Change.pdf
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Other Files (0 Files)
Documents
Files AD-TE0630-00-No-Variants.pdf Assembly diagram
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AD-TE0630-00.PDF
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SCH-TE0630-00.pdf Schematic diagram
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HW_design - Hardware design resources
Please visit
- 3D STEP (ISO 10303) model
Size
REV01
Documents
Files 3DB-TE0630-01.PDF
Size
3DT-TE0630-01.PDF
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AD-TE0630-01.PDF
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AD-TE0630-01I.PDF
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AD-TE0630-01IBF.PDF
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AD-TE0630-01IV.PDF
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SCH-TE0630-01.PDF
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SCH-TE0630-01I.PDF
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SCH-TE0630-01IBF.PDF
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SCH-TE0630-01IV.PDF
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HW_design - Hardware design resources
Please visit
Size
REV02
Documents
Files 3DB-TE0630-02.PDF
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3DT-TE0630-02.PDF
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AD-TE0630-02-52C12-A.PDF
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AD-TE0630-02.PDF
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AD-TE0630-02B-DWS.PDF
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AD-TE0630-02I.PDF
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AD-TE0630-02IBF.PDF
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AD-TE0630-02IBFC1.PDF
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AD-TE0630-02IV-DWS.PDF
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AD-TE0630-02IV.PDF
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AN-TE03xx.pdf Application note:
Trenz Electronic TE0300 series and TE0320 series
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SCH-TE0630-02-52C12-A.PDF
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SCH-TE0630-02.PDF
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SCH-TE0630-02B-DWS.PDF
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SCH-TE0630-02I.PDF
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SCH-TE0630-02IBF.PDF
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SCH-TE0630-02IBFC1.PDF
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SCH-TE0630-02IV-DWS.PDF
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SCH-TE0630-02IV.PDF
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UM-TE0630.pdf User manual
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HW_design - Hardware design resources
Please visit
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REV03
Documents - Technical Reference Manual, Schematics, Assembly Diagrams and ..
- Please read the Legal Notices before downloading Trenz Electronics documents and files.
-
If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
Size
SCH-TE0630-03-52I22-A.PDF
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SCH-TE0630-03-63I12-A.PDF
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SCH-TE0630-03-63I22-A.PDF
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SCH-TE0630-03-82I12-A.PDF
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SCH-TE0630-03-82I22-A.PDF
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Assembly Diagrams (6 Files) AD-TE0630-03-52I12-A.PDF
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AD-TE0630-03-52I22-A.PDF
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AD-TE0630-03-63I12-A.PDF
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AD-TE0630-03-63I22-A.PDF
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AD-TE0630-03-82I12-A.PDF
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AD-TE0630-03-82I22-A.PDF
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3D PDF (2 Files) 3DB-TE0630-03.PDF
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3DT-TE0630-03.PDF
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Other Files (1 Files) HW_design - PCB Design relevant files, like PCB-STEP-Model, Cooler-STEP-Model, Trace-length and ...
- Please read the Legal Notices before downloading Trenz Electronics documents and files.
- Trenz Electronic use STEP-Models from different sources. Depending from model and soldering process the real dimension (especial maximum height) can be vary from the STEP-Models.
-
If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
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Trace Lengths (0 Files) Other Files (0 Files)
archive
REV01
Files TE0303+TE0630.jpg
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TE0630 RGB.jpg
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TE0630 angle.jpg
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TE0630 bottom.jpg
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TE0630 top.jpg
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TE0630-01IV angle.jpg
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TE0630-01IV bottom.jpg
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TE0630-01IV top.jpg
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Files TE0630-02IBF_angle.jpg
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TE0630-02IBF_bottom.jpg
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TE0630-02IBF_top.jpg
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TE0630-02IV_angle.jpg
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TE0630-02IV_bottom.jpg
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TE0630-02IV_top.jpg
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TE0630-02I_angle.jpg
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TE0630-02I_bottom.jpg
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TE0630-02I_top.jpg
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reference_designs - Software development resources
Please browse our current open software repositories:
GitHub-TE:Trenz Electronic - Trenz Electronic
GitHub-TE-FPGA-TE063X:TE0630 series - Trenz Electronic
GitHub-TE-FPGA-USB:USB FPGA modul series
Size
TE0630-reference_design-EDK-13.2-v1.0.4ca0645.zip
Size
TE0630-reference_design-EDK-13.3-v1.0.08a13e2.zip
Size
TE0630-vcom-ISE-13.2-v1.0.d5c0c33.zip Virtual COM port example project for Trenz Electronic TE0630 FPGA module.
This project implements communication between FPGA and Cypress FX2 USB microcontroller according Cypress application note AN58764:
- Xilinx ISE version: 13.2
- language: VHDL
Size
special - form factor, like TE0726, TE0723, TE0722, TE0887, TEM0002 ...
- If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
- If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
- Please read the Legal Notices before downloading Trenz Electronics documents and files.
-
If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
Size
PCN-20230322 TE0722-02 to TE0722-03 Hardware Revision Change.pdf
Size
Other Files (0 Files)
- If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
- Please read the Legal Notices before downloading Trenz Electronics documents and files.
-
If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
Size
Assembly Diagrams (1 Files) AD-TE0722-01.PDF
Size
3D PDF (2 Files) 3DB-TE0722-01.PDF
Size
3DT-TE0722-01.PDF
Size
Other Files (0 Files)
- Please read the Legal Notices before downloading Trenz Electronics documents and files.
-
If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
- Please read the Legal Notices before downloading Trenz Electronics documents and files.
- Trenz Electronic use STEP-Models from different sources. Depending from model and soldering process the real dimension (especial maximum height) can be vary from the STEP-Models.
-
If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
Size
Trace Lengths (0 Files) Other Files (0 Files)
- Please read the Legal Notices before downloading Trenz Electronics documents and files.
-
If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
- If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
- Please read the Legal Notices before downloading Trenz Electronics documents and files.
-
If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
Size
SCH-TE0722-02.PDF
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SCH-TE0722-02I.PDF
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SCH-TE0722-02IC7.PDF
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Assembly Diagrams (4 Files) AD-TE0722-02-07S-1C.PDF
Size
AD-TE0722-02.PDF
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AD-TE0722-02I.PDF
Size
AD-TE0722-02IC7.PDF
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3D PDF (2 Files) 3DB-TE0722-02.PDF
Size
3DT-TE0722-02.PDF
Size
Other Files (0 Files)
- Please read the Legal Notices before downloading Trenz Electronics documents and files.
-
If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
- Please read the Legal Notices before downloading Trenz Electronics documents and files.
- Trenz Electronic use STEP-Models from different sources. Depending from model and soldering process the real dimension (especial maximum height) can be vary from the STEP-Models.
-
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Size
Trace Lengths (0 Files) Altium Project and Libraries (1 Files) AP-TE0722-02.zip
Size
Electronic Design Interchange Format(EDIF) (0 Files) Gerber Files (0 Files) Other Files (0 Files)
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Size
TE0722-02 bottom.jpg
Size
TE0722-02 top.jpg
Size
TE0722-02-07S-1C angle.jpg
Size
TE0722-02-07S-1C bottom.jpg
Size
TE0722-02-07S-1C top.jpg
Size
TE0722-02I angle.jpg
Size
TE0722-02I bottom.jpg
Size
TE0722-02I top.jpg
Size
REV04 - PCB Revision: Schematics, AD, STEP, HW Design Files and more ...
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-
If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
Size
SCH-TE0722-04-41C-4-A.PDF
Size
SCH-TE0722-04-41C-4-B.PDF
Size
SCH-TE0722-04-41I-4-A.PDF
Size
SCH-TE0722-04-41I-4-D.PDF
Size
Assembly Diagrams (5 Files) AD-TE0722-04-11C-4-A.PDF
Size
AD-TE0722-04-41C-4-A.PDF
Size
AD-TE0722-04-41C-4-B.PDF
Size
AD-TE0722-04-41I-4-A.PDF
Size
AD-TE0722-04-41I-4-D.PDF
Size
3D PDF (2 Files) 3DB-TE0722-04-No Variations.PDF
Size
3DT-TE0722-04-No Variations.PDF
Size
Other Files (1 Files) Firmware - Initial Configuration for diverse PCB components, like CPLD, PLL and ...
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- Please read the Legal Notices before downloading Trenz Electronics documents and files.
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Trace Lengths (0 Files) Altium Project and Libraries (0 Files) Electronic Design Interchange Format(EDIF) (0 Files) Gerber Files (0 Files) Other Files (0 Files)
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test_board - DDR Less Zynq Basis-System
Short Description:
Attention: Xilinx FSBL must be modified, otherwise the module could not be reprogrammed!
More information on DDR less ZYNQ Design.
Excerpt of special Block-Design components/interfaces:
Component | Description |
---|---|
Zynq PL | DDR deactivated |
Xilinx IPs | AXI GPIO, AXI Uart Lite |
Additional Software Application for SDK/HSI and Linux:
Application | Description |
---|---|
zynq_fsbl | Zynq First Stage Bootloader with modification for "DDR Less Zynq" |
Additional content in the larger ZIP with prebuilt-folders:
File | File-Extension | Description |
---|---|---|
Bin-File | *.bin | Flash Configuration File with Boot-Image (Zynq-FPGAs) |
Bit-File | *.bit | FPGA Configuration File |
Software-Application-File | *.elf | Software Application for Zynq or MicroBlaze Processor Systems |
Hardware-Platform-Specification-Files | *.hdf | Hardware Specification from the vivado project. Used in SDK/HSI |
BIF-File | *.bif | File with description to generate Bin-File |
Diverse Reports | -- | Report files in different formats |
Size
TE0722-test_board_noprebuilt-vivado_2016.1-build_02_20160525120603.zip
Size
2016.2
test_board - TE0722 DDR Less Zynq Basis-System
TE0722 DDR Less Zynq Basis-System
-Downloadable files are located below the description-
Attention: Xilinx FSBL must be modified, otherwise the module could not be reprogrammed!
More information on DDR less ZYNQ Design.
Component | Description |
---|---|
PS-MIOs | activated:I2C1,UART0,GPIO,SD0,QSPI |
Xilinx-IP | AXI GPIO, AXI Uart Lite |
Application | Description |
---|---|
zynq_fsbl | Zynq First Stage Bootloader with modification for "DDR Less Zynq" |
Name | Folder | Description |
---|
File | File-Extension | Description |
---|---|---|
BIF-File | *.bif | File with description to generate Bin-File |
BIN-File | *.bin | Flash Configuration File with Boot-Image (Zynq-FPGAs) |
BIT-File | *.bit | FPGA Configuration File |
DebugProbes-File | *.ltx | Definition File for Vivado/Vivado Labtools Debugging Interface |
Diverse Reports | --- | Report files in different formats |
Hardware-Platform-Specification-Files | *.hdf | Exported Vivado Hardware Specification for SDK/HSI |
LabTools Project-File | *.lpr | Vivado Labtools Project File |
Software-Application-File | *.elf | Software Application for Zynq or MicroBlaze Processor Systems |
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Size
Reference Design - Source Code and Configuration Files (1 Files) te0722-test_board-vivado_2016.2-build_04_20160714114758.zip
Size
Other Files (0 Files)
test_board - TE0722 DDR Less Zynq Basis-System
TE0722 DDR Less Zynq Basis-System
-Downloadable files are located below the description-
Attention: Xilinx FSBL must be modified, otherwise the module could not be reprogrammed!
More information on DDR less ZYNQ Design.
Component | Description |
---|---|
PS-MIOs | activated:I2C1,UART0,GPIO,SD0,QSPI |
Xilinx-IP | AXI GPIO, AXI Uart Lite |
Application | Description |
---|---|
zynq_fsbl | Zynq First Stage Bootloader with modification for "DDR Less Zynq" |
Name | Folder | Description |
---|
File | File-Extension | Description |
---|---|---|
BIF-File | *.bif | File with description to generate Bin-File |
BIN-File | *.bin | Flash Configuration File with Boot-Image (Zynq-FPGAs) |
BIT-File | *.bit | FPGA Configuration File |
DebugProbes-File | *.ltx | Definition File for Vivado/Vivado Labtools Debugging Interface |
Diverse Reports | --- | Report files in different formats |
Hardware-Platform-Specification-Files | *.hdf | Exported Vivado Hardware Specification for SDK/HSI |
LabTools Project-File | *.lpr | Vivado Labtools Project File |
Software-Application-File | *.elf | Software Application for Zynq or MicroBlaze Processor Systems |
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Size
Reference Design - Source Code and Configuration Files (1 Files) te0722-test_board-vivado_2016.4-build_06_20170412163635.zip
Size
Other Files (0 Files)
test_board - TE0722 DDR Less Zynq Basis-System
TE0722 DDR Less Zynq Basis-System
-Downloadable files are located below the description-
Attention: Xilinx FSBL must be modified, otherwise the module could not be reprogrammed!
More information on DDR less ZYNQ Design.
XMOD delivers max. 100mA, it's not recommended to use it for power supply. Launch:
- Connect XMOD (see Wiki).
- Power On Module.
- Program QSPI Flash with Boot.bin (<design_name>/prebuilt/boot_images/<short dir>/u-boot).
- Windows: Open Serial Console (e.g. putty):COM Port(see device manager), Speed(115200).
- Linux: Open Serial Console (e.g. minicom):COM Port(dmesg |grep tty) UART is *USB1, Speed(115200).
- Soft reboot with Vivado HW-Manager.
Component | Description |
---|---|
PS-MIOs | I2C1,UART0,GPIO,SD0,QSPI |
Xilinx-IP | AXI GPIO, AXI Uart Lite |
Application | Description |
---|---|
zynq_fsbl | TE modified Zynq FSBL for DDR less Zynq (template in subfolder sw_lib) |
Name | Folder | Description |
---|---|---|
FSBL Template | <design_name>/sw_lib/ | Modified FSBL Template for SDK/HSI |
File | File-Extension | Description |
---|---|---|
BIF-File | *.bif | File with description to generate Bin-File |
BIN-File | *.bin | Flash Configuration File with Boot-Image (Zynq-FPGAs) |
BIT-File | *.bit | FPGA Configuration File |
Diverse Reports | --- | Report files in different formats |
Hardware-Platform-Specification-Files | *.hdf | Exported Vivado Hardware Specification for SDK/HSI |
LabTools Project-File | *.lpr | Vivado Labtools Project File |
Software-Application-File | *.elf | Software Application for Zynq or MicroBlaze Processor Systems |
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Size
Reference Design - Source Code and Configuration Files (1 Files) te0722-test_board-vivado_2017.1-build_03_20170705125922.zip
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Other Files (0 Files)
test_board - TE0722 DDR Less FSBL Example
TE0722 DDR Less FSBL Example
-Downloadable files are located below the description-
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Size
Reference Design - Source Code and Configuration Files (1 Files) TE0722-test_board-vivado_2018.2-build_02_20180815123557.zip
Size
Reference Design - Documentation (1 Files) TE0722-test_board-vivado_2018.2-build_02-v5.pdf
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Other Files (0 Files)
test_board - TE0722 DDR Less FSBL Example
TE0722 DDR Less FSBL Example
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Size
Reference Design - Source Code and Configuration Files (1 Files) TE0722-test_board-vivado_2018.3-build_05_20190522113216.zip
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Reference Design - Documentation (0 Files) Other Files (0 Files)
test_board - TE0722 DDR Less FSBL Example
TE0722 DDR Less FSBL Example
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Size
Reference Design - Source Code and Configuration Files (1 Files) TE0722-test_board-vivado_2019.2-build_10_20200416064756.zip
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Reference Design - Documentation (0 Files) Other Files (1 Files) 2021.2
test_board - TE0722 DDR Less FSBL Example
TE0722 DDR Less FSBL Example
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Size
Reference Design - Source Code and Configuration Files (1 Files) TE0722-test_board-vivado_2021.2-build_20_20230214143311.zip
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Reference Design - Documentation (0 Files) Other Files (1 Files) 2023.2
test_board - TE0722 DDR Less FSBL Example
TE0722 DDR Less FSBL Example
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Size
Reference Design - Source Code and Configuration Files (1 Files) TE0722-test_board-vivado_2023.2-build_4_20240325150206.zip
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Reference Design - Documentation (0 Files) Other Files (0 Files)
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PCN-20210132 TE0723-03 DDR3 Change and Product Update-v4-02_16_2021.pdf
Size
Other Files (0 Files)
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-
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Size
SCH-TE0723-02C.PDF
Size
SCH-TE0723-02C1.PDF
Size
SCH-TE0723-02M.PDF
Size
Assembly Diagrams (5 Files) AD-TE0723-02.PDF
Size
AD-TE0723-02C.PDF
Size
AD-TE0723-02C1.PDF
Size
AD-TE0723-02FULL.PDF
Size
AD-TE0723-02M.PDF
Size
3D PDF (2 Files) 3DB-TE0723-02.PDF
Size
3DT-TE0723-02.PDF
Size
Other Files (0 Files)
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-
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Size
Trace Lengths (0 Files) Other Files (1 Files)
- document type: EAGLE SYSTEM
- source: community contribution
- includes also TE0741 library
Community contributions are provided "as is", without any express or implied warranty. Trenz Electronic encourages anyone to share and improve its EDA (electronic design automation) part library collection.
Size
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-
If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
Size
TE0723-02M bottom.jpg
Size
TE0723-02M top.jpg
Size
REV03 - PCB Revision: Schematics, AD, STEP, HW Design Files and more ...
- If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
- Please read the Legal Notices before downloading Trenz Electronics documents and files.
-
If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
Size
SCH-TE0723-03-11C64-A.PDF
Size
SCH-TE0723-03-41C64-A.PDF
Size
SCH-TE0723-03.PDF
Size
SCH-TE0723-03C1.PDF
Size
SCH-TE0723-03M.PDF
Size
Assembly Diagrams (6 Files) AD-TE0723-03-07S-1C.PDF
Size
AD-TE0723-03-11C64-A.PDF
Size
AD-TE0723-03-41C64-A.PDF
Size
AD-TE0723-03.PDF
Size
AD-TE0723-03C1.PDF
Size
AD-TE0723-03M.PDF
Size
3D PDF (2 Files) 3DB-TE0723-03.PDF
Size
3DT-TE0723-03.PDF
Size
Other Files (1 Files) HW_Design - PCB Design relevant files, like PCB-STEP-Model, Cooler-STEP-Model, Trace-length and ...
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- Trenz Electronic use STEP-Models from different sources. Depending from model and soldering process the real dimension (especial maximum height) can be vary from the STEP-Models.
-
If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
Size
Trace Lengths (0 Files) Other Files (1 Files)
- document type: EAGLE SYSTEM
- source: community contribution
- includes also TE0741 library
Community contributions are provided "as is", without any express or implied warranty. Trenz Electronic encourages anyone to share and improve its EDA (electronic design automation) part library collection.
Size
- Please read the Legal Notices before downloading Trenz Electronics documents and files.
-
If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
Size
TE0723-03-07S-1C bottom.jpg
Size
TE0723-03-07S-1C top.jpg
Size
TE0723-03-11C64-A angle.jpg
Size
TE0723-03-11C64-A bottom.jpg
Size
TE0723-03-11C64-A top.jpg
Size
TE0723-03-41C64-A angle.jpg
Size
TE0723-03-41C64-A bottom.jpg
Size
TE0723-03-41C64-A top.jpg
Size
TE0723-03M angle.jpg
Size
TE0723-03M bottom.jpg
Size
TE0723-03M top.jpg
Size
Reference_Design - FPGA Design Examples for different Vivado Versions
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test_board - Zynq Basic-System
Short Description:
Excerpt of special Block-Design components/interfaces:
Component | Description |
---|---|
Zynq Processor | activated MIO-Interfaces: DDR3, QSPI,2x Uart,I2C, SD,USB |
Additional Software Application for SDK/HSI and Linux:
Application | Description |
---|---|
zynq_fsbl | Zynq First Stage Bootloader |
hello_world | Xilinx Hello World Example |
Additional content in the larger ZIP with prebuilt-folders:
File | File-Extension | Description |
---|---|---|
Bin-File | *.bin | Flash Configuration File with Boot-Image (Zynq-FPGAs) |
Bit-File | *.bit | FPGA Configuration File |
Software-Application-File | *.elf | Software Application for Zynq or MicroBlaze Processor Systems |
Hardware-Platform-Specification-Files | *.hdf | Hardware Specification from the vivado project. Used in SDK/HSI |
BIF-File | *.bif | File with description to generate Bin-File |
Diverse Reports | -- | Report files in different formats |
Size
TE0723-test_board_noprebuilt-vivado_2015.4-build_32_20160504143019.zip
Size
2016.2
te0723_m_sdsoc - TE0723-M SDSoC
TE0723-M SDSoC
-Downloadable files are located below the description-
Short Description:
TE SDSoC User Guide is available on:SDSoC Projects.
The SDSoC project is available as separate ZIP (te0723_m_sdsoc.zip) or can be created from reference design.
Currently supported Xilinx SDSoC Examples:
- Matrix Multiplication (area reduced) – Standalone/Linux
- Matrix Multiplication Data Size (area reduced) - Standalone/Linux
- Pipelined Matrix Multiplication (area reduced) - Linux
- Matrix Multiplication and Addition (area reduced) - Standalone/Linux
- Color Space Conversion - RGB/HSV) - Standalone/Linux
- Synthesizeable FIR Filter) - Standalone/Linux
- File IO Video Processing - Linux
Size
SDSoC Reference Design to create SDSoC Platform (1 Files) te0723-te0723_m_sdsoc-vivado_2016.2-build_09_20170310193227.zip
Size
Other Files (0 Files)
TE0723 Zynq PS
-Downloadable files are located below the description-
Component | Description |
---|---|
PS-MIOs | activated: QSPI, I2C0 UART0, UART1, GPIO, SD1, USB0 |
Application | Description |
---|---|
zynq_fsbl | Zynq First Stage Bootloader |
hello_world | Xilinx Hello World Example (ps7_uart_0 (JTAG USB)) |
Name | Folder | Description |
---|
File | File-Extension | Description |
---|---|---|
Bin-File | *.bin | Flash Configuration File with Boot-Image (Zynq-FPGAs) |
BIT-File | *.bit | FPGA Configuration File |
Software-Application-File | *.elf | Software Application for Zynq or MicroBlaze Processor Systems |
Hardware-Platform-Specification-Files | *.hdf | Exported Vivado Hardware Specification for SDK/HSI |
BIF-File | *.bif | File with description to generate Bin-File |
Diverse Reports | -- | Report files in different formats |
- Please read the Legal Notices before downloading Trenz Electronic documents and files.
Size
te0723-test_board_noprebuilt-vivado_2016.2-build_09_20170310193121.zip
Size
2016.4
test_board - TE0723 Zynq PS
TE0723 Zynq PS
-Downloadable files are located below the description-
Note: Boot.bin für Zynq 7000S was generated with Bootgen from 17.1, sources are from 16.4.
Currently implemented:
- USB
- Copy image.ub (<design_name>/prebuilt/os/petalinux/<short dir or default>) on SD
- Power on PCB.
- Configure Flash with Boot.bin (<design_name>/prebuilt/boot_images/<short dir>/u-boot) .
- Insert SD-Card in SD-Slot.
- Power OFF/ON or reboot.
- Windows: Open Serial Console (e.g. putty):COM Port(see device manager), Speed(115200).
- Linux: Open Serial Console (e.g. minicom):COM Port(dmesg |grep tty) UART is *USB1, Speed(115200).
Note: Only for assembly options with 128MB DDR: Netstart address is not correct Workaround:
- Boot only Uboot and stop autoboot from image.ub
- To load image type: mmcinfo && fatload mmc 0 0x4000000 ${kernel_img}
- To Boot image type: bootm 0x4000000
Component | Description |
---|---|
PS-MIOs | QSPI, I2C0, UART0, UART1, GPIO, SD1, USB0 |
Application | Description |
---|---|
zynq_fsbl | default Xilinx FSBL |
u-boot | Petalinux-Uboot (image.ub in <design_name>/prebuilt/os/petalinux/<short dir or default>) |
Name | Folder | Description |
---|---|---|
PetaLinux Project | <design_name>/os/petalinux | PetaLinux Project with SD,USB |
File | File-Extension | Description |
---|---|---|
BIF-File | *.bif | File with description to generate Bin-File |
BIN-File | *.bin | Flash Configuration File with Boot-Image (Zynq-FPGAs) |
BIT-File | *.bit | FPGA Configuration File |
Diverse Reports | --- | Report files in different formats |
Hardware-Platform-Specification-Files | *.hdf | Exported Vivado Hardware Specification for SDK/HSI |
LabTools Project-File | *.lpr | Vivado Labtools Project File |
OS-Image | *.ub | Image with Linux Kernel (On Petalinux optional with Devicetree and RAM-Disk) |
Software-Application-File | *.elf | Software Application for Zynq or MicroBlaze Processor Systems |
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Size
Reference Design - Source Code and Configuration Files (1 Files) te0723-test_board-vivado_2016.4-build_08_20170718120015.zip
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Other Files (0 Files)
test_board - TE0723 Basic Linux Example
TE0723 Basic Linux Example
-Downloadable files are located below the description-
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Size
Reference Design - Source Code and Configuration Files (1 Files) te0723-test_board-vivado_2017.4-build_11_20180911144828.zip
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Reference Design - Documentation (0 Files) Other Files (0 Files)
test_board - TE0723 Basic Linux Example
TE0723 Basic Linux Example
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Size
Reference Design - Source Code and Configuration Files (1 Files) TE0723-test_board-vivado_2018.3-build_02_20190314070455.zip
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Reference Design - Documentation (0 Files) Other Files (0 Files)
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PCN-20230619 TE0726-03 to TE0726-04 Hardware Revision Change.pdf
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Other Files (0 Files)
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Size
SCH-TE0726-02M.PDF
Size
Assembly Diagrams (2 Files) AD-TE0726-02.PDF
Size
AD-TE0726-02M.PDF
Size
3D PDF (2 Files) 3DB-TE0726-02.PDF
Size
3DT-TE0726-02.PDF
Size
Other Files (0 Files)
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Source Code of CPLD Firmware (1 Files) SC-PRJ-TE0726-03_SC0726-01_20170302.zip
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Other Files (0 Files)
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Trace Lengths (0 Files) Other Files (0 Files)
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TE0726-02M bottom.jpg
Size
TE0726-02M top.jpg
Size
REV03 - PCB Revision: Schematics, AD, STEP, HW Design Files and more ...
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If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
Size
Schematics (11 Files) SCH-TE0726-03-07S-1C.PDF
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SCH-TE0726-03-11C64-A.PDF
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SCH-TE0726-03-41C64-A.PDF
Size
SCH-TE0726-03-41C74-Q.PDF
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SCH-TE0726-03-41C74-R.PDF
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SCH-TE0726-03-41I64-A.PDF
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SCH-TE0726-03.PDF
Size
SCH-TE0726-03IM.PDF
Size
SCH-TE0726-03M.PDF
Size
SCH-TE0726-03R.PDF
Size
SCH-TE0726-03RJ.PDF
Size
Assembly Diagrams (11 Files) AD-TE0726-03-07S-1C.PDF
Size
AD-TE0726-03-11C64-A.PDF
Size
AD-TE0726-03-41C64-A.PDF
Size
AD-TE0726-03-41C74-Q.PDF
Size
AD-TE0726-03-41C74-R.PDF
Size
AD-TE0726-03-41I64-A.PDF
Size
AD-TE0726-03.PDF
Size
AD-TE0726-03IM.PDF
Size
AD-TE0726-03M.PDF
Size
AD-TE0726-03R.PDF
Size
AD-TE0726-03RJ.PDF
Size
3D PDF (2 Files) 3DB-TE0726-03.PDF
Size
3DT-TE0726-03.PDF
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Other Files (1 Files) Firmware - Initial Configuration for diverse PCB components, like CPLD, PLL and ...
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Source Code of CPLD Firmware (1 Files) SC-PRJ-TE0726-03_SC0726-01_20170302.zip
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STP-TE0726-03R.zip
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Trace Lengths (0 Files) Other Files (0 Files)
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TE0726-03-07S-1C bottom.jpg
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TE0726-03-07S-1C top.jpg
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TE0726-03M angle.jpg
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TE0726-03M bottom.jpg
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TE0726-03M top.jpg
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TE0726-03R bottom.jpg
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TE0726-03R top.jpg
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TE0726-03R_angle.jpg
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Reference_Design - FPGA Design Examples for different Vivado Versions
- If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
Debian_8.4 - Jessie
- Overwrite SD-Card with image from SD_Image folder. Use Win32 Disk Imager .
- Copy SD-Content on the first partition of the sd-card.
- Configure Flash with Boot.bin from Flash folder.
Short Description:
Excerpt of special Block-Design components/interfaces:
Component | Description |
---|---|
Zynq Processor | activated MIO-Interfaces: DDR3, QSPI,Uart,I2C,SD,USB |
HDMI System | Video to HDMI |
IP RPI GPIO | Raspberry PI GPIO |
Additional Software Application for SDK/HSI and Linux:
Application | Description |
---|---|
zynq_fsbl | Zynq First Stage Bootloader |
hello_world | Xilinx Hello World Example (use ps7_uart_1 in SDK!) |
display_test | HDMI test image activation and Uart message (use ps7_uart_1 in SDK!) |
Additional content in the larger ZIP with prebuilt-folders:
File | File-Extension | Description |
---|---|---|
Bin-File | *.bin | Flash Configuration File with Boot-Image (Zynq-FPGAs) |
Bit-File | *.bit | FPGA Configuration File |
Software-Application-File | *.elf | Software Application for Zynq or MicroBlaze Processor Systems |
Hardware-Platform-Specification-Files | *.hdf | Hardware Specification from the vivado project. Used in SDK/HSI |
BIF-File | *.bif | File with description to generate Bin-File |
Diverse Reports | -- | Report files in different formats |
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TE0726-hdmi_fb_noprebuilt-vivado_2015.4-build_32_20160504103310.zip
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rpi_hw_ips - Zynq RPi-Hardware Design
Short Description:
Project contains a PetaLinux Project (for Linux!) in "<design_name>/os/petalinux/" . See PetaLinux KICKstart.
Connector Pinout Viewer/XDC-Generator available on TE Master Pinout.
Attention: This example design is only for TE0726-02M Module! Not all cores are activated on prebuilt PetaLinux image
Excerpt of special Block-Design components/interfaces:
Component | Description |
---|---|
Zynq PS | activated MIO-Interfaces: I2C, Uart, SD, USB, Flash |
TE-IPs | axi_reg32_1.0,axis_audio_pwm_1.0, axis_fb_conv_1.0, axis_raw_demosaic_1.0, axis_raw_unpack_1.0, axis_video_resize_1.0, csi_to_axis_1.0, csi2_d_phy_rx_1.0, csi2_rx_phy, i2s_to_pwm_1.0, Video_IO_2_HDMI_TMDS_1.0(Modified Xilinx IP) |
Digilent IPs | axi_i2s_adi_1.2 |
Additional Software Application for SDK/HSI and Linux:
Application | Description |
---|---|
zynq_fsbl | Zynq First Stage Bootloader (Modified for VDMA) |
hello_world | Xilinx Hello World Example |
u-boot | Petalinux-Uboot (UN:root,PW:root) (image.ub in prebuilt-folder,ex.:/os/petalinux/TE0726-02M) |
Additional content in the larger ZIP with prebuilt-folders:
File | File-Extension | Description |
---|---|---|
Bin-File | *.bin | Flash Configuration File with Boot-Image (Zynq-FPGAs) |
Bit-File | *.bit | FPGA Configuration File |
Software-Application-File | *.elf | Software Application for Zynq or MicroBlaze Processor Systems |
Hardware-Platform-Specification-Files | *.hdf | Hardware Specification from the vivado project. Used in SDK/HSI |
BIF-File | *.bif | File with description to generate Bin-File |
OS-Image | *.ub | Image with Linux Kernel (On Petalinux optional with Devicetree and RAM-Disk) |
Diverse Reports | -- | Report files in different formats |
Size
TE0726-rpi_hw_ips_noprebuilt-vivado_2015.4-build_34_20160602111438.zip
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test_board - Zynq Basic-System
Short Description:
SDSoC Export available:
Attention: SDSOC Project is Beta Version. Xilinx "Matrix Multiplication Demo" is included as standalone example.
The SDSoC project is as separate ZIP (TE0726_SDSoc_test_board_vivado_2015.4.zip) available or can be created from reference design.
Instruction install Zip SDSoc:
- unzip the TE0726_2M_SDSoc_test_board_vivado_2015.4.zip in "<Xilinx SDSoc path>/platforms"
- open SDSoC
- Click "Create SDSoC Project"
- Set Project Name
- Set Platform: test_board
- Click "Finished"
- Requirements:
- VIVADO 2015.4
- SDSoC 2015.4
- 7-ZIP
- Enable SDSOC and set 7-ZIP path in: "design_basic_settings.cmd"
- Create Project:run "vivado_create_project_guimode.cmd"
- VIVADO:
- TCL-Console type:TE::ADV::beta_util_sdsoc_project
- Wait for project creation: SDSOC Project createtd on subfodler <design_name>/sdsoc
- TCL-Console type:TE::ADV::beta_util_sdsoc_project -start_sdsoc
- SDSoC will be started
- SDSOC:
- Click "Create SDSoC Project"
- Set Project Name
- Set Platform: Others (Path to Project is: <design_name>/sdsoc/<design_name>)
- Set OS: Standalone
- Click "Next"
- Set template application
- Click "Finished"
- SDSOC-Project is generated.
Excerpt of special Block-Design components/interfaces:
Component | Description |
---|---|
Zynq Processor | activated MIO-Interfaces: DDR3, QSPI, Uart, I2C,SD |
Additional Software Application for SDK/HSI and Linux:
Application | Description |
---|---|
zynq_fsbl | Zynq First Stage Bootloader |
hello_world | Xilinx Hello World Example (use ps7_uart_1 in SDK!) |
u-boot | Petalinux-Uboot (image.ub in prebuilt-folder,ex.:/os/petalinux/) |
Additional content in the larger ZIP with prebuilt-folders:
File | File-Extension | Description |
---|---|---|
Bin-File | *.bin | Flash Configuration File with Boot-Image (Zynq-FPGAs) |
Bit-File | *.bit | FPGA Configuration File |
Software-Application-File | *.elf | Software Application for Zynq or MicroBlaze Processor Systems |
Hardware-Platform-Specification-Files | *.hdf | Hardware Specification from the vivado project. Used in SDK/HSI |
BIF-File | *.bif | File with description to generate Bin-File |
OS-Image | *.ub | Image with Linux Kernel (On Petalinux optional with Devicetree and RAM-Disk) |
Diverse Reports | -- | Report files in different formats |
Size
TE0726-test_board_noprebuilt-vivado_2015.4-build_35_20160714104005.zip
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TE0726_2M_SDSoc_test_board_vivado_2015.4.zip
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2016.2
te0726_m_demo1 - ZynqBerry - Demo VIDEO/AUDIO Design with RPI video camera stream to monitor
ZynqBerry - Demo VIDEO/AUDIO Design with RPI video camera stream to monitor
-Downloadable files are located below the description-
Requirements:
- TE0726_xM Module
- Raspberry Pi Camera Rev 1.3
- Configure FPGA-Flash with Boot.bin
- Copy image.ub, init.sh, u-boot.rgba on SD
- Connect Monitor with HDMI
- Reboot
- 1.After U-Boot start:U-Boot-Startscreen
- 2.After Linux start: Camera-Frames
- 3.Login
Component | Description |
---|---|
PS-MIOs | activated: I2C, Uart, SD, USB, Flash |
TE-IP | axi_reg32_1.0,axis_audio_pwm_1.0, axis_fb_conv_1.0, axis_raw_demosaic_1.0, axis_raw_unpack_1.0, axis_video_resize_1.0, csi_to_axis_1.0, csi2_d_phy_rx_1.0, csi2_rx_phy, i2s_to_pwm_1.0, Video_IO_2_HDMI_TMDS_1.0(Modified Xilinx IP) |
Digilent-IP | axi_i2s_adi_1.2 |
XILINX-IP | AXI VDMA, AXI Strem Data Fifo, MMCM |
Application | Description |
---|---|
zynq_fsbl | Zynq First Stage Bootloader (Modified for VDMA, fsbl_hooks.c camera frame buffer address selectable) |
hello_world | Xilinx Hello World Example |
u-boot | Petalinux-Uboot (UN:root,PW:root) (image.ub in prebuilt-folder,ex.:/os/petalinux/te0726_m) |
Name | Folder | Description |
---|---|---|
PetaLinux Project | <design_name>/os/petalinux | PetaLinux Project |
RGBA Images Converter | <design_name>/misc/img | Python Script+Batch File, as well as RGBA and PNG files |
Camera Init-Script | <design_name>/misc/sd_init_script | Camera init.sh script for SD-Card |
File | File-Extension | Description |
---|---|---|
Bin-File | *.bin | Flash Configuration File with Boot-Image (Zynq-FPGAs) |
BIT-File | *.bit | FPGA Configuration File |
Software-Application-File | *.elf | Software Application for Zynq or MicroBlaze Processor Systems |
Hardware-Platform-Specification-Files | *.hdf | Exported Vivado Hardware Specification for SDK/HSI |
BIF-File | *.bif | File with description to generate Bin-File |
OS-Image | *.ub | Image with Linux Kernel (On Petalinux optional with Devicetree and RAM-Disk) |
Diverse Reports | -- | Report files in different formats |
- Please read the Legal Notices before downloading Trenz Electronic documents and files.
Size
te0726-te0726_m_demo1_noprebuilt-vivado_2016.2-build_07_20161017094731.zip
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te0726_m_demo2 - ZynqBerry - Demo VIDEO/AUDIO Design with Debian_8.4
ZynqBerry - Demo VIDEO/AUDIO Design with Debian_8.4
-Downloadable files are located below the description-
Requirements:
- TE0726_xM Module
- Configure FPGA-Flash with Boot.bin
- Overwrite SD-Card with image from \prebuilt\debian folder. Use Win32 Disk Imager .
- Copy u-boot.rgba and image.ub from prebuilt\os\petalinux\te0726_m folder on the first partition of the sd-card.
- Connect Monitor with HDMI
- Reboot
- 1.After U-Boot start:U-Boot-Startbild
- 2. Connect to ZynqBerry via Serial Console
- 3.After Linux start login and type "startx" to start GUI
Component | Description |
---|---|
PS-MIOs | activated: I2C, Uart, SD, USB, Flash |
TE-IP | axi_reg32_1.0,axis_audio_pwm_1.0, axis_fb_conv_1.0, axis_raw_demosaic_1.0, axis_raw_unpack_1.0, axis_video_resize_1.0, csi_to_axis_1.0, csi2_d_phy_rx_1.0, csi2_rx_phy, i2s_to_pwm_1.0, Video_IO_2_HDMI_TMDS_1.0(Modified Xilinx IP) |
Digilent-IP | axi_i2s_adi_1.2 |
XILINX-IP | AXI VDMA, AXI Strem Data Fifo, MMCM |
Application | Description |
---|---|
zynq_fsbl | Zynq First Stage Bootloader (Modified for VDMA, fsbl_hooks.c camera frame buffer address selectable) |
hello_world | Xilinx Hello World Example |
u-boot | Petalinux-Uboot (UN:root,PW:root) (image.ub in prebuilt-folder,ex.:/os/petalinux/te0726_m) |
Name | Folder | Description |
---|---|---|
PetaLinux Project | <design_name>/os/petalinux | PetaLinux Project |
RGBA Images Converter | <design_name>/misc/img | Python Script+Batch File, as well as RGBA and PNG files |
Debian Shell Script | <design_name>/os/petalinux | Script to generate Debian SD-Image(see readme.txt) |
File | File-Extension | Description |
---|---|---|
Bin-File | *.bin | Flash Configuration File with Boot-Image (Zynq-FPGAs) |
BIT-File | *.bit | FPGA Configuration File |
Software-Application-File | *.elf | Software Application for Zynq or MicroBlaze Processor Systems |
Hardware-Platform-Specification-Files | *.hdf | Exported Vivado Hardware Specification for SDK/HSI |
BIF-File | *.bif | File with description to generate Bin-File |
OS-Image | *.ub | Image with Linux Kernel (On Petalinux optional with Devicetree and RAM-Disk) |
Diverse Reports | -- | Report files in different formats |
Debian SD-Image | *.img | Debian Image for SD-Card |
- Please read the Legal Notices before downloading Trenz Electronic documents and files.
Size
te0726-te0726_m_demo2_noprebuilt-vivado_2016.2-build_07_20161017094944.zip
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te0726_m_demo3 - ZynqBerry - Demo VIDEO/AUDIO Design with Video and Audio Example
ZynqBerry - Demo VIDEO/AUDIO Design with Video and Audio Example
-Downloadable files are located below the description-
Requirements:
- TE0726_xM Module
- *.wav file or other APLAY supported formats for audio example (Based on APLAY binary - prebuilt from alsa-utils package (crosscompile for PetaLinux). Arecord is symbolic link to aplay.)
- *.divx file or other FFMPEG/mplayer supported formats for video example (Based on FFMPEG/mplayer binary prebuild for petalinux.). Framebuffer is fix to 1280x720. No sound is available for FFMPEG.
- DivX Examples are available on www.divx.com .
- Configure FPGA-Flash with Boot.bin
- Copy image.ub, ffmpeg/mplayer Dateien, u-boot.rgba and Video or Audio Files on SD
- Connect Monitor with HDMI
- Reboot
- 1.After U-Boot start:U-Boot-Startbild
- 2. Login
- 3. Audio Example (Audio record):
- Connect Y-type audio cabel to ZynqBerry.
- Connect pink 3.5mm input connector to signal source.
- Type on Console: arecord --duration=5 --format=S16_LE --rate=8000 /media/<Filename>.wav
- 4. Audio Example (Audio play):
- Connect headphones to green connector of Y-type audio cable or directly to Zynqberry.
- Type on Console: aplay /media/<Filename>.wav
- 5. Video Example (Video Demo with FFMPEG):
- Type on Console: play /media/<Filename>.divx
- 6. Video Example (Video Demo with mplayer):
- Type on Console: mplayer /media/<Filename>.divx
Component | Description |
---|---|
PS-MIOs | activated: I2C, Uart, SD, USB, Flash |
TE-IP | axi_reg32_1.0,axis_audio_pwm_1.0, axis_fb_conv_1.0, axis_raw_demosaic_1.0, axis_raw_unpack_1.0, axis_video_resize_1.0, csi_to_axis_1.0, csi2_d_phy_rx_1.0, csi2_rx_phy, i2s_to_pwm_1.0, Video_IO_2_HDMI_TMDS_1.0(Modified Xilinx IP) |
Digilent-IP | axi_i2s_adi_1.2 |
XILINX-IP | AXI VDMA, AXI Strem Data Fifo, MMCM |
Application | Description |
---|---|
zynq_fsbl | Zynq First Stage Bootloader (Modified for VDMA, fsbl_hooks.c camera frame buffer address selectable) |
hello_world | Xilinx Hello World Example |
u-boot | Petalinux-Uboot (UN:root,PW:root) (image.ub in prebuilt-folder,ex.:/os/petalinux/te0726_m) |
Name | Folder | Description |
---|---|---|
PetaLinux Project | <design_name>/os/petalinux | PetaLinux Project |
RGBA Images Converter | <design_name>/misc/img | Python Script+Batch File, as well as RGBA and PNG files |
FFMPEG | <design_name>/misc/ffmpeg | Files for SD |
mplayer | <design_name>/misc/mplayer | Files for SD |
File | File-Extension | Description |
---|---|---|
Bin-File | *.bin | Flash Configuration File with Boot-Image (Zynq-FPGAs) |
BIT-File | *.bit | FPGA Configuration File |
Software-Application-File | *.elf | Software Application for Zynq or MicroBlaze Processor Systems |
Hardware-Platform-Specification-Files | *.hdf | Exported Vivado Hardware Specification for SDK/HSI |
BIF-File | *.bif | File with description to generate Bin-File |
OS-Image | *.ub | Image with Linux Kernel (On Petalinux optional with Devicetree and RAM-Disk) |
Diverse Reports | -- | Report files in different formats |
- Please read the Legal Notices before downloading Trenz Electronic documents and files.
Size
te0726-te0726_m_demo3_noprebuilt-vivado_2016.2-build_07_20161019121625.zip
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te0726_m_sdsoc - TE0726-M SDSoC
TE0726-M SDSoC
-Downloadable files are located below the description-
Short Description:
TE SDSoC User Guide is available on:SDSoC Projects.
The SDSoC project is available as separate ZIP (te0726_m_sdsoc.zip) or can be created from reference design.
Currently supported Xilinx SDSoC Examples:
- Matrix Multiplication (area reduced) – Standalone/Linux
- Matrix Multiplication Data Size (area reduced) - Standalone/Linux
- Pipelined Matrix Multiplication (area reduced) - Linux
- Matrix Multiplication and Addition (area reduced) - Standalone/Linux
- Color Space Conversion - RGB/HSV) - Standalone/Linux
- Synthesizeable FIR Filter) - Standalone/Linux
- File IO Video Processing - Linux
Size
SDSoC Reference Design to create SDSoC Platform (1 Files) te0726-te0726_m_sdsoc-vivado_2016.2-build_07_20161014120716.zip
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Other Files (0 Files)
TE0726 Test Board
-Downloadable files are located below the description-
General Hints:
- ps7_uart_1 is UART via JTAG-USB. SDK-BSP must be modify manual.
- Write Linux Boot.bin into Flash and image.ub will be load from SD via U-Boot.
Component | Description |
---|---|
PS-MIOs | active:QSPI, USB0, SD0, SD1, UART0, UART1, I2C0, I2C1, SPI0, SPI1, GPIO |
TE-IP | pinmux control (Beta), rpi_gpio_v1_0 (Beta) |
Application | Description |
---|---|
Hello TE0726 | Hello ZynqBerry Console Example Hello ZynqBerry Console Example (print output as loop) |
u-boot | Petalinux-Uboot (image.ub in prebuilt-folder,ex.:/os/petalinux/default) |
Name | Folder | Description |
---|---|---|
Source Name | <design_name><folder> | Source Description |
PetaLinux Project | <design_name>/os/petalinux | PetaLinux Projekt (RPI-GPIO-IP modification: system-top.dts (uart alias for correct uart usage), platform-top.h (U-Boot settings for sd usage) ) |
File | File-Extension | Description |
---|---|---|
Bin-File | *.bin | Flash Configuration File with Boot-Image (Zynq-FPGAs) |
BIT-File | *.bit | FPGA Configuration File |
Software-Application-File | *.elf | Software Application for Zynq or MicroBlaze Processor Systems |
Hardware-Platform-Specification-Files | *.hdf | Exported Vivado Hardware Specification for SDK/HSI |
BIF-File | *.bif | File with description to generate Bin-File |
OS-Image | *.ub | Image with Linux Kernel (On Petalinux optional with Devicetree and RAM-Disk) |
Diverse Reports | -- | Report files in different formats |
- Please read the Legal Notices before downloading Trenz Electronic documents and files.
Size
te0726-test_board_noprebuilt-vivado_2016.2-build_07_20160927155803.zip
Size
2016.4
test_board - TE0726 Zynq PS
TE0726 Zynq PS
-Herunterladbaren Dateien befinden sich unterhalb der Beschreibung-
Note: Boot.bin für Zynq 7000S was generated with Bootgen from SDK 2017.1, sources are from Vivado/SDK/PetaLinux 2016.4.
Currently implemented:
- USB
- ETH
- Copy image.ub (<design_name>/prebuilt/os/petalinux/<short dir or default>)
- Power on PCB.
- Configure Flash with Boot.bin (<design_name>/prebuilt/boot_images/<short dir>/u-boot) .
- Insert SD-Card in SD-Slot.
- Power OFF/ON or reboot.
- Windows: Open Serial Console (e.g. putty):COM Port(see device manager), Speed(115200).
- Linux: Open Serial Console (e.g. minicom):COM Port(dmesg |grep tty) UART is *USB1, Speed(115200).
Komponente | Beschreibung |
---|---|
PS-MIOs | QSPI, DDR, I2C1, UART1, GPIO, SD1, USB0 |
Anwendung | Beschreibung |
---|---|
zynq_fsbl | Default Xilinx FSBL |
hello_te0726 | Hello TE0726 as endless loop (template in sobfolder sw_lib) |
u-boot | Petalinux-Uboot (image.ub in <design_name>/prebuilt/os/petalinux/<short dir or default>) |
Name | Ordner | Beschreibung |
---|---|---|
hello_te0726 | <design_name>/sw_lib/ | Modified Hello World Template for SDK/HSI |
PetaLinux Project | <design_name>/os/petalinux | PetaLinux Projekt mit SD,USB, ETH over USB |
Dateien | Datei-Endung | Beschreibung |
---|---|---|
BIF-File | *.bif | Datei mit Beschreibung für die Bin-File Generierung |
BIN-File | *.bin | Flash Konfigurationsdatei mit Boot-Image (Zynq-FPGAs) |
BIT-File | *.bit | FPGA Konfigurationsdatei |
Diverse Reports | --- | Report-Dateien in verschiedenen Formaten |
Hardware-Platform-Specification-Files | *.hdf | Exportierte Vivado Hardware Specification für SDK/HSI |
LabTools Project-File | *.lpr | Vivado Labtools Projekt Datei |
OS-Image | *.ub | Image mit Linux Kernel (enthält für Petalinux optional auch Devicetree und RAM-Disk) |
Software-Application-File | *.elf | Software Anwendung für Zynq oder MicroBlaze Processor Systeme |
- Bitte lesen Sie die rechtlichen Notes , bevor Sie die Dokumente und Dateien von Trenz Electronic herunterladen
Size
Reference Design - Source Code and Configuration Files (1 Files) te0726-test_board-vivado_2016.4-build_08_20170519161338.zip
Size
Other Files (0 Files)
zynqberrydemo1 - ZynqBerry - Demo VIDEO/AUDIO Design with RPI video camera stream to monitor
ZynqBerry - Demo VIDEO/AUDIO Design with RPI video camera stream to monitor
-Downloadable files are located below the description-
Requirements:
- TE0726_xM or TE0726_x7S Module
- Raspberry Pi Camera Rev 1.3 or Camera Rev 2.1
- Camera Rev 2.1: Not complete stable.
- Copy image.ub (<design_name>/prebuilt/os/petalinux/<short dir or default>), init.sh (<design_name>/misc/sd_script/), u-boot.rgba (<design_name>/misc/img/) on SD-Card.
- Insert SD-Card in SD-Slot.
- Connect Monitor with HDMI.
- Power on Module (connect with JTAG USB (2.0 or higher)).
- Configure FPGA-Flash with Boot.bin (<design_name>/prebuilt/boot_images/<short dir>/u-boot).
- Reboot.
- Windows: Open Serial Console (e.g. putty):COM Port(see device manager), Speed(115200).
- Linux: Open Serial Console (e.g. minicom):COM Port(dmesg |grep tty) UART is *USB1, Speed(115200).
- U-Boot-Startscreen (u-boot.rgba) after U-Boot boot, Camera-Frames after Linux initialisation (init.sh)
Component | Description |
---|---|
PS-MIOs | QSPI, DDR3, I2C0, I2C1, UART1, GPIO, SD1, USB0 |
Xilinx-IP | AXI Stream Fifo,AXI VDMA, MMCM |
TE-IP | axi_reg32_1.0,axis_audio_pwm_1.0, axis_fb_conv_1.0, axis_raw_demosaic_1.0, axis_raw_unpack_1.0, axis_to_i2s_1.0, axis_video_dwidth_converter_1.0, axis_video_resize_1.0, csi_to_axis_1.0, csi2_d_phy_rx_1.0, i2s_to_pwm_1.0, Video_IO_2_HDMI_TMDS_1.0 |
Digilent-IP | axi_i2s_adi_1.2 |
Application | Description |
---|---|
zynq_fsbl | TE modified Zynq FSBL for Frame Buffer Address |
u-boot | Petalinux-Uboot (image.ub in <design_name>/prebuilt/os/petalinux/<short dir or default>) |
Name | Folder | Description |
---|---|---|
FSBL Template | <design_name>/sw_lib/ | Modified FSBL Template for SDK/HSI |
PetaLinux Project | <design_name>/os/petalinux | PetaLinux Project with I2C,ETH,SD,USB |
RGBA Images Converter | <design_name>/misc/img | Python Script+Batch File, as well as RGBA and PNG files |
Camera Init-Script | <design_name>/misc/img | Camera init.sh script for SD-Card |
File | File-Extension | Description |
---|---|---|
BIF-File | *.bif | File with description to generate Bin-File |
BIN-File | *.bin | Flash Configuration File with Boot-Image (Zynq-FPGAs) |
BIT-File | *.bit | FPGA Configuration File |
Diverse Reports | --- | Report files in different formats |
Hardware-Platform-Specification-Files | *.hdf | Exported Vivado Hardware Specification for SDK/HSI |
LabTools Project-File | *.lpr | Vivado Labtools Project File |
OS-Image | *.ub | Image with Linux Kernel (On Petalinux optional with Devicetree and RAM-Disk) |
Software-Application-File | *.elf | Software Application for Zynq or MicroBlaze Processor Systems |
- Please read the Legal Notices before downloading Trenz Electronics documents and files.
Size
Reference Design - Source Code and Configuration Files (1 Files) te0726-zynqberrydemo1-vivado_2017.1-build_03_20170705132546.zip
Size
Other Files (0 Files)
ZynqBerry - Demo VIDEO/AUDIO Design with Debian_8.4 32Bit Example
-Downloadable files are located below the description-
Debian image is not prepared for camera usage.
Requirements:
- TE0726_xM or TE0726_x7S Module
- (optional) Raspberry Pi Camera Rev 1.3 or Camera Rev 2.1
- Camera Rev 2.1: Not complete stable.
- Overwrite SD-Card with image from \prebuilt\debian folder. Use Win32 Disk Imager .
- Copy image.ub (<design_name>/prebuilt/os/petalinux/<short dir or default>), u-boot.rgba (<design_name>/misc/img/) on SD-Card.
- Insert SD-Card in SD-Slot.
- Connect Monitor with HDMI.
- Connect Keyboard and Mouse to USB connector.
- Connect Ethernet cable to ETH connector.
- Power on Module (connect with JTAG USB (2.0 or higher)).
- Configure FPGA-Flash with Boot.bin (<design_name>/prebuilt/boot_images/<short dir>/u-boot).
- Reboot.
- Windows: Open Serial Console (e.g. putty):COM Port(see device manager), Speed(115200).
- Linux: Open Serial Console (e.g. minicom):COM Port(dmesg |grep tty) UART is *USB1, Speed(115200).
- U-Boot-Startscreen (u-boot.rgba) after U-Boot boot.
- Debian GUI:
- After Linux login type "startx&" to start GUI.
Component | Description |
---|---|
PS-MIOs | QSPI, DDR3, I2C0, I2C1, UART1, GPIO, SD1, USB0 |
Xilinx-IP | AXI Stream Fifo,AXI VDMA, MMCM |
TE-IP | axi_reg32_1.0,axis_audio_pwm_1.0, axis_fb_conv_1.0, axis_raw_demosaic_1.0, axis_raw_unpack_1.0, axis_to_i2s_1.0, axis_video_dwidth_converter_1.0, axis_video_resize_1.0, csi_to_axis_1.0, csi2_d_phy_rx_1.0, i2s_to_pwm_1.0, Video_IO_2_HDMI_TMDS_1.0 |
Digilent-IP | axi_i2s_adi_1.2 |
Application | Description |
---|---|
zynq_fsbl | TE modified Zynq FSBL for Frame Buffer Address |
u-boot | Petalinux-Uboot (image.ub in <design_name>/prebuilt/os/petalinux/<short dir or default>) |
Name | Folder | Description |
---|---|---|
FSBL Template | <design_name>/sw_lib/ | Modified FSBL Template for SDK/HSI |
PetaLinux Project | <design_name>/os/petalinux | PetaLinux Project with I2C,ETH,SD,USB and script to generate debian image |
RGBA Images Converter | <design_name>/misc/img | Python Script+Batch File, as well as RGBA and PNG files |
Debian SD-Image | <design_name>/prebuilt/os/debian/debian | Debian Image for SD-Card |
File | File-Extension | Description |
---|---|---|
BIF-File | *.bif | File with description to generate Bin-File |
BIN-File | *.bin | Flash Configuration File with Boot-Image (Zynq-FPGAs) |
BIT-File | *.bit | FPGA Configuration File |
Debian SD-Image | *.img | Debian Image for SD-Card |
Diverse Reports | --- | Report files in different formats |
Hardware-Platform-Specification-Files | *.hdf | Exported Vivado Hardware Specification for SDK/HSI |
LabTools Project-File | *.lpr | Vivado Labtools Project File |
OS-Image | *.ub | Image with Linux Kernel (On Petalinux optional with Devicetree and RAM-Disk) |
Software-Application-File | *.elf | Software Application for Zynq or MicroBlaze Processor Systems |
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Reference Design - Source Code and Configuration Files (1 Files) te0726-zynqberrydemo2-vivado_2017.1-build_03_20170705132647.zip
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Other Files (0 Files)
ZynqBerry - Demo VIDEO/AUDIO Design with Video and Audio Example
-Downloadable files are located below the description-
Requirements:
- TE0726_xM or TE0726_x7S Module
- (optional for screenshots) Raspberry Pi Camera Rev 1.3 or Camera Rev 2.1
- Camera Rev 2.1: Not complete stable.
- Copy image.ub (<design_name>/prebuilt/os/petalinux/<short dir or default>), init.sh (<design_name>/misc/sd_script/), u-boot.rgba (<design_name>/misc/img/) on SD-Card.
- Insert SD-Card in SD-Slot.
- Connect Monitor with HDMI.
- Power on Module (connect with JTAG USB (2.0 or higher)).
- Configure FPGA-Flash with Boot.bin (<design_name>/prebuilt/boot_images/<short dir>/u-boot).
- Reboot.
- Windows: Open Serial Console (e.g. putty):COM Port(see device manager), Speed(115200).
- Linux: Open Serial Console (e.g. minicom):COM Port(dmesg |grep tty) UART is *USB1, Speed(115200).
- U-Boot-Startscreen (u-boot.rgba) after U-Boot boot.
- Audio Example (Audio play):
- Connect headphones to green connector of Y-type audio cable or directly to Zynqberry.
- Type on Console: aplay /media/<Filename>.wav or other aplay supported format.
- Video Example (Video Demo with mplayer):
- Type on Console: mplayer /media/<Filename>.divx or other mplayer supported format.
- Camera Screenshot:
- Create picture: fbgrab -d /dev/fb1 /srv/www/camera.png
- Display Screenshot Webbrowser: http://<ZynqBerry IP>/camera.png
Component | Description |
---|---|
PS-MIOs | QSPI, DDR3, I2C0, I2C1, UART1, GPIO, SD1, USB0 |
Xilinx-IP | AXI Stream Fifo,AXI VDMA, MMCM |
TE-IP | axi_reg32_1.0,axis_audio_pwm_1.0, axis_fb_conv_1.0, axis_raw_demosaic_1.0, axis_raw_unpack_1.0, axis_to_i2s_1.0, axis_video_dwidth_converter_1.0, axis_video_resize_1.0, csi_to_axis_1.0, csi2_d_phy_rx_1.0, i2s_to_pwm_1.0, Video_IO_2_HDMI_TMDS_1.0 |
Digilent-IP | axi_i2s_adi_1.2 |
Application | Description |
---|---|
zynq_fsbl | TE modified Zynq FSBL for Frame Buffer Address |
u-boot | Petalinux-Uboot (image.ub in <design_name>/prebuilt/os/petalinux/<short dir or default>) |
Name | Folder | Description |
---|---|---|
FSBL Template | <design_name>/sw_lib/ | Modified FSBL Template for SDK/HSI |
PetaLinux Project | <design_name>/os/petalinux | PetaLinux Project with I2C,ETH,SD,USB |
RGBA Images Converter | <design_name>/misc/img | Python Script+Batch File, as well as RGBA and PNG files |
Camera Init-Script | <design_name>/misc/img | Camera init.sh script for SD-Card |
File | File-Extension | Description |
---|---|---|
BIF-File | *.bif | File with description to generate Bin-File |
BIN-File | *.bin | Flash Configuration File with Boot-Image (Zynq-FPGAs) |
BIT-File | *.bit | FPGA Configuration File |
Diverse Reports | --- | Report files in different formats |
Hardware-Platform-Specification-Files | *.hdf | Exported Vivado Hardware Specification for SDK/HSI |
LabTools Project-File | *.lpr | Vivado Labtools Project File |
OS-Image | *.ub | Image with Linux Kernel (On Petalinux optional with Devicetree and RAM-Disk) |
Software-Application-File | *.elf | Software Application for Zynq or MicroBlaze Processor Systems |
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Size
Reference Design - Source Code and Configuration Files (1 Files) te0726-zynqberrydemo3-vivado_2017.1-build_03_20170705132813.zip
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test_board - TE0726 Basic Linux Example
TE0726 Basic Linux Example
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Reference Design - Source Code and Configuration Files (1 Files) te0726-test_board-vivado_2017.4-build_08_20180517084735.zip
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Reference Design - Documentation (0 Files) Other Files (0 Files)
test_board - TE0726 Basic Linux Example
TE0726 Basic Linux Example
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Reference Design - Source Code and Configuration Files (1 Files) te0726-test_board-vivado_2018.2-build_02_20180713155535.zip
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Reference Design - Documentation (0 Files) Other Files (0 Files)
ZynqBerry Demo VIDEO/AUDIO Design with RPI video camera stream to monitor
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Reference Design - Source Code and Configuration Files (1 Files) te0726-zynqberrydemo1-vivado_2018.2-build_03_20181120163939.zip
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Reference Design - Documentation (0 Files) Other Files (0 Files)
ZynqBerry Demo VIDEO/AUDIO Design with Video and Audio Example
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Reference Design - Source Code and Configuration Files (1 Files) te0726-zynqberrydemo3-vivado_2018.2-build_04_20190212141216.zip
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test_board - TE0726 Basic Linux Example
TE0726 Basic Linux Example
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Reference Design - Source Code and Configuration Files (1 Files) te0726-test_board-vivado_2018.3-build_10_20191211160314.zip
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Reference Design - Documentation (1 Files) te0726-test_board-vivado_2018.3-build_10-v12.pdf
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ZynqBerry Demo VIDEO/AUDIO Design with RPI video camera stream to monitor
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Reference Design - Source Code and Configuration Files (1 Files) te0726-zynqberrydemo1-vivado_2018.3-build_10_20200113150016.zip
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Reference Design - Documentation (1 Files) te0726-zynqberrydemo1-vivado_2018.3-build_10_v14.pdf
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ZynqBerry Demo VIDEO/AUDIO Design with Debian
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Reference Design - Source Code and Configuration Files (1 Files) te0726-zynqberrydemo2-vivado_2018.3-build_10_20200113155211.zip
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Reference Design - Documentation (1 Files) te0726-zynqberrydemo2-vivado_2018.3-build_10_-v2.pdf
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Other Files (1 Files) zynqberrydemo3 - VIDEO/AUDIO Design with video and audio example
ZynqBerry Demo VIDEO/AUDIO Design with video and audio example
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Reference Design - Source Code and Configuration Files (1 Files) te0726-zynqberrydemo3-vivado_2018.3-build_10_20200114090815.zip
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Reference Design - Documentation (1 Files) te0726-zynqberrydemo3-vivado_2018.3-build_10-v11.pdf
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test_board - TE0726 Basic Linux Example
TE0726 Basic Linux Example
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Reference Design - Source Code and Configuration Files (1 Files) TE0726-test_board-vivado_2019.2-build_10_20200408185804.zip
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Reference Design - Documentation (1 Files) TE0726-test_board-vivado_2019.2-build_10-v.17-08_25_2021.pdf
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ZynqBerry Demo VIDEO/AUDIO Design with RPI video camera stream to monitor
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Reference Design - Source Code and Configuration Files (1 Files) TE0726-zynqberrydemo1-vivado_2019.2-build_10_20200408190958.zip
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Reference Design - Documentation (0 Files) Other Files (1 Files) zynqberrydemo2 - VIDEO/AUDIO Design with Debian
ZynqBerry Demo VIDEO/AUDIO Design with Debian
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Reference Design - Source Code and Configuration Files (1 Files) TE0726-zynqberrydemo2-vivado_2019.2-build_8_20200325081634.zip
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Reference Design - Documentation (0 Files) Other Files (2 Files)
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te0726-ubuntu.zip
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ZynqBerry Demo VIDEO/AUDIO Design with video and audio example
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Reference Design - Source Code and Configuration Files (1 Files) TE0726-zynqberrydemo3-vivado_2019.2-build_8_20200325081946.zip
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Jupyter Notebook Demo
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Reference Design - Source Code and Configuration Files (1 Files) TE0726-zynqberrydemo4-vivado_2019.2-build_12_20200528081042.zip
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Reference Design - Documentation (0 Files) Other Files (0 Files)
test_board - TE0726 Basic Linux Example
TE0726 Basic Linux Example
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Reference Design - Source Code and Configuration Files (1 Files) TE0726-test_board-vivado_2020.2-build_8_20211104085759.zip
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Reference Design - Documentation (0 Files) Other Files (0 Files)
ZynqBerry Demo VIDEO/AUDIO Design with RPI video camera stream to monitor
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Reference Design - Source Code and Configuration Files (1 Files) TE0726-zynqberrydemo1-vivado_2020.2-build_9_20220223125446.zip
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Reference Design - Documentation (1 Files) TE0726-zynqberrydemo1-vivado_2020.2-build_9_v.27-01_17_2024.pdf
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zynqberrydemo1 - VIDEO/AUDIO Design with RPI video camera stream to monitor
ZynqBerry Demo VIDEO/AUDIO Design with RPI video camera stream to monitor
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Reference Design - Source Code and Configuration Files (1 Files) TE0726-zynqberrydemo1-vivado_2022.2-build_9_20240118115537.zip
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Reference Design - Documentation (0 Files) Other Files (0 Files)
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SCH-TE0887-02M.PDF
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Assembly Diagrams (2 Files) AD-TE0887-02.PDF
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AD-TE0887-02M.PDF
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TE0887-02 bottom.jpg
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TE0887-02 top.jpg
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REV03 - PCB Revision: Schematics, AD, STEP, HW Design Files and more ...
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SCH-TE0887-03M.PDF
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Assembly Diagrams (2 Files) AD-TE0887-03.PDF
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AD-TE0887-03M.PDF
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3D PDF (2 Files) 3DB-TE0887-03.PDF
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3DT-TE0887-03.PDF
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Trace Lengths (0 Files) Other Files (0 Files)
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TE0887-03M_bottom.jpg
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TE0887-03M_top.jpg
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Reference_Design - Design Examples
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PCN-20220706 TEM0002 End of Life.pdf
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SCH-TEM0002-02-010CA.PDF
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Assembly Diagrams (2 Files) AD-TEM0002-02-010C.PDF
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AD-TEM0002-02-010CA.PDF
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3D PDF (2 Files) 3DB-TEM0002-02.PDF
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3DT-TEM0002-02.PDF
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TEM0002-02-010C_angle.jpg
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TEM0002-02-010C_bottom.jpg
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Reference_Design - FPGA Design Examples for Libero SoC Design Suite
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Files Smartberry_Webserver_Demo.zip
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Smartberry_Webserver_Demo_User_Guide.pdf
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LibroSoCv12.4
Webserver_DEMO1 - TEM0002 Webserver Demo1
TEM0002 Webserver Demo1
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Reference Design - Documentation (0 Files) Other Files (0 Files)
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Assembly Diagrams (1 Files) AD-TE0889-01.PDF
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3D PDF (2 Files) 3DB-TE0889-01.PDF
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3DT-TE0889-01.PDF
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TE0889-01_bottom.jpg
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TE0889-01_top.jpg
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REV02 - PCB Revision: Schematics, AD, STEP, HW Design Files and more ...
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Assembly Diagrams (1 Files) AD-TE0889-02.PDF
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3D PDF (0 Files) Other Files (0 Files)
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TE0889-02 bottom.jpg
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TE0889-02 top.jpg
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REV03 - PCB Revision: Schematics, AD, STEP, HW Design Files and more ...
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Assembly Diagrams (1 Files) AD-TE0889-03.PDF
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3D PDF (3 Files) 3DB-TE0889-03.PDF
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3DT-TE0889-03.PDF
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PDF3D-TE0889-03.PDF
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TE0889-03 bottom.jpg
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TE0889-03 top.jpg
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Motherboards_and_Carriers - standalone carrier boards with FPGA/SoC device
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AVN-20220701.1 TEB0911 readback FAN Sense does not work.pdf
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PCN-20200121 TEB0911-04-_ SO-DIMM Socket Change-v4-20200121_1437.pdf
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PCN-20210621 TEB0911-04 eMMC Change and Product Update.pdf
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SCH-TEB0911-02-ZU9ES.PDF
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Assembly Diagrams (2 Files) AD-TEB0911-02-ZU9EG1E.PDF
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AD-TEB0911-02-ZU9ES.PDF
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3D PDF (2 Files) 3DB-TEB0911-02.PDF
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SC-PGM-TEB0911-020304_SC0911-04_20181206.zip
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SC-PGM-TEB0911-02_SC0911-02_20170918.zip
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SC-PRJ-TEB0911-020304_SC0911-03_20181119.zip
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SC-PRJ-TEB0911-020304_SC0911-04_20181206.zip
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SC-PRJ-TEB0911-02_SC0911-02_20170918.zip
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Files[-] Close all Programming files of CPLD Firmware (1 Files) SC-PGM-TEB0911-020304_SC0911-05_20190910.zip
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Source Code of CPLD Firmware (1 Files) SC-PRJ-TEB0911-020304_SC0911-05_20190910.zip
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SCH-TEB0911-03-ZU9ES.PDF
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Assembly Diagrams (2 Files) AD-TEB0911-03-ZU9EG1E.PDF
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AD-TEB0911-03-ZU9ES.PDF
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3D PDF (2 Files) 3DB-TEB0911-03.PDF
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3DT-TEB0911-03.PDF
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Files SC-PGM-TEB0911-020304_SC0911-03_20181119.zip
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SC-PGM-TEB0911-020304_SC0911-04_20181206.zip
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SC-PGM-TEB0911-03_SC0911-02_20170918.zip
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SC-PRJ-TEB0911-020304_SC0911-03_20181119.zip
Size
SC-PRJ-TEB0911-020304_SC0911-04_20181206.zip
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SC-PRJ-TEB0911-03_SC0911-02_20170918.zip
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Files[-] Close all Programming files of CPLD Firmware (1 Files) SC-PGM-TEB0911-020304_SC0911-05_20190910.zip
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Source Code of CPLD Firmware (1 Files) SC-PRJ-TEB0911-020304_SC0911-05_20190910.zip
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Other Files (0 Files)
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Schematics (8 Files) SCH-TEB0911-04-9BEX1FA.PDF
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SCH-TEB0911-04-9BEX1MA.PDF
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SCH-TEB0911-04-BBEX1FA.PDF
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SCH-TEB0911-04-BBEX1MA.PDF
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SCH-TEB0911-04-ZU15EGA.PDF
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SCH-TEB0911-04-ZU15EGE.PDF
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SCH-TEB0911-04-ZU9EG1A.PDF
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SCH-TEB0911-04-ZU9EG1E.PDF
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Assembly Diagrams (8 Files) AD-TEB0911-04-9BEX1FA.PDF
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AD-TEB0911-04-9BEX1MA.PDF
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AD-TEB0911-04-BBEX1FA.PDF
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AD-TEB0911-04-BBEX1MA.PDF
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AD-TEB0911-04-ZU15EGA.PDF
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AD-TEB0911-04-ZU15EGE.PDF
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AD-TEB0911-04-ZU9EG1A.PDF
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AD-TEB0911-04-ZU9EG1E.PDF
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3D PDF (2 Files) 3DB-TEB0911-04.PDF
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3DT-TEB0911-04.PDF
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Files SC-PGM-TEB0911-020304_SC0911-03_20181119.zip
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SC-PGM-TEB0911-020304_SC0911-04_20181206.zip
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SC-PRJ-TEB0911-020304_SC0911-03_20181119.zip
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SC-PRJ-TEB0911-020304_SC0911-04_20181206.zip
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Files[-] Close all Programming files of CPLD Firmware (1 Files) SC-PGM-TEB0911-020304_SC0911-05_20190910.zip
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Source Code of CPLD Firmware (1 Files) SC-PRJ-TEB0911-020304_SC0911-05_20190910.zip
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TEB0911-04-9BEX1FA_top.jpg
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Reference_Design - FPGA Design Examples for different Vivado Versions
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test_board - TEB0911 UltraScale+ ZynqMP Basic-System
TEB0911 UltraScale+ ZynqMP Basic-System
-Downloadable files are located below the description-
Currently implemented:
- Ethernet
- USB
- PCIe
- Copy image.ub (<design_name>/prebuilt/os/petalinux/<short dir or default>) and Boot.bin (<design_name>/prebuilt/boot_images/<short dir>/u-boot) on SD-Card.
- Set Boot Mode to SD-Boot.
- Insert SD-Card in SD-Slot.
- Power on carrier.
- UART over XMOD on J35.
- Windows: Open Serial Console (e.g. putty):COM Port(see device manager), Speed(115200).
- Linux: Open Serial Console (e.g. minicom):COM Port(dmesg |grep tty) UART is *USB1, Speed(115200).
- FPGA JTAG over XMOD on J24.
- Open Vivado Hardware Manager with auto connect.
- Use probe specification from prebuilt folder (*.ltx).
- Add VIO signals to dashboard.
- Set radix to unsigned integer.
Component | Description |
---|---|
PS-MIOs | QSPI, GEM3(Ethernet), USB0, SD0, SD1, I2C0, UART0, PCIe, Display Port, DDR4 SoDIMM(4Gb,1 Rank (KVR21S15S8/4)) |
Xilinx-IP | VIO |
TE-IP | labtools_fmeter |
Application | Description |
---|---|
zynqmp_fsbl | TE modified Zynq FSBL for SI5338 and SI5345 Configuration (template in subfolder sw_lib) |
u-boot | Petalinux-Uboot (image.ub in <design_name>/prebuilt/os/petalinux/<short dir or default>) |
Name | Folder | Description |
---|---|---|
SI5338 Project | <design_name>/misc/si5338/ | Clock Builder Desktop Project, with all CLKs enabled. |
SI5345 Project | <design_name>/misc/si5345/ | Clock Builder Pro Project, with all CLKs enabled. |
FSBL Template | <design_name>/sw_lib/ | Modified FSBL Template for SDK/HSI |
PetaLinux Project | <design_name>/os/petalinux | PetaLinux Project with I2C,ETH0,SD,USB,PCIe |
File | File-Extension | Description |
---|---|---|
BIF-File | *.bif | File with description to generate Bin-File |
BIN-File | *.bin | Flash Configuration File with Boot-Image (Zynq-FPGAs) |
BIT-File | *.bit | FPGA Configuration File |
DebugProbes-File | *.ltx | Definition File for Vivado/Vivado Labtools Debugging Interface |
Diverse Reports | --- | Report files in different formats |
Hardware-Platform-Specification-Files | *.hdf | Exported Vivado Hardware Specification for SDK/HSI |
LabTools Project-File | *.lpr | Vivado Labtools Project File |
OS-Image | *.ub | Image with Linux Kernel (On Petalinux optional with Devicetree and RAM-Disk) |
Software-Application-File | *.elf | Software Application for Zynq or MicroBlaze Processor Systems |
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Reference Design - Source Code and Configuration Files (1 Files) TEB0911-test_board-vivado_2016.4-build_07_20170509114816.zip
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Other Files (0 Files)
test_board - TEB0911 UltraScale+ ZynqMP Basic-System
TEB0911 UltraScale+ ZynqMP Basic-System
-Downloadable files are located below the description-
Currently implemented:
- Ethernet
- USB
- PCIe
- SODIMM Memory
- Memory settings must be modified, if other memory is used.
- Assembly TEB0911_EG_1E
- Board Part Files only beta version
- Copy image.ub (<design_name>/prebuilt/os/petalinux/<short dir or default>) and Boot.bin (<design_name>/prebuilt/boot_images/<short dir>/u-boot) on SD-Card.
- Set Boot Mode to SD-Boot.
- Insert SD-Card in SD-Slot.
- Power on carrier.
- FPGA JTAG over XMOD on J24.
- UART over XMOD on J35 (CPLD) on PCB REV01 and J24 (FPGA) on PCB REV02.
- Windows: Open Serial Console (e.g. putty):COM Port(see device manager), Speed(115200).
- Linux: Open Serial Console (e.g. minicom):COM Port(dmesg |grep tty) UART is *USB1, Speed(115200).
- Open Vivado Hardware Manager with auto connect.
- Use probe specification from prebuilt folder (*.ltx).
- Add VIO signals to dashboard.
- Set radix to unsigned integer.
Component | Description |
---|---|
PS-MIOs | QSPI, GEM3(Ethernet), USB0, SD0, SD1, I2C0, UART0, PCIe, Display Port, DDR4 SoDIMM(4Gb,1 Rank (KVR24S17S8/8)) |
Xilinx-IP | VIO |
TE-IP | labtools_fmeter |
Application | Description |
---|---|
zynqmp_fsbl | TE modified Zynq FSBL for SI5338 and SI5345 Configuration (template in subfolder sw_lib) |
hello_world | Xilinx Hello World Example |
u-boot | Petalinux-Uboot (image.ub in <design_name>/prebuilt/os/petalinux/<short dir or default>) |
Name | Folder | Description |
---|---|---|
SI5338 Project | <design_name>/misc/si5338/ | Clock Builder Desktop Project, with all CLKs enabled. |
SI5345 Project | <design_name>/misc/si5345/ | Clock Builder Pro Project, with all CLKs enabled. |
FSBL Template | <design_name>/sw_lib/ | Modified FSBL Template for SDK/HSI |
PetaLinux Project | <design_name>/os/petalinux | PetaLinux Project with I2C,ETH0,SD,USB,PCIe |
File | File-Extension | Description |
---|---|---|
BIF-File | *.bif | File with description to generate Bin-File |
BIN-File | *.bin | Flash Configuration File with Boot-Image (Zynq-FPGAs) |
BIT-File | *.bit | FPGA Configuration File |
DebugProbes-File | *.ltx | Definition File for Vivado/Vivado Labtools Debugging Interface |
Diverse Reports | --- | Report files in different formats |
Hardware-Platform-Specification-Files | *.hdf | Exported Vivado Hardware Specification for SDK/HSI |
LabTools Project-File | *.lpr | Vivado Labtools Project File |
OS-Image | *.ub | Image with Linux Kernel (On Petalinux optional with Devicetree and RAM-Disk) |
Software-Application-File | *.elf | Software Application for Zynq or MicroBlaze Processor Systems |
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Reference Design - Source Code and Configuration Files (1 Files) TEB0911-test_board-vivado_2017.1-build_04_20170817081653.zip
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Other Files (0 Files)
test_board - TEB0911 Basic Design
TEB0911 Basic Design
-Downloadable files are located below the description-
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Size
Reference Design - Source Code and Configuration Files (1 Files) TEB0911-test_board-vivado_2018.2-build_03_20181126132607.zip
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Reference Design - Documentation (0 Files) Other Files (0 Files)
test_board - TEB0911 Basic Design
TEB0911 Basic Design
-Downloadable files are located below the description-
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Reference Design - Source Code and Configuration Files (1 Files) TEB0911-test_board-vivado_2019.2-build_12_20200603131549.zip
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Reference Design - Documentation (0 Files) Other Files (0 Files)
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Assembly Diagrams (1 Files) AD-TEB0912-02-ABI21-A.PDF
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3D PDF (0 Files) Other Files (0 Files)
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Other Files (0 Files)
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REV03 - PCB Revision: Schematics, AD, STEP, HW Design Files and more ...
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Assembly Diagrams (1 Files) AD-TEB0912-03-ABI21-A.PDF
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3D PDF (2 Files) 3DB-TEB0912-03-ABI21-A.PDF
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3DT-TEB0912-03-ABI21-A.PDF
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Other Files (1 Files) Firmware - Initial Configuration for diverse PCB components, like CPLD, PLL and ...
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Other Files (0 Files)
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Trace Lengths (0 Files) Other Files (0 Files)
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test_board - TEB0912 Basic Design
TEB0912 Basic Design
-Downloadable files are located below the description-
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Reference Design - Source Code and Configuration Files (1 Files) TEB0912-test_board-vivado_2019.2-build_12_20200610085620.zip
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Reference Design - Documentation (1 Files) TEB0912-test_board-vivado_2019.2-build_12_v.3-06_28_2021.pdf
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Other Files (0 Files)
test_board - TEB0912 Basic Design
TEB0912 Basic Design
-Downloadable files are located below the description-
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Reference Design - Source Code and Configuration Files (1 Files) TEB0912-test_board-vivado_2020.2-build_9_20211220123937.zip
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Reference Design - Documentation (1 Files) TEB0912-test_board-vivado_2020.2-build_9_v.10-02_24_2023.pdf
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Other Files (0 Files)
test_board - TEB0912 Basic Design
TEB0912 Basic Design
-Downloadable files are located below the description-
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Reference Design - Source Code and Configuration Files (1 Files) TEB0912-test_board-vivado_2022.2-build_3_20230804122209.zip
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Reference Design - Documentation (0 Files) Other Files (0 Files)
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Other Files (0 Files)
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Schematics (1 Files) SCH-TEC0330-03.PDF
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Assembly Diagrams (1 Files) AD-TEC0330-03.PDF
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3D PDF (2 Files) 3DB-TEC0330-03.PDF
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3DT-TEC0330-03.PDF
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Other Files (0 Files)
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Trace Lengths (0 Files) Other Files (0 Files)
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TEC0330-03_1.jpg
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TEC0330-03_2.jpg
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REV04 - PCB Revision: Schematics, AD, STEP, HW Design Files and more ...
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-
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Assembly Diagrams (1 Files) AD-TEC0330-04.PDF
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3D PDF (2 Files) 3DB-TEC0330-04.PDF
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3DT-TEC0330-04.PDF
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- Please read the Legal Notices before downloading Trenz Electronics documents and files.
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Trace Lengths (0 Files) Other Files (0 Files)
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TEC0330-04_bottom.jpg
Size
TEC0330-04_top.jpg
Size
REV05 - PCB Revision: Schematics, AD, STEP, HW Design Files and more ...
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-
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Assembly Diagrams (1 Files) AD-TEC0330-05.PDF
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3D PDF (0 Files) Other Files (0 Files)
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-
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- If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
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test_board - TEC0330 Simple frequency measurement
TEC0330 Simple frequency measurement
-Downloadable files are located below the description-
Component | Description |
---|---|
Xilinx-IP | VIO |
TE-IP | PRIM_STARTUP, labtools_fmeter |
Application | Description |
---|
Name | Folder | Description |
---|
File | File-Extension | Description |
---|---|---|
BIT-File | *.bit | FPGA Configuration File |
DebugProbes-File | *.ltx | Definition File for Vivado/Vivado Labtools Debugging Interface |
Diverse Reports | --- | Report files in different formats |
LabTools Project-File | *.lpr | Vivado Labtools Project File |
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tec0330-test_board_noprebuilt-vivado_2016.2-build_07_20161031121945.zip
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2018.2
test_board - TEC0330 PCie, DDR3 and SI5338 Test Design
TEC0330 PCie, DDR3 and SI5338 Test Design
-Downloadable files are located below the description-
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Size
Reference Design - Source Code and Configuration Files (1 Files) TEC0330-test_board-vivado_2018.2-build_03_20181030122147.zip
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Reference Design - Documentation (0 Files) Other Files (1 Files) 2021.2
test_board - TEC0330 PCie, DDR3 and SI5338 Test Design
TEC0330 PCie, DDR3 and SI5338 Test Design
-Downloadable files are located below the description-
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Reference Design - Source Code and Configuration Files (1 Files) TEC0330-test_board-vivado_2021.2-build_17_20220922155804.zip
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Reference Design - Documentation (0 Files) Other Files (0 Files)
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-
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PCN-20210521 TEF1001-02 Flash Change-v4-05_27_2021.pdf
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Other Files (0 Files)
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-
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Assembly Diagrams (1 Files) AD-TEF1001-01.PDF
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3D PDF (2 Files) 3DB-TEF1001-01.PDF
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3DT-TEF1001-01.PDF
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Other Files (0 Files)
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Source Code of CPLD Firmware (1 Files) SC-PRJ-TEF1001-01_SC1001-02_20171128.zip
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Other Files (0 Files)
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Trace Lengths (0 Files) Other Files (0 Files)
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TEF1001-01_bottom.jpg
Size
TEF1001-01_top.jpg
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REV02 - PCB Revision: Schematics, AD, STEP, HW Design Files and more ...
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If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
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Schematics (9 Files) SCH-TEF1001-02-B2IX4-A.PDF
Size
SCH-TEF1001-02-B2IX4-C.PDF
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SCH-TEF1001-02-B2IX4-F.PDF
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SCH-TEF1001-02-B2IX4-K.PDF
Size
SCH-TEF1001-02-D2CX4-A.PDF
Size
SCH-TEF1001-02-D2CX4-K.PDF
Size
SCH-TEF1001-02-G2IX4-A.PDF
Size
SCH-TEF1001-02-G2IX4-D.PDF
Size
SCH-TEF1001-02-G2IX4-K.PDF
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Assembly Diagrams (9 Files) AD-TEF1001-02-B2IX4-A.PDF
Size
AD-TEF1001-02-B2IX4-C.PDF
Size
AD-TEF1001-02-B2IX4-F.PDF
Size
AD-TEF1001-02-B2IX4-K.PDF
Size
AD-TEF1001-02-D2CX4-A.PDF
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AD-TEF1001-02-D2CX4-K.PDF
Size
AD-TEF1001-02-G2IX4-A.PDF
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AD-TEF1001-02-G2IX4-D.PDF
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AD-TEF1001-02-G2IX4-K.PDF
Size
3D PDF (2 Files) 3DB-TEF1001-02.PDF
Size
3DT-TEF1001-02.PDF
Size
Other Files (0 Files)
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Source Code of CPLD Firmware (0 Files) Other Files (0 Files)
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Size
Trace Lengths (0 Files) Other Files (0 Files)
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Size
TEF1001-02-160-2I bottem.jpg
Size
TEF1001-02-160-2I top.jpg
Size
TEF1001-02-410-2I angle.jpg
Size
TEF1001-02-410-2I bottom.jpg
Size
TEF1001-02-410-2I top.jpg
Size
TEF1001-02-B2IX4-A angle.jpg
Size
TEF1001-02-B2IX4-A bottom.jpg
Size
TEF1001-02-B2IX4-A top.jpg
Size
TEF1001-02-G2IX4-A angel.jpg
Size
TEF1001-02-G2IX4-A bottom.jpg
Size
TEF1001-02-G2IX4-A top.jpg
Size
Reference_Design - FPGA Design Examples for different Vivado Versions
- If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
test_board - TEF1001 Simple PCIe Design
TEF1001 Simple PCIe Design
-Downloadable files are located below the description-
Launch:
- Plug PCIe Board on PCIe connector and add additional power connector.
- Connect JTAG.
- Power on PC.
- Option 1(If Board Power and JTAG is connected to other PC): Configure FPGA with Bitfile (<design_name>/prebuilt/hardware/<short dirt>) and restart PC with PCIe Board.
- Option 2(If Board Power and JTAG is connected to same PC): Configure Flash with MCS-file (<design_name>/prebuilt/hardware/<short dirt>) and restart PC with PCIe Board.
- PCIe is visible on Device-Manager.
Component | Description |
---|---|
Xilinx-IP | MicroBlaze, MMCM, AXI INTC, AXI Timer, AXI I2C, AXI MM to PCIe, AXI QSPI, VIO |
Application | Description |
---|
Name | Folder | Description |
---|
File | File-Extension | Description |
---|---|---|
BIT-File | *.bit | FPGA Configuration File |
DebugProbes-File | *.ltx | Definition File for Vivado/Vivado Labtools Debugging Interface |
Diverse Reports | --- | Report files in different formats |
Hardware-Platform-Specification-Files | *.hdf | Exported Vivado Hardware Specification for SDK/HSI |
LabTools Project-File | *.lpr | Vivado Labtools Project File |
MCS-File | *.mcs | Flash Configuration File with Boot-Image (MicroBlaze or FPGA part only) |
MMI-File | *.mmi | File with BRAM-Location to generate MCS or BIT-File with *.elf content (MicroBlaze only) |
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Size
Reference Design - Source Code and Configuration Files (1 Files) tef1001-test_board-vivado_2017.1-build_01_20170614124456.zip
Size
Other Files (0 Files)
test_board - TEF1001 PCie and SI5338 Test Design
TEF1001 PCie and SI5338 Test Design
-Downloadable files are located below the description-
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Size
Reference Design - Source Code and Configuration Files (1 Files) TEF1001-test_board-vivado_2017.2-build_05_20171128114335.zip
Size
Reference Design - Documentation (0 Files) Other Files (0 Files)
test_board - TEF1001 PCie and SI5338 Test Design
TEF1001 PCie and SI5338 Test Design
-Downloadable files are located below the description-
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Size
Reference Design - Source Code and Configuration Files (1 Files) TEF1001-test_board-vivado_2017.4-build_06_20180307102845.zip
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Reference Design - Documentation (0 Files) Other Files (0 Files)
test_board - TEF1001 PCie, DDR3 and SI5338 Test Design
TEF1001 PCie, DDR3 and SI5338 Test Design
-Downloadable files are located below the description-
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Size
Reference Design - Source Code and Configuration Files (1 Files) TEF1001-test_board-vivado_2018.2-build_03_20181025165553.zip
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Reference Design - Documentation (0 Files) Other Files (0 Files)
Pinout and Trace Length Viewer for Trenz Electronic PCBs
Size
Pinout and trace length table for TEB0911 board (1 Files) TEB0911_series_pinout_tracelength.xlsx
Size
Pinout and trace length table for TE080x series (TE0808,TE0807, TE0803...) (1 Files) TE080x_series_pinout_tracelength.xlsx
Size
Pinout and trace length table for TE081x series (TE0818,TE0817, TE0813...) (1 Files) TE081x_series_pinout_tracelength.xlsx
Size
Pinout and trace length table for 4x5 series (TE0841, TE0823, TE0821, TE0820, TE0741, TE0720, TE0715, TE0713, TE0712, TE0711, TE0710...) (1 Files) 4x5_series_pinout_tracelength.xlsx
Size
Pinout and trace length table for 4x5 series (TE0841, TE0823, TE0821, TE0820, TE0741, TE0720, TE0715, TE0713, TE0712, TE0711, TE0710...) with TEBA0841 (1 Files) 4x5_series_teba0841_pinout_tracelength.xlsx
Size
Pinout and trace length table for 4x6 series (TE0724...) (1 Files) 4x6_series_pinout_tracelength.xlsx
Size
Pinout and trace length table for 3x4 series (TE0714...) (1 Files) 3x4_series_pinout_tracelength.xlsx
Size
Pinout and trace length table for 6x6 series (TE0728...) (1 Files) 6x6_series_pinout_tracelength.xlsx
Size
Pinout and trace length table for 6x8 series (TEI0006...) (1 Files) 6x8_series_pinout_tracelength.xlsx
Size
Pinout and trace length table for TE0716 (1 Files) TE0716_series_pinout_tracelength.xlsx
Size
Pinout and trace length table for 2.5x3.5 series (TE0717...) (1 Files) TE0717_series_pinout_tracelength.xlsx
Size
Pinout and trace length table for 6.5x9 series (TE0835...) (1 Files) TE0835_series_pinout_tracelength.xlsx
Size
Pinout and trace length table for 4x5.64 series (AM0010...) (1 Files) AM0010_series_pinout_tracelength.xlsx
Size
Pinout and trace length table for 8.5x8.5 series (TE0782, TE0783, TE0784...) (1 Files) 8.5x8.5_series_pinout_tracelength.xlsx
Size
Pinout and trace length table for 2.5x6.15 series (TEI0001,TEI0003, TEI0010, TEM0001, TEL0001, TEC0117 ...) (1 Files) 2.5x6.15_series_pinout_tracelength.xlsx
Size
Pinout and trace length table for 2.5x8.65 series (TEI0015, TEI0016...) (1 Files) 2.5x8.65_series_pinout_tracelength.xlsx
Size
Pinout and trace length table for 2.7x5.2 series (TEI0890...) (1 Files) 2.7x5.2_series_pinout_tracelength.xlsx
Size
Pinout and trace length table for 3.5x6.5 series (TE0876...) (1 Files) 3.05x6.5_series_pinout_tracelength.xlsx
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Pinout and trace length table for 3.1x5.6 series (TEM0005...) (1 Files) 3.1x5.6_series_pinout_tracelength.xlsx
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Pinout and trace length table for 3.5x7.3 series (TE0725, TE0725LP...) (1 Files) 3.5x7.3_series_pinout_tracelength.xlsx
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Pinout and trace length table for TEI0009 Development Kit (1 Files) TEI0009_series_pinout_tracelength.xlsx
Size
Pinout and trace length table for TE0729 series (5.2x7.6) (TE0729,...) (1 Files) TE0729_series_pinout_tracelength.xlsx
Size
Pinout and trace length table for TE0745 series (5.2x7.6) (TE0745,...) (1 Files) TE0745_series_pinout_tracelength.xlsx
Size
Pinout and trace length table for TE0802 eval board (1 Files) TE0802_series_pinout_tracelength.xlsx
Size
Pinout and trace length table for TEF0007 FMC card (1 Files) TEF0007_series_pinout_tracelength.xlsx
Size
Pinout and trace length table for TEF0008 FMC card (1 Files) TEF0008_series_pinout_tracelength.xlsx
Size
Pinout and trace length table for TEM0002 Board (1 Files) TEM0002_series_pinout_tracelength.xlsx
Size
Pinout and trace length table for TEM0004 Board (1 Files) TEM0004_series_pinout_tracelength.xlsx
Size
Pinout und Leitungslängen Tabellen für TE0865 Board (1 Files) TE0865_series_pinout_tracelength.xlsx
Size
Pinout und Leitungslängen Tabellen für TE0630 Board (1 Files) TE0630_series_pinout_tracelength.xlsx
Size
Pinout und Leitungslängen Tabellen für TE0600 Board (1 Files) TE0600_series_pinout_tracelength.xlsx
Size
Pinout und Leitungslängen Tabellen für TEM0007 Board (1 Files) TEM0007_series_pinout_tracelength.xlsx
Size
Pinout and trace length table for different series (1 Files) TE088x_series_pinout_tracelength.xlsx
Size
General 4x5 Module-/Carrier-PCB documents (2 Files) 4x5general_carrier_pinout_topview.pdf
Size
4x5general_module_pinout_topview.pdf
Size
General 5.2x7.6 UltraSoM+ Module-/Carrier-PCB documents (1 Files) 5.2x7.6_UltraSoMPlus_general_pinout.pdf
Size
FMC-FPGA Pinout for different PCBs (4 Files) TE0701_FMC_PINOUT.pdf
Size
TE0701_FMC_PINOUT.xlsx
Size
TEC0330_FMC_PINOUT.pdf
Size
TEC0330_FMC_PINOUT.xlsx
Size
Master Pinout Tables (obsolete) (0 Files) Other Files (0 Files)
- If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
- If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
- Please read the Legal Notices before downloading Trenz Electronics documents and files.
-
If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
- If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
- Please read the Legal Notices before downloading Trenz Electronics documents and files.
-
If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
Size
Schematics (1 Files) SCH-TEP0001-01.PDF
Size
Assembly Diagrams (1 Files) AD-TEP0001-01.PDF
Size
3D PDF (2 Files) 3DB-TEP0001-01.PDF
Size
3DT-TEP0001-01.PDF
Size
Other Files (0 Files)
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-
If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
- Please read the Legal Notices before downloading Trenz Electronics documents and files.
- Trenz Electronic use STEP-Models from different sources. Depending from model and soldering process the real dimension (especial maximum height) can be vary from the STEP-Models.
-
If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
Size
Trace Lengths (0 Files) Electronic Design Interchange Format(EDIF) (0 Files) Other Files (0 Files)
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-
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Size
TEP0001 angle1.jpg
Size
TEP0001 bottom.jpg
Size
TEP0001 top.jpg
Size
TEP0002 - motor driver board
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-
If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
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PCN-20220719 TEP0002-03 Feedback Circuit Improvement.pdf
Size
Other Files (0 Files)
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If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
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Assembly Diagrams (1 Files) AD-TEP0002-02.PDF
Size
3D PDF (2 Files) 3DB-TEP0002-02.PDF
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3DT-TEP0002-02.PDF
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Other Files (0 Files)
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-
If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
- Please read the Legal Notices before downloading Trenz Electronics documents and files.
- Trenz Electronic use STEP-Models from different sources. Depending from model and soldering process the real dimension (especial maximum height) can be vary from the STEP-Models.
-
If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
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Trace Lengths (0 Files) Electronic Design Interchange Format(EDIF) (0 Files) Other Files (0 Files)
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If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
Size
TEP0002-02 bottom.jpg
Size
TEP0002-02 top.jpg
Size
REV03 - PCB Revision: Schematics, AD, STEP, HW Design Files and more ...
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If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
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Assembly Diagrams (1 Files) AD-TEP0002-03.PDF
Size
3D PDF (0 Files) Other Files (0 Files)
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-
If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
- Please read the Legal Notices before downloading Trenz Electronics documents and files.
- Trenz Electronic use STEP-Models from different sources. Depending from model and soldering process the real dimension (especial maximum height) can be vary from the STEP-Models.
-
If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
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-
If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
Size
TEP0002-03 angle1.jpg
Size
TEP0002-03 bottom.jpg
Size
TEP0002-03 top.jpg
Size
TEP0003 - ...
- If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
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-
If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
- If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
- Please read the Legal Notices before downloading Trenz Electronics documents and files.
-
If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
- Please read the Legal Notices before downloading Trenz Electronics documents and files.
-
If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
- Please read the Legal Notices before downloading Trenz Electronics documents and files.
- Trenz Electronic use STEP-Models from different sources. Depending from model and soldering process the real dimension (especial maximum height) can be vary from the STEP-Models.
-
If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
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-
If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
- If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
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Other Files (0 Files)
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-
If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
Size
Assembly Diagrams (1 Files) AD-TEP0005-01.PDF
Size
3D PDF (2 Files) 3DB-TEP0005-01.PDF
Size
3DT-TEP0005-01.PDF
Size
Other Files (0 Files)
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-
If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
- Please read the Legal Notices before downloading Trenz Electronics documents and files.
- Trenz Electronic use STEP-Models from different sources. Depending from model and soldering process the real dimension (especial maximum height) can be vary from the STEP-Models.
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If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
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Trace Lengths (0 Files) Electronic Design Interchange Format(EDIF) (0 Files) Other Files (0 Files)
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-
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Size
TEP0005-01 bottom.jpg
Size
TEP0005-01 top.jpg
Size
TEP0006 - Ultra96 LS Expansion
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-
If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
- If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
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-
If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
Size
Schematics (1 Files) SCH-TEP0006-01.PDF
Size
Assembly Diagrams (1 Files) AD-TEP0006-01.PDF
Size
3D PDF (2 Files) 3DB-TEP0006-01.PDF
Size
3DT-TEP0006-01.PDF
Size
Other Files (0 Files)
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If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
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Trace Lengths (0 Files) Electronic Design Interchange Format(EDIF) (0 Files) Other Files (0 Files)
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Size
TEP0006-01_bottom.jpg
Size
TEP0006-01_top.jpg
Size
Shoparticle - Trenz Electronic Shop Article Selection Guide
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Size
Software - drivers, ToolZ, ...
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Arrow_USB_Programmer - Driver/Setup Files
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Size
Arrow_USB_Programmer_2.1 - Arrow USB Programmer 2.1 Libraries
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Size
Arrow_USB_Programmer_2.1_win64.zip
Size
Other Files (0 Files)
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Arrow_USB_Programmer_2.2_win64.zip
Size
Other Files (0 Files)
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Arrow_USB_Programmer_2.3_win64.zip
Size
Other Files (0 Files)
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Files Arrow_USB_Programmer_2.4_linux64.zip
Size
Files[-] Close all Setup libraries for FTDI driver (2 Files) Arrow_USB_Programmer_2.4.1_linux64.zip
Size
Arrow_USB_Programmer_2.4_win64.zip
Size
Other Files (0 Files)
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Arrow_USB_Programmer_2.5_win64.zip
Size
Other Files (0 Files)
Size
Diagnose Tool for Win OS (1 Files) Arrow_USB_Programmer2-Diagnostic_Program_for_Win_OS.zip
Size
Other Files (0 Files)
Files TE-USB-Suite-master_27032023.zip
Size
TE_USB_FX2-drivers_23032023.zip
Size
ToolZ - Internal flash and JTAG test tool as well as DTC tool for device-tree manipulation
-
DTC_WIN32.zip - WIN32 version of DTC tool for device-tree manipulation.
-
ToolZ-1-0-0-4.zip - beta release of internal flash and jtag test tool, current version can flash maximum 8Mbyte.
Size
ToolZ-1-0-0-4.zip
Size
Vivado_IP_Core - TE Vivado IPIs for different Vivado versions
- If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
Files I2C_TO_3WI.zip
Size
trenz.biz_user_GMII_to_MII_1.0.zip
Size
trenz.biz_user_SC0720_1.0.zip TE0720 System Controller Support Logic IP Core 1.0, Rev 9, Production release
Size
trenz.biz_user_axis_fb_conv_1.0.zip
Size
2016.1
Files trenz.biz_user_dp_aux_mon_1.0.zip
Size
2017.4
Files PRIM_STARTUP.zip
Size
rgpio_1.0.zip
Size
third_party - Third party products containing Trenz PCBs
- If you did not find the necessary documents, please send a request mail to Trenz Electronic Support (support[at]trenz-electronic.de).
- If you have not found the documents you need, please contact the Mega65 Forum (http://mega65.net/ ) or Mega65 Team (https://www.m-e-g-a.org/contact/ ).
24536 TB-7K325T-IMG
documents
Files TB-7K-325T-IMG.pdf
Size
TB-7K325T-IMG.preliminary.pdf
Size
pictures
Files _DSC1824.jpg
Size
_DSC1879.jpg
Size
24706 TB-FMCH-3GSDI2A
documents
Files pdf_TB-FMCH-3GSDI2A_HWUserManual_1.01e.pdf
Size
Files TOKYO ELECTRON DEVICE LTD warranty-1.pdf
Size
reference