CRUVI MAX 10 Base Board with Intel MAX 10 FPGA, 8 MByte SDRAM, 4.5 x 5.7 cm

Preview: CRUVI Baseboard with Altera® MAX® 10 FPGA, 8 MByte SDRAM, 4.5 x 5.7 cm

CRUVI Baseboard with Altera® MAX® 10 FPGA, 8 MByte SDRAM, 4.5 x 5.7 cm

€59.00 (70.21 € gross) *

Prices plus VAT plus shipping costs

Ready to ship today,
Delivery time appr. 1-3 workdays

Order number: CR00100-02-DBC82A
In Stock: 37
Standard leadtime (weeks): 34
Article status: Full production

The predecessor of this article is CR00100-01-DBC82A . All changes are in the Product... more

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Product information "CRUVI Baseboard with Altera® MAX® 10 FPGA, 8 MByte SDRAM, 4.5 x 5.7 cm"

The predecessor of this article is CR00100-01-DBC82A. All changes are in the Product Change Notification (PCN).

The Trenz Electronic CR00100-02 is a CRUVI baseboard with Altera^® MAX^® 10 FPGA.

For further informations please visit www.cruvi.com.

Key Features

SoC/FPGA
- Altera^® MAX^®10 FPGA (10M08 as standard option)

RAM/Storage
- 8 MByte SDRAM

On Board
- JTAG and UART over Micro USB connector
- 1 x User Push button
- 2 x User LEDs (red, green)

Interface
- 1 x CRUVI LS
- 1 x CRUVI HS

Power
- Power from microUSB connector

Dimension
- 44.85 mm x 57.50 mm

Other assembly options for cost or performance optimization plus high volume prices available on request.

Scope of Delivery

1 x CR00100-02-DBC82A Trenz Electronic CRUVI Baseboard with Altera^® MAX^® 10 FPGA
4 x screws

Additional Information

Manufacturer's article number: CR00100-02-DBC82A
Trenz Electronic CR00100 Wiki
Support Forum

All modules produced by Trenz Electronic are developed and manufactured in Germany.

Related links to "CRUVI Baseboard with Altera® MAX® 10 FPGA, 8 MByte SDRAM, 4.5 x 5.7 cm"

Downloads

Digilent
OHO-Elektronik
Sundance
Trenz_Electronic - Documents and Design files for Trenz Electronic Products

File	File-Extension	Description
Bit-File	*.bit	FPGA Configuration File
Diverse Reports	--	Report files in different formats

File	File-Extension	Description
MCS-File	*.mcs	Flash Configuration File with Boot-Image (MicroBlaze or FPGA part only)
Bit-File	*.bit	FPGA Configuration File
Software-Application-File	*.elf	Software Application for Zynq or MicroBlaze Processor Systems
Hardware-Platform-Specification-Files	*.hdf	Hardware Specification from the vivado project. Used in SDK/HSI
MMI-File	*.mmi	File with BRAM-Location to generate MCS or BIT-File with *.elf content (MicroBlaze only)
Diverse Reports	--	Report files in different formats

Component	Description
Xilinx-IP	I2C,SPI-Flash,UART
TE-IP	ASIO (AXI-Stream to IO)

File	File-Extension	Description
MCS-File	*.mcs	Flash Configuration File with Boot-Image (MicroBlaze or FPGA part only)
BIT-File	*.bit	FPGA Configuration File
Software-Application-File	*.elf	Software Application for Zynq or MicroBlaze Processor Systems
Hardware-Platform-Specification-Files	*.hdf	Exported Vivado Hardware Specification for SDK/HSI
MMI-File	*.mmi	File with BRAM-Location to generate MCS or BIT-File with *.elf content (MicroBlaze only)
Diverse Reports	--	Report files in different formats

Component	Description
Xilinx-IP	VIO
TE-IP	Startupe2,LabTools Frequency Counter

Component	Description
Xilinx-IP	VIO (Virtual Input/Output)
TE-IP	Labtools Frequency Counter, Startupe2 Primitive Wrapper

Directory		Content
PCN		Product change notifications: Important changes between hardware revisions
Reference Design		Reference Designs sort by ISE/EDK Version
REV0x		Documents and source files sorted by PCB revision. Connector Pinout Viewer/XDC-Generator available on TE Master Pinout, as well as a additional informations on All Trenz Electronic SoMs
	Documents	PDF documents, like Technical Reference Manual, Schematics, Assembly Diagrams and...
	Firmware	Initial configuration for diverse PCB components, like CPLD, PLL and ...
	HW Design	Relevant files for PCB-Design, like PCB-STEP-Model, Cooler-STEP-Model, Trace-length, Altium libraries / projects (only for selected carrier boards), and ...
	Pictures	PCB-Pictures

Directory		Content
PCN		Product change notifications: Important changes between hardware revisions
REV0x		Documents and source files sorted by PCB revision. Connector Pinout Viewer/XDC-Generator available on TE Master Pinout, as well as a additional informations on All Trenz Electronic SoMs
	Documents	PDF documents, like Technical Reference Manual, Schematics, Assembly Diagrams and...
	Firmware	Initial configuration for diverse PCB components, like CPLD, PLL and ...
	HW Design	Relevant files for PCB-Design, like PCB-STEP-Model, Cooler-STEP-Model, Trace-length, Altium libraries / projects (only for selected carrier boards), and ...
	Pictures	PCB-Pictures

Component	Description
Xilinx-IP	MicroBlaze, MB-Debug, Uartlite, MIG7 for DDR3, QSPI, Timer, Ethernet Lite
TE-IP	ASIO GPIO (AXI-Stream to GPIO)

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